Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials

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GPHYSICS G11Information storage G11CSTATIC STORES G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group

Current Industry

G11C2213/82Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials

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Patents Grantslast 30 patents

Information Patent Grant
Circuitry for parallel set and reset of resistive random-access mem...
- Patent number 12,068,028
- Issue date Aug 20, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase-change memory cell having a compact structure
- Patent number 11,957,067
- Issue date Apr 9, 2024
- STMicroelectronics (Crolles 2) SAS
- Philippe Boivin
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive ram
- Patent number 11,908,515
- Issue date Feb 20, 2024
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 11,735,260
- Issue date Aug 22, 2023
- Winbond Electronics Corp.
- Yasuhiro Tomita
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of RRAM write ramping voltage in intervals
- Patent number 11,682,457
- Issue date Jun 20, 2023
- Hefei Reliance Memory Limited
- Brent Haukness
- G11 - INFORMATION STORAGE
Information Patent Grant
Set-while-verify circuit and reset-while verify circuit for resisti...
- Patent number 11,646,078
- Issue date May 9, 2023
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 11,568,929
- Issue date Jan 31, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory device with trimmable driver and sinker and method...
- Patent number 11,423,982
- Issue date Aug 23, 2022
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chung-Cheng Chou
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for shielded memory architecture
- Patent number 11,335,644
- Issue date May 17, 2022
- Micron Technology, Inc.
- Ferdinando Bedeschi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory devices and memory operational methods
- Patent number 11,295,812
- Issue date Apr 5, 2022
- Micron Technology, Inc.
- Wataru Otsuka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of RRAM WRITE ramping voltage in intervals
- Patent number 11,238,930
- Issue date Feb 1, 2022
- Hefei Reliance Memory Limited
- Brent Haukness
- G11 - INFORMATION STORAGE
Information Patent Grant
1T-1R architecture for resistive random access memory
- Patent number 11,152,062
- Issue date Oct 19, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
2T-1R architecture for resistive RAM
- Patent number 11,081,176
- Issue date Aug 3, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase-change memory cell having a compact structure
- Patent number 11,031,550
- Issue date Jun 8, 2021
- STMicroelectronics (Crolles 2) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
RRAM write using a ramp control circuit
- Patent number 10,998,044
- Issue date May 4, 2021
- Hefei Reliance Memory Limited
- Brent Haukness
- G11 - INFORMATION STORAGE
Information Patent Grant
Electronic device including switching element and semiconductor memory
- Patent number 10,978,390
- Issue date Apr 13, 2021
- SK hynix Inc.
- Dong-Joon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Two transistor, one resistor non-volatile gain cell memory and stor...
- Patent number 10,950,301
- Issue date Mar 16, 2021
- Intel Corporation
- Rafael Rios
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for programing DDR compatible open architecture resistive c...
- Patent number 10,937,498
- Issue date Mar 2, 2021
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Memory circuit and formation method thereof
- Patent number 10,879,309
- Issue date Dec 29, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Yang Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory circuit and formation method thereof
- Patent number 10,879,310
- Issue date Dec 29, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chun-Yang Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power on reset method for resistive memory storage device
- Patent number 10,839,899
- Issue date Nov 17, 2020
- Winbond Electronics Corp.
- Ping-Kun Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory write and read assistance using negative differential resist...
- Patent number 10,832,752
- Issue date Nov 10, 2020
- The Regents of the University of California
- Puneet Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Tungsten oxide RRAM with barrier free structure
- Patent number 10,811,602
- Issue date Oct 20, 2020
- Macronix International Co., Ltd.
- Erh-Kun Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for reading RRAM cell
- Patent number 10,796,759
- Issue date Oct 6, 2020
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-Chieh Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
1T-1R architecture for resistive random access memory
- Patent number 10,783,964
- Issue date Sep 22, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra Sekar
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 10,777,272
- Issue date Sep 15, 2020
- Winbond Electronics Corp.
- Hajime Aoki
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 10,770,142
- Issue date Sep 8, 2020
- National Tsing Hua University
- Meng-Fan Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive change element arrays using a reference line
- Patent number 10,762,961
- Issue date Sep 1, 2020
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Architectures and layouts for an array of resistive random access m...
- Patent number 10,755,779
- Issue date Aug 25, 2020
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory apparatus and operating method thereof
- Patent number 10,726,890
- Issue date Jul 28, 2020
- Winbond Electronics Corp.
- Lih-Wei Lin
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS
- Publication number 20230307045
- Publication date Sep 28, 2023
- Hefei Reliance Memory Limited
- Brent HAUKNESS
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20230154531
- Publication date May 18, 2023
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS
- Publication number 20220084593
- Publication date Mar 17, 2022
- Hefei Reliance Memory Limited
- Brent HAUKNESS
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20210295913
- Publication date Sep 23, 2021
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
Set-While-Verify Circuit And Reset-While Verify Circuit For Resisti...
- Publication number 20210257023
- Publication date Aug 19, 2021
- Silicon Storage Technology, Inc.
- HIEU VAN TRAN
- G11 - INFORMATION STORAGE
Information Patent Application
RRAM WRITE
- Publication number 20210012838
- Publication date Jan 14, 2021
- Hefei Reliance Memory Limited
- Brent HAUKNESS
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY DEVICE WITH TRIMMABLE DRIVER AND SINKER AND METHOD...
- Publication number 20200350010
- Publication date Nov 5, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chung-Cheng CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20200211644
- Publication date Jul 2, 2020
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITRY AND METHODS FOR PROGRAMMING RESISTIVE RANDOM ACCESS MEMOR...
- Publication number 20200090747
- Publication date Mar 19, 2020
- Microsemi SoC Corp.
- John L. McCollum
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY CIRCUIT AND FORMATION METHOD THEREOF
- Publication number 20200027922
- Publication date Jan 23, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Chun-Yang Tsai
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CIRCUIT AND FORMATION METHOD THEREOF
- Publication number 20200020744
- Publication date Jan 16, 2020
- Taiwan Semiconductor Manufacturing Co., LTD
- Chun-Yang Tsai
- G11 - INFORMATION STORAGE
Information Patent Application
RRAM WRITE
- Publication number 20190371399
- Publication date Dec 5, 2019
- Hefei Reliance Memory Limited
- Brent HAUKNESS
- G11 - INFORMATION STORAGE
Information Patent Application
1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY
- Publication number 20190355414
- Publication date Nov 21, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
Resistive Change Element Arrays Using a Reference Line
- Publication number 20190341107
- Publication date Nov 7, 2019
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Application
METHOD AND APPARATUS FOR READING RRAM CELL
- Publication number 20190272873
- Publication date Sep 5, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Chin-Chieh Yang
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY CELL HAVING A COMPACT STRUCTURE
- Publication number 20190214434
- Publication date Jul 11, 2019
- STMicroelectronics (Crolles 2) SAS
- Philippe Boivin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WRITE AND READ ASSISTANCE USING NEGATIVE DIFFERENTIAL RESIST...
- Publication number 20190198079
- Publication date Jun 27, 2019
- The Regents of the University of California
- Puneet GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20190164603
- Publication date May 30, 2019
- Samsung Electronics Co., Ltd.
- Suk-Soo PYO
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20190156886
- Publication date May 23, 2019
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
RRAM ARRAY WITH CURRENT LIMITING ELEMENT
- Publication number 20190139604
- Publication date May 9, 2019
- Taiwan Semiconductor Manufacturing Co., LTD
- Chia-Fu Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20190115074
- Publication date Apr 18, 2019
- National Tsing Hua University
- Meng-Fan CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROL CIRCUIT OF A RESISTIVE MEMORY CELL OF A MEMORY ARRAY
- Publication number 20190115075
- Publication date Apr 18, 2019
- National Tsing Hua University
- Meng-Fan CHANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20190088334
- Publication date Mar 21, 2019
- Toshiba Memory Corporation
- Mutsumi Okajima
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Devices and Memory Operational Methods
- Publication number 20190080759
- Publication date Mar 14, 2019
- Micron Technology, Inc.
- Wataru Otsuka
- G11 - INFORMATION STORAGE
Information Patent Application
Architectures and Layouts for an Array Of Resistive Random Access M...
- Publication number 20190080753
- Publication date Mar 14, 2019
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
Methods For Writing To An Array Of Resistive Random Access Memory C...
- Publication number 20190080754
- Publication date Mar 14, 2019
- Hieu Van Tran
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED 1T1R RRAM MEMORY CELL
- Publication number 20190066779
- Publication date Feb 28, 2019
- Intel Corporation
- ELIJAH V. KARPOV
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY DEVICE WITH TRIMMABLE DRIVER AND SINKER AND METHOD...
- Publication number 20180358091
- Publication date Dec 13, 2018
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chung-Cheng CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
2T-1R ARCHITECTURE FOR RESISTIVE RAM
- Publication number 20180330782
- Publication date Nov 15, 2018
- Hefei Reliance Memory Limited
- Deepak Chandra SEKAR
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR READING RRAM CELL
- Publication number 20180218770
- Publication date Aug 2, 2018
- Taiwan Semiconductor Manufacturing Co., LTD
- Chin-Chieh Yang
- G11 - INFORMATION STORAGE

Array having, for accessing a cell, a word line, a bit line and a plate or source line receiving different potentials

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Circuitry for parallel set and reset of resistive random-access mem...

Phase-change memory cell having a compact structure

2T-1R architecture for resistive ram

Semiconductor memory device

Method of RRAM write ramping voltage in intervals

Set-while-verify circuit and reset-while verify circuit for resisti...

2T-1R architecture for resistive RAM

Resistive memory device with trimmable driver and sinker and method...

Apparatuses and methods for shielded memory architecture

Memory devices and memory operational methods

Method of RRAM WRITE ramping voltage in intervals

1T-1R architecture for resistive random access memory

2T-1R architecture for resistive RAM

Phase-change memory cell having a compact structure

RRAM write using a ramp control circuit

Electronic device including switching element and semiconductor memory

Two transistor, one resistor non-volatile gain cell memory and stor...

Methods for programing DDR compatible open architecture resistive c...

Memory circuit and formation method thereof

Memory circuit and formation method thereof

Power on reset method for resistive memory storage device

Memory write and read assistance using negative differential resist...

Tungsten oxide RRAM with barrier free structure

Method and apparatus for reading RRAM cell

1T-1R architecture for resistive random access memory

Semiconductor memory device

Memory device

Resistive change element arrays using a reference line

Architectures and layouts for an array of resistive random access m...

Resistive memory apparatus and operating method thereof

Patents Applicationslast 30 patents

METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS

2T-1R ARCHITECTURE FOR RESISTIVE RAM

METHOD OF RRAM WRITE RAMPING VOLTAGE IN INTERVALS

2T-1R ARCHITECTURE FOR RESISTIVE RAM

Set-While-Verify Circuit And Reset-While Verify Circuit For Resisti...

RRAM WRITE

RESISTIVE MEMORY DEVICE WITH TRIMMABLE DRIVER AND SINKER AND METHOD...

2T-1R ARCHITECTURE FOR RESISTIVE RAM

CIRCUITRY AND METHODS FOR PROGRAMMING RESISTIVE RANDOM ACCESS MEMOR...

MEMORY CIRCUIT AND FORMATION METHOD THEREOF

MEMORY CIRCUIT AND FORMATION METHOD THEREOF

RRAM WRITE

1T-1R ARCHITECTURE FOR RESISTIVE RANDOM ACCESS MEMORY

Resistive Change Element Arrays Using a Reference Line

METHOD AND APPARATUS FOR READING RRAM CELL

RESISTIVE MEMORY CELL HAVING A COMPACT STRUCTURE

MEMORY WRITE AND READ ASSISTANCE USING NEGATIVE DIFFERENTIAL RESIST...

NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF

2T-1R ARCHITECTURE FOR RESISTIVE RAM

RRAM ARRAY WITH CURRENT LIMITING ELEMENT

MEMORY DEVICE

CONTROL CIRCUIT OF A RESISTIVE MEMORY CELL OF A MEMORY ARRAY

MEMORY DEVICE

Memory Devices and Memory Operational Methods

Architectures and Layouts for an Array Of Resistive Random Access M...

Methods For Writing To An Array Of Resistive Random Access Memory C...

INTEGRATED 1T1R RRAM MEMORY CELL

RESISTIVE MEMORY DEVICE WITH TRIMMABLE DRIVER AND SINKER AND METHOD...

2T-1R ARCHITECTURE FOR RESISTIVE RAM

METHOD AND APPARATUS FOR READING RRAM CELL