Array wherein the access device being a transistor

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G11C2213/79Array wherein the access device being a transistor

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory devices with different word lines
- Patent number 12,315,561
- Issue date May 27, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
RRAM circuit
- Patent number 12,308,073
- Issue date May 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chung-Cheng Chou
- G11 - INFORMATION STORAGE
Information Patent Grant
Cascoded sense amplifiers for self-selecting memory
- Patent number 12,300,316
- Issue date May 13, 2025
- Micron Technology, Inc.
- Umberto di Vincenzo
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing method based on memristor array and electronic appa...
- Patent number 12,283,320
- Issue date Apr 22, 2025
- Tsinghua University
- Huaqiang Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 12,283,599
- Issue date Apr 22, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and related apparatus for improving memory cell performance...
- Patent number 12,274,074
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Jack Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, and integrated circuit device
- Patent number 12,250,829
- Issue date Mar 11, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Han Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory
- Patent number 12,243,588
- Issue date Mar 4, 2025
- SK hynix Inc.
- Jeong Hwan Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic inhibit voltage to reduce write power for random-access memory
- Patent number 12,230,320
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Zheng-Jun Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell array circuit and method of forming the same
- Patent number 12,230,323
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-I Su
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal processing apparatus and signal processing method
- Patent number 12,226,216
- Issue date Feb 18, 2025
- Tsinghua University
- Huaqiang Wu
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
Semiconductor devices and hybrid transistors
- Patent number 12,219,783
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Kamal M. Karda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Differential programming of two-terminal memory with intrinsic erro...
- Patent number 12,198,760
- Issue date Jan 14, 2025
- Crossbar, Inc.
- Hagop Nazarian
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and write method thereof
- Patent number 12,198,758
- Issue date Jan 14, 2025
- Winbond Electronics Corp.
- Hajime Aoki
- G11 - INFORMATION STORAGE
Information Patent Grant
Crossbar array with reduced disturbance
- Patent number 12,198,761
- Issue date Jan 14, 2025
- TetraMem Inc.
- Ning Ge
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable resistance nonvolatile storage device and write method the...
- Patent number 12,190,950
- Issue date Jan 7, 2025
- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Ken Kawai
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory
- Patent number 12,185,554
- Issue date Dec 31, 2024
- Winbond Electronics Corp.
- Yasuhiro Tomita
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Resistive change element arrays
- Patent number 12,176,028
- Issue date Dec 24, 2024
- Nantero, Inc.
- Jia Luo
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid resistive memory
- Patent number 12,170,109
- Issue date Dec 17, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Elisa Vianello
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a split pillar architecture
- Patent number 12,171,105
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell array circuit and method of forming the same
- Patent number 12,165,705
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-I Su
- G11 - INFORMATION STORAGE
Information Patent Grant
Technologies for controlling current through memory cells
- Patent number 12,154,623
- Issue date Nov 26, 2024
- Intel Corporation
- Noble Narku-Tetteh
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional stacked semiconductor memory
- Patent number 12,144,189
- Issue date Nov 12, 2024
- Kioxia Corporation
- Hidehiro Shiga
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory device for matrix-vector multiplications
- Patent number 12,125,531
- Issue date Oct 22, 2024
- International Business Machines Corporation
- Riduan Khaddam-Aljameh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase-change memory including phase-change elements in series with...
- Patent number 12,120,967
- Issue date Oct 15, 2024
- STMicroelectronics S.r.l.
- Giovanni Campardo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell selector for high-voltage set and reset operations
- Patent number 12,087,359
- Issue date Sep 10, 2024
- Applied Materials, Inc.
- Frank Tzen-Wen Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for programming an array of resistive memory cells
- Patent number 12,087,360
- Issue date Sep 10, 2024
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Gabriel Molas
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including a plurality of stacked memory cells
- Patent number 12,080,345
- Issue date Sep 3, 2024
- SK hynix Inc.
- Dong Keun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
RRAM memory cell with multiple filaments
- Patent number 12,075,634
- Issue date Aug 27, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chin-Chieh Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry for parallel set and reset of resistive random-access mem...
- Patent number 12,068,028
- Issue date Aug 20, 2024
- Weebit Nano Ltd.
- Lior Dagan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CROSSBAR CIRCUITS FOR PERFORMING CONVOLUTION OPERATIONS
- Publication number 20250165555
- Publication date May 22, 2025
- TetraMem Inc.
- Wenbo Yin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250169181
- Publication date May 22, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH A SPLIT PILLAR ARCHITECTURE
- Publication number 20250159910
- Publication date May 15, 2025
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Application
CROSSBAR ARRAY WITH REDUCED DISTURBANCE
- Publication number 20250149087
- Publication date May 8, 2025
- TetraMem Inc.
- Ning Ge
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES AND HYBRID TRANSISTORS
- Publication number 20250142840
- Publication date May 1, 2025
- Micron Technology, Inc.
- Kamal M. Karda
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-STEP PROGRAMMING SCHEMES FOR PROGRAMMING CROSSBAR CIRCUITS
- Publication number 20250111877
- Publication date Apr 3, 2025
- TetraMem Inc.
- Gong Lei
- G11 - INFORMATION STORAGE
Information Patent Application
A Semiconductor Device
- Publication number 20250104768
- Publication date Mar 27, 2025
- Zeno Semiconductor, Inc.
- Yuniarto Widjaja
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME
- Publication number 20250095734
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chin-I SU
- G11 - INFORMATION STORAGE
Information Patent Application
DATA PROCESSING METHOD BASED ON MEMRISTOR ARRAY, AND ELECTRONIC APP...
- Publication number 20250078924
- Publication date Mar 6, 2025
- TSINGHUA UNIVERSITY
- Huaqiang WU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT-SERIAL INPUT SCHEMES FOR CROSSBAR CIRCUITS
- Publication number 20250069655
- Publication date Feb 27, 2025
- TetraMem Inc.
- Hengfang Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROL CIRCUIT CAPABLE OF GENERATING AN UPDATED REFERENCE C...
- Publication number 20250061944
- Publication date Feb 20, 2025
- UNITED MICROELECTRONICS CORP.
- Chung-Hao Chen
- G11 - INFORMATION STORAGE
Information Patent Application
CROSSBAR CIRCUITS INCLUDING RRAM DEVICES WITH MINIMIZED WRITE DISTU...
- Publication number 20250054541
- Publication date Feb 13, 2025
- TetraMem Inc.
- Ning Ge
- G11 - INFORMATION STORAGE
Information Patent Application
DATA WRITING OPERATION METHOD AND DEVICE FOR RESISTIVE RANDOM ACCES...
- Publication number 20250054544
- Publication date Feb 13, 2025
- XIAMEN INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
- Anqiao CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
PROCESS FOR COINTEGRATION OF TWO PHASE CHANGE MEMORY (PCM) ARRAYS H...
- Publication number 20250048940
- Publication date Feb 6, 2025
- STMicroelectronics International N.V.
- Andrea REDAELLI
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSIMPEDANCE AMPLIFIERS FOR CROSSBAR CIRCUITS
- Publication number 20250037763
- Publication date Jan 30, 2025
- TetraMem Inc.
- Wenbo Yin
- G11 - INFORMATION STORAGE
Information Patent Application
SUPPRESSING RANDOM TELEGRAPH NOISE IN CROSSBAR CIRCUITS
- Publication number 20250037765
- Publication date Jan 30, 2025
- TetraMem Inc.
- Mingyi Rao
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE RANDOM ACCESS MEMORY UNIT WITH ONE-WAY CONDUCTION CHARACT...
- Publication number 20250029655
- Publication date Jan 23, 2025
- National Tsing Hua University
- Ya-Chin KING
- G11 - INFORMATION STORAGE
Information Patent Application
CONDUCTANCE RANGE OPTIMIZATION
- Publication number 20250005431
- Publication date Jan 2, 2025
- International Business Machines Corporation
- Corey Liam Lammie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHASE-CHANGE MEMORY INCLUDING PHASE-CHANGE ELEMENTS IN SERIES WITH...
- Publication number 20250008847
- Publication date Jan 2, 2025
- STMicroelectronics S.r.l
- Giovanni Campardo
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTATION CIRCUIT UNIT, NEURAL NETWORK COMPUTATION CIRCUIT, AND M...
- Publication number 20240428061
- Publication date Dec 26, 2024
- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Satoshi AWAMURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT
- Publication number 20240422992
- Publication date Dec 19, 2024
- STMicroelectronics International N.V.
- Andrea REDAELLI
- G11 - INFORMATION STORAGE
Information Patent Application
NEURAL NETWORK COMPUTATION CIRCUIT, CONTROL CIRCUIT THEREFOR, AND C...
- Publication number 20240411520
- Publication date Dec 12, 2024
- NUVOTON TECHNOLOGY CORPORATION JAPAN
- Masayoshi NAKAYAMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ANALOG IN-MEMORY DISCRETE SIGNAL PROCESSOR WITH MINIMUM USAGE OF ADC
- Publication number 20240412783
- Publication date Dec 12, 2024
- TetraMem Inc.
- Miao Hu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR IMPLEMENTING AT LEAST A MULTILAYER...
- Publication number 20240404569
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Marcella CARISSIMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE
- Publication number 20240379157
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Koushik Banerjee
- G11 - INFORMATION STORAGE
Information Patent Application
RANDOM ACCESS MEMORY APPARATUS, MEMORY SYSTEM, AND METHOD FOR OPERA...
- Publication number 20240371439
- Publication date Nov 7, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- JUI-JEN WU
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE-MODE CROSSBAR CIRCUITS
- Publication number 20240355386
- Publication date Oct 24, 2024
- TetraMem Inc.
- Hengfang Zhu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT WORD LINES
- Publication number 20240355385
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY WITH LOW VOLTAGE OPERATION
- Publication number 20240355389
- Publication date Oct 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zheng-Jun Lin
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY AND OPERATING METHOD THEREOF
- Publication number 20240282372
- Publication date Aug 22, 2024
- Taiwan Semiconductor Memory INC.
- Steve S. CHUNG
- G11 - INFORMATION STORAGE

Array wherein the access device being a transistor

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor memory devices with different word lines

RRAM circuit

Cascoded sense amplifiers for self-selecting memory

Data processing method based on memristor array and electronic appa...

Semiconductor device

Method and related apparatus for improving memory cell performance...

Memory device, and integrated circuit device

Semiconductor memory

Dynamic inhibit voltage to reduce write power for random-access memory

Memory cell array circuit and method of forming the same

Signal processing apparatus and signal processing method

Semiconductor devices and hybrid transistors

Differential programming of two-terminal memory with intrinsic erro...

Semiconductor memory device and write method thereof

Crossbar array with reduced disturbance

Variable resistance nonvolatile storage device and write method the...

Resistive memory

Resistive change element arrays

Hybrid resistive memory

Memory device with a split pillar architecture

Memory cell array circuit and method of forming the same

Technologies for controlling current through memory cells

Three dimensional stacked semiconductor memory

Resistive memory device for matrix-vector multiplications

Phase-change memory including phase-change elements in series with...

Memory cell selector for high-voltage set and reset operations

Method for programming an array of resistive memory cells

Memory device including a plurality of stacked memory cells

RRAM memory cell with multiple filaments

Circuitry for parallel set and reset of resistive random-access mem...

Patents Applicationslast 30 patents

CROSSBAR CIRCUITS FOR PERFORMING CONVOLUTION OPERATIONS

SEMICONDUCTOR DEVICE

MEMORY DEVICE WITH A SPLIT PILLAR ARCHITECTURE

CROSSBAR ARRAY WITH REDUCED DISTURBANCE

SEMICONDUCTOR DEVICES AND HYBRID TRANSISTORS

MULTI-STEP PROGRAMMING SCHEMES FOR PROGRAMMING CROSSBAR CIRCUITS

A Semiconductor Device

MEMORY CELL ARRAY CIRCUIT AND METHOD OF FORMING THE SAME

DATA PROCESSING METHOD BASED ON MEMRISTOR ARRAY, AND ELECTRONIC APP...

BIT-SERIAL INPUT SCHEMES FOR CROSSBAR CIRCUITS

MEMORY CONTROL CIRCUIT CAPABLE OF GENERATING AN UPDATED REFERENCE C...

CROSSBAR CIRCUITS INCLUDING RRAM DEVICES WITH MINIMIZED WRITE DISTU...

DATA WRITING OPERATION METHOD AND DEVICE FOR RESISTIVE RANDOM ACCES...

PROCESS FOR COINTEGRATION OF TWO PHASE CHANGE MEMORY (PCM) ARRAYS H...

TRANSIMPEDANCE AMPLIFIERS FOR CROSSBAR CIRCUITS

SUPPRESSING RANDOM TELEGRAPH NOISE IN CROSSBAR CIRCUITS

RESISTIVE RANDOM ACCESS MEMORY UNIT WITH ONE-WAY CONDUCTION CHARACT...

CONDUCTANCE RANGE OPTIMIZATION

PHASE-CHANGE MEMORY INCLUDING PHASE-CHANGE ELEMENTS IN SERIES WITH...

COMPUTATION CIRCUIT UNIT, NEURAL NETWORK COMPUTATION CIRCUIT, AND M...

MEMORY CIRCUIT COMPRISING ELECTRONIC CELLS AND A CONTROL CIRCUIT

NEURAL NETWORK COMPUTATION CIRCUIT, CONTROL CIRCUIT THEREFOR, AND C...

ANALOG IN-MEMORY DISCRETE SIGNAL PROCESSOR WITH MINIMUM USAGE OF ADC

IN-MEMORY COMPUTATION DEVICE FOR IMPLEMENTING AT LEAST A MULTILAYER...

CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE

RANDOM ACCESS MEMORY APPARATUS, MEMORY SYSTEM, AND METHOD FOR OPERA...

VOLTAGE-MODE CROSSBAR CIRCUITS

SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENT WORD LINES

RESISTIVE MEMORY WITH LOW VOLTAGE OPERATION

RESISTIVE MEMORY AND OPERATING METHOD THEREOF