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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

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Patents Grantslast 30 patents

Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared memory for intelligent network interface cards
- Patent number 12,204,471
- Issue date Jan 21, 2025
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware coherence signaling protocol
- Patent number 12,197,331
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerance and coherence for shared memory
- Patent number 12,189,532
- Issue date Jan 7, 2025
- Western Digital Technologies, Inc.
- Dejan Vucinic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-kernel cache request queuing for distributed cache
- Patent number 12,182,022
- Issue date Dec 31, 2024
- Western Digital Tehcnologies, Inc.
- Marjan Radi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual network pre-arbitration for deadlock avoidance and enhanced...
- Patent number 12,182,398
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory migration and page fault avoidance
- Patent number 12,182,032
- Issue date Dec 31, 2024
- Google LLC
- Prashanth Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for event messages in a cache coherent interconnect
- Patent number 12,164,428
- Issue date Dec 10, 2024
- ARTERIS, INC.
- Michael Frank
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Region based split-directory scheme to adapt to large cache sizes
- Patent number 12,158,845
- Issue date Dec 3, 2024
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,159,030
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Global coherence operations
- Patent number 12,141,601
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip packet caching apparatus, method and computer-readable medi...
- Patent number 12,135,650
- Issue date Nov 5, 2024
- SANECHIPS TECHNOLOGY CO., LTD.
- Weichao Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache systems with different address domains
- Patent number 12,135,651
- Issue date Nov 5, 2024
- ARM Limited
- Olof Henrik Uhrenholt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherence shared state suppression
- Patent number 12,135,646
- Issue date Nov 5, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive cache indexing for a storage device
- Patent number 12,105,629
- Issue date Oct 1, 2024
- Samsung Electronics Co., Ltd.
- Zongwang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ferroelectric memory chiplet in a multi-dimensional packaging with...
- Patent number 12,086,410
- Issue date Sep 10, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive credit-based replenishment threshold used for transaction...
- Patent number 12,079,471
- Issue date Sep 3, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ferroelectric memory chiplet in a multi-dimensional packaging
- Patent number 12,079,475
- Issue date Sep 3, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to enter and exit a cache coherent interconnect
- Patent number 12,072,805
- Issue date Aug 27, 2024
- ARTERIS, INC.
- Mohammed Khaleeluddin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tag update bus for updated coherence state
- Patent number 12,056,051
- Issue date Aug 6, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for establishing a distributed network without a...
- Patent number 12,056,053
- Issue date Aug 6, 2024
- MasterCard International Incorporated
- Stephen Higgins
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENT MEMORY SYSTEM
- Publication number 20250028642
- Publication date Jan 23, 2025
- Samsung Electronics Co., Ltd.
- Krishna T. MALLADI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GLOBAL COHERENCE OPERATIONS
- Publication number 20250028551
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCE SHARED STATE SUPPRESSION
- Publication number 20250013569
- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPACT REPRESENTATION OF TRANSITION SEQUENCES FOR SINGLE-STATE STO...
- Publication number 20250004946
- Publication date Jan 2, 2025
- International Business Machines Corporation
- Elaine R. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCK-FREE READ ACCESS TO VECTOR DATA STRUCTURES
- Publication number 20250004642
- Publication date Jan 2, 2025
- Christian BENSBERG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Copy in Mesh Networks
- Publication number 20240427702
- Publication date Dec 26, 2024
- Google LLC
- Roi Yosef Leibowitch Ben Ari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SNOOP FILTER WITH DISAGGREGATED VECTOR TABLE
- Publication number 20240419594
- Publication date Dec 19, 2024
- Microsoft Technology Licensing, LLC
- Jason Lawrence PANAVICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENT HIERARCHICAL CACHE LINE TRACKING
- Publication number 20240419595
- Publication date Dec 19, 2024
- Akeana, Inc.
- Sanjay Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHING STRATEGY DETERMINATION AND INJECTION
- Publication number 20240419596
- Publication date Dec 19, 2024
- SAP SE
- Joachim Goennheimer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCE USING DYNAMIC COARSE-GRAINED TRACKING
- Publication number 20240403219
- Publication date Dec 5, 2024
- Microsoft Technology Licensing, LLC
- Dimitrios KASERIDIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF FORMING FERROELECTRIC CHIPLET IN A MULTI-DIMENSIONAL PACK...
- Publication number 20240402908
- Publication date Dec 5, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER SYSTEM, METHOD FOR COMPUTER SYSTEM, AND READABLE STORAGE M...
- Publication number 20240370374
- Publication date Nov 7, 2024
- Alibaba Innovation Private Limited
- Jiacheng MA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing Device, Data Processing Method and System, and Related De...
- Publication number 20240362165
- Publication date Oct 31, 2024
- Huawei Cloud Computing Technologies Co., Ltd.
- Xiao Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY DEVICE AND METHOD FOR IMPLEMENTING CACHE SCHEDULING US...
- Publication number 20240354252
- Publication date Oct 24, 2024
- MetisX CO., Ltd.
- Do Hun KIM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Migration and Page Fault Avoidance
- Publication number 20240354257
- Publication date Oct 24, 2024
- Google LLC
- Prashanth Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO-RANDOM WAY SELECTION
- Publication number 20240345868
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG UPDATE BUS FOR UPDATED COHERENCE STATE
- Publication number 20240345956
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL CACHE SECURITY
- Publication number 20240320154
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FERROELECTRIC MEMORY CHIPLET IN A MULTI-DIMENSIONAL PACKAGING WITH...
- Publication number 20240311006
- Publication date Sep 19, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CXL MEMORY MODULE, MEMORY DATA SWAP METHOD AND COMPUTER SYSTEM
- Publication number 20240311305
- Publication date Sep 19, 2024
- Beijing Superstring Academy of Memory Technology
- Jin DAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE ARBITRATION
- Publication number 20240281278
- Publication date Aug 22, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR SYSTEM INCLUDING TABLE-BASED MEMORY PROTECTION FOR IMPROV...
- Publication number 20240273030
- Publication date Aug 15, 2024
- QUALCOMM Incorporated
- James BALL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVELY MIGRATING WRITE DATA BETWEEN CACHES OF DIFFERENT STORAG...
- Publication number 20240248845
- Publication date Jul 25, 2024
- International Business Machines Corporation
- Gang LYU
- G06 - COMPUTING CALCULATING COUNTING

Associative directories

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Aggressive write flush scheme for a victim cache

Shared memory for intelligent network interface cards

Methods and apparatus to reduce bank pressure using aggressive writ...

Hardware coherence signaling protocol

Fault tolerance and coherence for shared memory

Fully pipelined read-modify-write support

In-kernel cache request queuing for distributed cache

Methods and apparatus for allocation in a victim cache system

Virtual network pre-arbitration for deadlock avoidance and enhanced...

Memory migration and page fault avoidance

System and method for event messages in a cache coherent interconnect

Region based split-directory scheme to adapt to large cache sizes

Multicore shared cache operation engine

Methods and apparatus for read-modify-write support in multi-banked...

Global coherence operations

Victim cache with dynamic allocation of entries

Atomic operations and histogram operations in a cache pipeline

Configurable cache for coherent system

On-chip packet caching apparatus, method and computer-readable medi...

Cache systems with different address domains

Cache coherence shared state suppression

Methods and apparatus for eviction in dual datapath victim cache sy...

Adaptive cache indexing for a storage device

Ferroelectric memory chiplet in a multi-dimensional packaging with...

Adaptive credit-based replenishment threshold used for transaction...

Ferroelectric memory chiplet in a multi-dimensional packaging

System and method to enter and exit a cache coherent interconnect

Methods and apparatus to facilitate read-modify-write support in a...

Tag update bus for updated coherence state

Method and system for establishing a distributed network without a...

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

COHERENT MEMORY SYSTEM

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

GLOBAL COHERENCE OPERATIONS

CACHE COHERENCE SHARED STATE SUPPRESSION

COMPACT REPRESENTATION OF TRANSITION SEQUENCES FOR SINGLE-STATE STO...

LOCK-FREE READ ACCESS TO VECTOR DATA STRUCTURES

Memory Copy in Mesh Networks

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

SNOOP FILTER WITH DISAGGREGATED VECTOR TABLE

COHERENT HIERARCHICAL CACHE LINE TRACKING

CACHING STRATEGY DETERMINATION AND INJECTION

CACHE COHERENCE USING DYNAMIC COARSE-GRAINED TRACKING

METHOD OF FORMING FERROELECTRIC CHIPLET IN A MULTI-DIMENSIONAL PACK...

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

COMPUTER SYSTEM, METHOD FOR COMPUTER SYSTEM, AND READABLE STORAGE M...

Computing Device, Data Processing Method and System, and Related De...

CACHE MEMORY DEVICE AND METHOD FOR IMPLEMENTING CACHE SCHEDULING US...

Memory Migration and Page Fault Avoidance

PSEUDO-RANDOM WAY SELECTION

TAG UPDATE BUS FOR UPDATED COHERENCE STATE

MULTI-LEVEL CACHE SECURITY

FERROELECTRIC MEMORY CHIPLET IN A MULTI-DIMENSIONAL PACKAGING WITH...

CXL MEMORY MODULE, MEMORY DATA SWAP METHOD AND COMPUTER SYSTEM

VICTIM CACHE WITH WRITE MISS MERGING

PIPELINE ARBITRATION

PROCESSOR SYSTEM INCLUDING TABLE-BASED MEMORY PROTECTION FOR IMPROV...

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

SELECTIVELY MIGRATING WRITE DATA BETWEEN CACHES OF DIFFERENT STORAG...