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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for sequencing multiply-accumulate operations
- Patent number 10,572,224
- Issue date Feb 25, 2020
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 10,417,004
- Issue date Sep 17, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing method, processor, and data processing device
- Patent number 10,025,752
- Issue date Jul 17, 2018
- Huawei Technologies Co., Ltd.
- Nan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for sequencing multiply-accumulate operations
- Patent number 10,019,234
- Issue date Jul 10, 2018
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 9,747,110
- Issue date Aug 29, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC's with large carry chains
- Patent number 9,489,175
- Issue date Nov 8, 2016
- Altera Corporation
- Herman Schmit
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable IC's with large carry chains
- Patent number 8,797,062
- Issue date Aug 5, 2014
- Tabula, Inc.
- Herman Schmit
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable IC'S with large carry chains
- Patent number 8,248,102
- Issue date Aug 21, 2012
- Tabula, Inc.
- Jason Redgrave
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low latency request dispatcher
- Patent number 8,131,950
- Issue date Mar 6, 2012
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier and arithmetic unit
- Patent number 8,041,758
- Issue date Oct 18, 2011
- NEC Computer Techno, Ltd.
- Takashi Osada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency request dispatcher
- Patent number 8,001,335
- Issue date Aug 16, 2011
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically fusing instructions at executi...
- Patent number 7,818,550
- Issue date Oct 19, 2010
- International Business Machines Corporation
- Michael Thomas Vaden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency request dispatcher
- Patent number 7,814,283
- Issue date Oct 12, 2010
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing calculation operations and a device
- Patent number 7,774,400
- Issue date Aug 10, 2010
- Nokia Corporation
- David Guevorkian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC with large carry chains
- Patent number 7,743,085
- Issue date Jun 22, 2010
- Tabula, Inc.
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC with configurable routing resources that have asymm...
- Patent number 7,573,296
- Issue date Aug 11, 2009
- Tabula Inc.
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power array multiplier
- Patent number 7,546,331
- Issue date Jun 9, 2009
- QUALCOMM Incorporated
- Farhad Fuad Islam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power saving in a floating point unit using a multiplier and aligne...
- Patent number 7,058,830
- Issue date Jun 6, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency request dispatcher
- Patent number 7,039,770
- Issue date May 2, 2006
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise invariant circuits, systems and methods
- Patent number 6,950,840
- Issue date Sep 27, 2005
- Cirrus Logic, Inc.
- Edwin De Angel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise invariant circuits, systems and methods
- Patent number 6,901,423
- Issue date May 31, 2005
- Cirrus Logic, Inc.
- Edwin De Angel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point adder
- Patent number 6,889,241
- Issue date May 3, 2005
- Intel Corporation
- Amaresh Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ARITHMETIC UNIT, DIGITAL SIGNAL PROCESSOR, METHOD OF SCHEDULING MUL...
- Patent number 6,427,159
- Issue date Jul 30, 2002
- Koninklijke Philips Electronics N.V.
- Olivier Giaume
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic 3-level partial result merge adder
- Patent number 6,334,136
- Issue date Dec 25, 2001
- Intrinsity, Inc.
- James S. Blomgren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline information processing circuit for floating point operations
- Patent number 5,590,365
- Issue date Dec 31, 1996
- Kabushiki Kaisha Toshiba
- Nobuhiro Ide
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for providing selectable fractional output signals
- Patent number 5,255,213
- Issue date Oct 19, 1993
- Apple Computer, Inc.
- Steven C. Wasserman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic circuit including input and output registers with data bypass...
- Patent number 5,165,034
- Issue date Nov 17, 1992
- Kabushiki Kaisha Toshiba
- Akira Kanuma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for using an ALU as a temporary storage for data during a...
- Patent number 5,125,094
- Issue date Jun 23, 1992
- Kabushiki Kaisha Toshiba
- Yuriko Kyuma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation circuit based on floating-point representation with selec...
- Patent number 4,977,534
- Issue date Dec 11, 1990
- Fujitsu Limited
- Hiromasa Takahashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fixed-point multiplier-accumulator architecture
- Patent number 4,876,660
- Issue date Oct 24, 1989
- Bipolar Integrated Technology, Inc.
- Robert E. Owen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS
- Publication number 20180349098
- Publication date Dec 6, 2018
- Intel Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS
- Publication number 20170322813
- Publication date Nov 9, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE IC'S WITH LARGE CARRY CHAINS
- Publication number 20130038347
- Publication date Feb 14, 2013
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY REQUEST DISPATCHER
- Publication number 20110208926
- Publication date Aug 25, 2011
- Juniper Networks, Inc.
- Devereaux C. CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE IC'S WITH LARGE CARRY CHAINS
- Publication number 20110031998
- Publication date Feb 10, 2011
- Jason Redgrave
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY REQUEST DISPATCHER
- Publication number 20110010474
- Publication date Jan 13, 2011
- Juniper Networks, Inc.
- Devereaux C. CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Dynamically Fusing Instructions at Executi...
- Publication number 20090031120
- Publication date Jan 29, 2009
- IBM Corporation
- Michael Thomas Vaden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic device and arithmetic method
- Publication number 20080307029
- Publication date Dec 11, 2008
- FUJITSU LIMITED
- Ryuji Kan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC's with large carry chains
- Publication number 20070244960
- Publication date Oct 18, 2007
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC with configurable routing resources that have asymm...
- Publication number 20070244961
- Publication date Oct 18, 2007
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC's with dual carry chains
- Publication number 20070244959
- Publication date Oct 18, 2007
- Steven Teig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC's with carry bypass circuitry
- Publication number 20070244958
- Publication date Oct 18, 2007
- Jason Redgrave
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplier and arithmetic unit
- Publication number 20070203964
- Publication date Aug 30, 2007
- NEC Corporation
- Takashi Osada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Power array multiplier
- Publication number 20060212505
- Publication date Sep 21, 2006
- Farhad Fuad Islam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Noise invariant circuits, systems and methods
- Publication number 20040199563
- Publication date Oct 7, 2004
- Edwin De Angel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power saving in a floating point unit using a multiplier and aligne...
- Publication number 20040186870
- Publication date Sep 23, 2004
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for performing calculation operations and a device
- Publication number 20040148321
- Publication date Jul 29, 2004
- Nokia Corporation
- David Guevorkian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Elimination of rounding step in the short path of a floating point...
- Publication number 20030115236
- Publication date Jun 19, 2003
- Ajay Naini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating point adder
- Publication number 20020184285
- Publication date Dec 5, 2002
- Intel Corporation
- Amaresh Pangal
- G06 - COMPUTING CALCULATING COUNTING

Bypass control

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus for sequencing multiply-accumulate operations

Pipelined cascaded digital signal processing structures and methods

Data processing method, processor, and data processing device

Methods and apparatus for sequencing multiply-accumulate operations

Pipelined cascaded digital signal processing structures and methods

Configurable IC's with large carry chains

Configurable IC's with large carry chains

Configurable IC'S with large carry chains

Low latency request dispatcher

Multiplier and arithmetic unit

Low latency request dispatcher

Method and apparatus for dynamically fusing instructions at executi...

Low latency request dispatcher

Method and system for performing calculation operations and a device

Configurable IC with large carry chains

Configurable IC with configurable routing resources that have asymm...

Low power array multiplier

Power saving in a floating point unit using a multiplier and aligne...

Low latency request dispatcher

Noise invariant circuits, systems and methods

Noise invariant circuits, systems and methods

Floating point adder

ARITHMETIC UNIT, DIGITAL SIGNAL PROCESSOR, METHOD OF SCHEDULING MUL...

Dynamic 3-level partial result merge adder

Pipeline information processing circuit for floating point operations

Apparatus for providing selectable fractional output signals

Logic circuit including input and output registers with data bypass...

Apparatus for using an ALU as a temporary storage for data during a...

Operation circuit based on floating-point representation with selec...

Fixed-point multiplier-accumulator architecture

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS

PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS

CONFIGURABLE IC'S WITH LARGE CARRY CHAINS

LOW LATENCY REQUEST DISPATCHER

CONFIGURABLE IC'S WITH LARGE CARRY CHAINS

LOW LATENCY REQUEST DISPATCHER

Method and Apparatus for Dynamically Fusing Instructions at Executi...

Arithmetic device and arithmetic method

Configurable IC's with large carry chains

Configurable IC with configurable routing resources that have asymm...

Configurable IC's with dual carry chains

Configurable IC's with carry bypass circuitry

Multiplier and arithmetic unit

Low Power array multiplier

Noise invariant circuits, systems and methods

Power saving in a floating point unit using a multiplier and aligne...

Method and system for performing calculation operations and a device

Elimination of rounding step in the short path of a floating point...

Floating point adder