characterised by the elements used

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CPC
H03M7/001

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HELECTRICITY H03Electronic circuits H03MCODING DECODING CODE CONVERSION IN GENERAL H03M7/00Conversion of a code where information is represented by a given sequence or number of digits to a code where the same information or similar information or a subset of information is represented by a different sequence or number of digits

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H03M7/001characterised by the elements used

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for signal saturation
- Patent number 9,379,735
- Issue date Jun 28, 2016
- MBIT WIRELESS, INC.
- Bhaskar Patel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Decoder of a data from a subgroup of P data belonging to a group of...
- Patent number 4,575,708
- Issue date Mar 11, 1986
- Societe pour L'Etude et la Fabrication de Circuits Integres Speciaux EFCIS
- Jacques Meyer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel counter and application to binary adders
- Patent number 4,488,253
- Issue date Dec 11, 1984
- ITT Industries, Inc.
- Claude P. H. Lerouge
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Format switch
- Patent number 4,364,025
- Issue date Dec 14, 1982
- Honeywell Information Systems Inc.
- Christopher J. Dalton
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic digital gain ranging system
- Patent number 4,305,063
- Issue date Dec 8, 1981
- Grumman Aerospace Corp.
- Edmund G. Hanson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Device for reducing irrational-base codes to minimal form
- Patent number 4,290,051
- Issue date Sep 15, 1981
- Alexei P. Stakhov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Transmission and/or recording of digital signals
- Patent number 4,216,460
- Issue date Aug 5, 1980
- Independent Broadcasting Authority
- John L. E. Baldwin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular modulo 3 module
- Patent number 4,190,893
- Issue date Feb 26, 1980
- Burroughs Corporation
- Daniel D. Gajski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary coded decimal addressed Read-Only-Memory
- Patent number 4,190,897
- Issue date Feb 26, 1980
- Texas Instruments Incorporated
- Ashok H. Someshwar
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrically configurable high-low decoder
- Patent number 4,177,455
- Issue date Dec 4, 1979
- NCR Corporation
- Rolfe D. Armstrong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic CMOS transistor circuits
- Patent number 4,140,924
- Issue date Feb 20, 1979
- Centre Electronique Horloger S.A.
- Henri J. Oguey
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital information conversion system
- Patent number 4,125,832
- Issue date Nov 14, 1978
- Canon Kabushiki Kaisha
- Nobuhiko Shinoda
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Matrix circuits
- Patent number 4,093,942
- Issue date Jun 6, 1978
- Tokyo Shibaura Electric Co., Ltd.
- Yasoji Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Threshold decoder
- Patent number 4,087,811
- Issue date May 2, 1978
- International Business Machines Corporation
- Arnold Weinberger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optical Gray to binary code converter
- Patent number 4,055,841
- Issue date Oct 25, 1977
- Bell Telephone Laboratories, Incorporated
- Charles David Crawford
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System for generating a character pattern
- Patent number 4,051,457
- Issue date Sep 27, 1977
- Hitachi, Ltd.
- Fumiyuki Inose
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
MOS dynamic random access memory having an improved address decoder...
- Patent number 4,042,915
- Issue date Aug 16, 1977
- National Semiconductor Corporation
- John A. Reed
- G11 - INFORMATION STORAGE
Information Patent Grant
Gearshift position indicator
- Patent number 4,037,196
- Issue date Jul 19, 1977
- Atkinson; Steven B.
- Steven B. Atkinson
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
CMOS comparator
- Patent number 4,031,511
- Issue date Jun 21, 1977
- Westinghouse Electric Corporation
- James S. Britton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Changeable decoder structure for a folded logic array
- Patent number 4,029,970
- Issue date Jun 14, 1977
- IBM Corporation
- Se J. Hong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic decoder circuit
- Patent number 4,027,174
- Issue date May 31, 1977
- Toko Incorporated
- Yoshihiro Ogata
- G11 - INFORMATION STORAGE
Information Patent Grant
Decode circuitry for bipolar random access memory
- Patent number 4,027,285
- Issue date May 31, 1977
- Motorola, Inc.
- Michael S. Millhollan
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoder structure for a folded logic array
- Patent number 4,025,799
- Issue date May 24, 1977
- IBM Corporation
- Dennis T. Cox
- G11 - INFORMATION STORAGE
Information Patent Grant
Select line hold down circuit for MOS memory decoder
- Patent number 4,011,549
- Issue date Mar 8, 1977
- Motorola, Inc.
- Alan Richard Bormann
- G11 - INFORMATION STORAGE
Information Patent Grant
Acoustic residue algebra decoder
- Patent number 3,990,072
- Issue date Nov 2, 1976
- Xerox Corporation
- David K. Biegelsen
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
SIGMA-DELTA MULTIPLIER, PHASE-LOCKED LOOP WITH EXTENDED TUNING RANG...
- Publication number 20080258942
- Publication date Oct 23, 2008
- Infineon Technologies AG
- Tony Gschier
- H03 - BASIC ELECTRONIC CIRCUITRY

characterised by the elements used

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method and apparatus for signal saturation

Decoder of a data from a subgroup of P data belonging to a group of...

Parallel counter and application to binary adders

Format switch

Automatic digital gain ranging system

Device for reducing irrational-base codes to minimal form

Transmission and/or recording of digital signals

Modular modulo 3 module

Binary coded decimal addressed Read-Only-Memory

Electrically configurable high-low decoder

Logic CMOS transistor circuits

Digital information conversion system

Matrix circuits

Threshold decoder

Optical Gray to binary code converter

System for generating a character pattern

MOS dynamic random access memory having an improved address decoder...

Gearshift position indicator

CMOS comparator

Changeable decoder structure for a folded logic array

Dynamic decoder circuit

Decode circuitry for bipolar random access memory

Decoder structure for a folded logic array

Select line hold down circuit for MOS memory decoder

Acoustic residue algebra decoder

Patents Applicationslast 30 patents

SIGMA-DELTA MULTIPLIER, PHASE-LOCKED LOOP WITH EXTENDED TUNING RANG...