Circuits for erasing electrically

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GPHYSICS G11Information storage G11CSTATIC STORES G11C16/00Erasable programmable read-only memories

Current Industry

G11C16/14Circuits for erasing electrically

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Write performance optimization for erase on demand
- Patent number 12,170,115
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Meng Wei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile semiconductor storage device
- Patent number 12,159,679
- Issue date Dec 3, 2024
- Renesas Electronics Corporation
- Junichi Suzuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-time programmable non-volatile memory cell and memory with lo...
- Patent number 12,154,629
- Issue date Nov 26, 2024
- CHENGDU ANALOG CIRCUIT TECHNOLOGY INC.
- Dan Ning
- G11 - INFORMATION STORAGE
Information Patent Grant
Erase method for non-volatile memory with multiple tiers
- Patent number 12,148,478
- Issue date Nov 19, 2024
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 12,148,479
- Issue date Nov 19, 2024
- Kioxia Corporation
- Yuki Sakaguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods including source gates
- Patent number 12,148,474
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory sub-system scan
- Patent number 12,148,484
- Issue date Nov 19, 2024
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory cell with single poly, floating gate extending...
- Patent number 12,148,473
- Issue date Nov 19, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Roberto Bregoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device capable of reducing program disturbance and erasing m...
- Patent number 12,142,327
- Issue date Nov 12, 2024
- Yangtze Memory Technologies Co., Ltd.
- Qiang Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device including active regions for reducing d...
- Patent number 12,137,557
- Issue date Nov 5, 2024
- SK hynix Inc.
- Sung Kun Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D memory device including shared select gate connections between m...
- Patent number 12,131,782
- Issue date Oct 29, 2024
- Aaron Yip
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device with multiple clocks
- Patent number 12,125,544
- Issue date Oct 22, 2024
- Samsung Electronics Co., Ltd.
- You-Se Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture for serial EEPROMs
- Patent number 12,125,532
- Issue date Oct 22, 2024
- STMicroelectronics (Rousset) SAS
- Laurent Murillo
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with zoned control for limiting programming for...
- Patent number 12,119,065
- Issue date Oct 15, 2024
- SanDisk Technoloiges LLC
- Xiaochen Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 12,112,807
- Issue date Oct 8, 2024
- Kioxia Corporation
- Mina Hatakeyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device and a method for operating the same
- Patent number 12,112,056
- Issue date Oct 8, 2024
- Samsung Electronics Co., Ltd.
- Sang-Hyun Joo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and asynchronous multi-plane independent read operati...
- Patent number 12,106,810
- Issue date Oct 1, 2024
- Yangtze Memory Technologies Co., Ltd.
- Jialiang Deng
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and erasing and verification method thereof
- Patent number 12,100,456
- Issue date Sep 24, 2024
- Yangtze Memory Technologies Co., Ltd.
- Kaiwei Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with charge transfer reduction transistor
- Patent number 12,094,539
- Issue date Sep 17, 2024
- Lapis Semiconductor Co., Ltd.
- Taku Shibaguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture and method for NAND memory operation
- Patent number 12,094,538
- Issue date Sep 17, 2024
- Yangtze Memory Technologies Co., Ltd.
- Kaijin Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Defect detection during erase operations
- Patent number 12,094,549
- Issue date Sep 17, 2024
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional nonvolatile memory cell structure
- Patent number RE50124
- Issue date Sep 10, 2024
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
Information Patent Grant
Semiconductor memory device
- Patent number 12,086,465
- Issue date Sep 10, 2024
- Kioxia Corporation
- Yoshikazu Harada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage level shifter and operation method thereof
- Patent number 12,088,294
- Issue date Sep 10, 2024
- Ememory Technology Inc.
- Yu-Hsuan Cheng
- G11 - INFORMATION STORAGE
Information Patent Grant
Preventing erase disturb in NAND
- Patent number 12,087,371
- Issue date Sep 10, 2024
- SanDisk Technologies LLC
- Yanli Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of improving read current stability in analog non-volatile m...
- Patent number 12,080,355
- Issue date Sep 3, 2024
- Silicon Storage Technology, Inc.
- Viktor Markov
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile semiconductor memory device which performs improved era...
- Patent number 12,080,354
- Issue date Sep 3, 2024
- Kioxia Corporation
- Jun Nakai
- G11 - INFORMATION STORAGE
Information Patent Grant
Processing element and electronic device including processing element
- Patent number 12,073,878
- Issue date Aug 27, 2024
- Samsung Electronics Co., Ltd.
- Keewon Kwon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile semiconductor memory device including a memory cell arr...
- Patent number 12,068,040
- Issue date Aug 20, 2024
- Kioxia Corporation
- Yasuhiro Shiino
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and operating method thereof
- Patent number 12,068,045
- Issue date Aug 20, 2024
- SK hynix Inc.
- Hyung Jin Choi
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CELL, THREE-DIMENSIONAL MEMORY, AND METHOD OF OPERATING THRE...
- Publication number 20240421032
- Publication date Dec 19, 2024
- Institute of Microelectronics, Chinese Academy of Sciences
- Gang ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH PERFORMS IMPROVED ERA...
- Publication number 20240420774
- Publication date Dec 19, 2024
- KIOXIA Corporation
- Jun NAKAI
- G11 - INFORMATION STORAGE
Information Patent Application
OPERATION METHOD FOR THREE-DIMENSIONAL FLASH MEMORY INCLUDING FERRO...
- Publication number 20240404602
- Publication date Dec 5, 2024
- IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
- Yun Heub SONG
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH DECLINE STATE OPERATION
- Publication number 20240404608
- Publication date Dec 5, 2024
- Western Digital Technologies, Inc.
- Liang Li
- G11 - INFORMATION STORAGE
Information Patent Application
DEFECT DETECTION DURING ERASE OPERATIONS
- Publication number 20240404615
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Jun Xu
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROL CIRCUIT AND CONTROL METHOD THEREOF
- Publication number 20240404603
- Publication date Dec 5, 2024
- NUVOTON TECHNOLOGY CORPORATION
- Wei-Ling LIN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20240402947
- Publication date Dec 5, 2024
- KIOXIA Corporation
- Yoshikazu HARADA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE AND METHOD FOR NAND MEMORY OPERATION
- Publication number 20240395331
- Publication date Nov 28, 2024
- Yangtze Memory Technologies Co., Ltd.
- Kaijin HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES HAVING SOURCE LINES DIRECTLY COUPLED TO BODY REGIONS...
- Publication number 20240386966
- Publication date Nov 21, 2024
- Lodestar Licensing Group, LLC
- Akira Goda
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL NOR MEMORY ARRAY OF THIN-FILM FERROELECTRIC MEMOR...
- Publication number 20240379160
- Publication date Nov 14, 2024
- Sunrise Memory Corporation
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND OPERATING METHOD OF THE SAME
- Publication number 20240379163
- Publication date Nov 14, 2024
- SK HYNIX INC.
- Ho Kyun JANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE
- Publication number 20240379167
- Publication date Nov 14, 2024
- SK HYNIX INC.
- Moon Sik SEO
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND ASYNCHRONOUS MULTI-PLANE INDEPENDENT READ OPERATI...
- Publication number 20240371446
- Publication date Nov 7, 2024
- Yangtze Memory Technologies Co., Ltd.
- Jialiang Deng
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20240371451
- Publication date Nov 7, 2024
- SK HYNIX INC.
- Hyung Jin CHOI
- G11 - INFORMATION STORAGE
Information Patent Application
PLANE AND BLOCK LOCATION DEPENDENT VOLTAGE BIASES IN NAND MEMORY
- Publication number 20240363168
- Publication date Oct 31, 2024
- Western Digital Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
FULL SEQUENCE PROGRAM FOR EDGE WORD LINE QUAD-LEVEL MEMORY CELLS
- Publication number 20240363167
- Publication date Oct 31, 2024
- Western Digital Technologies, Inc.
- Sisi Yang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND ERASING AND VERIFICATION METHOD THEREOF
- Publication number 20240363169
- Publication date Oct 31, 2024
- Yangtze Memory Technologies Co., Ltd.
- Kaiwei Li
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY CELL, WRITING METHOD AND ERASING METHOD THEREFOR
- Publication number 20240355396
- Publication date Oct 24, 2024
- Beijing PXMicro Technology Co. Ltd.
- Jiayong Jiang
- G11 - INFORMATION STORAGE
Information Patent Application
TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20240347645
- Publication date Oct 17, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Chu LIN
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING A MEMORY CELL ARR...
- Publication number 20240347113
- Publication date Oct 17, 2024
- KIOXIA Corporation
- Yasuhiro SHIINO
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY DEVICE AND METHOD THEREOF
- Publication number 20240339547
- Publication date Oct 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jiun-Yun LI
- G11 - INFORMATION STORAGE
Information Patent Application
LAYOUT STRUCTURE OF DIFFERENTIAL LINES, MEMORY STORAGE DEVICE AND M...
- Publication number 20240312949
- Publication date Sep 19, 2024
- PHISON ELECTRONICS CORP.
- Kang-Yun Yang
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS FOR CONTROLLING NAND FLASH MEMORY DEVICE AND METHOD FOR C...
- Publication number 20240290397
- Publication date Aug 29, 2024
- LG Innotek Co., Ltd.
- Sang Hoon SHIN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND ERASING METHOD THEREOF
- Publication number 20240290400
- Publication date Aug 29, 2024
- WINBOND ELECTRONICS CORP.
- Ying-Shan KUO
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
- Publication number 20240282384
- Publication date Aug 22, 2024
- KIOXIA Corporation
- Takashi MAEDA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM
- Publication number 20240282389
- Publication date Aug 22, 2024
- KIOXIA Corporation
- Hiroyuki NAGASHIMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...
- Publication number 20240282369
- Publication date Aug 22, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...
- Publication number 20240274186
- Publication date Aug 15, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY WITH HIGH INTEGRATION
- Publication number 20240274196
- Publication date Aug 15, 2024
- WINBOND ELECTRONICS CORP.
- Riichiro Shirota
- G11 - INFORMATION STORAGE
Information Patent Application
NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...
- Publication number 20240274187
- Publication date Aug 15, 2024
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING

Circuits for erasing electrically

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Write performance optimization for erase on demand

Non-volatile semiconductor storage device

Multi-time programmable non-volatile memory cell and memory with lo...

Erase method for non-volatile memory with multiple tiers

Semiconductor memory device

Apparatus and methods including source gates

Memory sub-system scan

Non-volatile memory cell with single poly, floating gate extending...

Memory device capable of reducing program disturbance and erasing m...

Semiconductor memory device including active regions for reducing d...

3D memory device including shared select gate connections between m...

Nonvolatile memory device with multiple clocks

Memory architecture for serial EEPROMs

Non-volatile memory with zoned control for limiting programming for...

Semiconductor storage device

Non-volatile memory device and a method for operating the same

Memory device and asynchronous multi-plane independent read operati...

Memory device and erasing and verification method thereof

Semiconductor memory with charge transfer reduction transistor

Architecture and method for NAND memory operation

Defect detection during erase operations

Three-dimensional nonvolatile memory cell structure

Semiconductor memory device

Voltage level shifter and operation method thereof

Preventing erase disturb in NAND

Method of improving read current stability in analog non-volatile m...

Nonvolatile semiconductor memory device which performs improved era...

Processing element and electronic device including processing element

Nonvolatile semiconductor memory device including a memory cell arr...

Semiconductor memory device and operating method thereof

Patents Applicationslast 30 patents

MEMORY CELL, THREE-DIMENSIONAL MEMORY, AND METHOD OF OPERATING THRE...

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE WHICH PERFORMS IMPROVED ERA...

OPERATION METHOD FOR THREE-DIMENSIONAL FLASH MEMORY INCLUDING FERRO...

NON-VOLATILE MEMORY WITH DECLINE STATE OPERATION

DEFECT DETECTION DURING ERASE OPERATIONS

CONTROL CIRCUIT AND CONTROL METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

ARCHITECTURE AND METHOD FOR NAND MEMORY OPERATION

MEMORY DEVICES HAVING SOURCE LINES DIRECTLY COUPLED TO BODY REGIONS...

THREE-DIMENSIONAL NOR MEMORY ARRAY OF THIN-FILM FERROELECTRIC MEMOR...

SEMICONDUCTOR DEVICE AND OPERATING METHOD OF THE SAME

MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE

MEMORY DEVICE AND ASYNCHRONOUS MULTI-PLANE INDEPENDENT READ OPERATI...

SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF

PLANE AND BLOCK LOCATION DEPENDENT VOLTAGE BIASES IN NAND MEMORY

FULL SEQUENCE PROGRAM FOR EDGE WORD LINE QUAD-LEVEL MEMORY CELLS

MEMORY DEVICE AND ERASING AND VERIFICATION METHOD THEREOF

FLASH MEMORY CELL, WRITING METHOD AND ERASING METHOD THEREFOR

TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE INCLUDING A MEMORY CELL ARR...

FLASH MEMORY DEVICE AND METHOD THEREOF

LAYOUT STRUCTURE OF DIFFERENTIAL LINES, MEMORY STORAGE DEVICE AND M...

APPARATUS FOR CONTROLLING NAND FLASH MEMORY DEVICE AND METHOD FOR C...

MEMORY DEVICE AND ERASING METHOD THEREOF

NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

MEMORY SYSTEM

NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...

NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...

FLASH MEMORY WITH HIGH INTEGRATION

NEURAL NETWORK CLASSIFIER USING ARRAY OF THREE-GATE NON-VOLATILE ME...