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Erasable programmable read-only memories
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G11C16/00
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Parent Industries
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PHYSICS
G11
Information storage
G11C
STATIC STORES
Current Industry
G11C16/00
Erasable programmable read-only memories
Sub Industries
G11C16/02
electrically programmable
G11C16/04
using variable threshold transistors
G11C16/0408
comprising cells containing floating gate transistors
G11C16/0416
comprising cells containing a single floating gate transistor and no select transistor
G11C16/0425
comprising cells containing a merged floating gate and select transistor
G11C16/0433
comprising cells containing a single floating gate transistor and one or more separate select transistors
G11C16/0441
comprising cells containing multiple floating gate devices
G11C16/045
Floating gate memory cells with both P and N channel memory transistors, usually sharing a common floating gate
G11C16/0458
comprising plural independent floating gates which store independent data
G11C16/0466
comprising cells with charge storage in an insulating layer
G11C16/0475
comprising plural independent storage sites which store independent data
G11C16/0483
comprising cells having several storage transistors connected in series
G11C16/0491
Virtual ground arrays
G11C16/06
Auxiliary circuits
G11C16/08
Address circuits Decoders Word-line control circuits
G11C16/10
Programming or data input circuits
G11C16/102
External programming circuits
G11C16/105
Circuits or methods for updating contents of nonvolatile memory, especially with 'security' features to ensure reliable replacement
G11C16/107
Programming all cells in an array, sector or block to the same state prior to flash erasing
G11C16/12
Programming voltage switching circuits
G11C16/14
Circuits for erasing electrically
G11C16/16
for erasing blocks
G11C16/18
Circuits for erasing optically
G11C16/20
Initialising Data preset Chip identification
G11C16/22
Safety or protection circuits preventing unauthorised or accidental access to memory cells
G11C16/225
Preventing erasure, programming or reading when power supply voltages are outside the required ranges
G11C16/24
Bit-line control circuits
G11C16/26
Sensing or reading circuits Data output circuits
G11C16/28
using differential sensing or reference cells
G11C16/30
Power supply circuits
G11C16/32
Timing circuits
G11C16/34
Determination of programming status
G11C16/3404
Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
G11C16/3409
Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
G11C16/3413
Circuits or methods to recover overprogrammed nonvolatile memory cells detected during program verification, usually by means of a "soft" erasing step
G11C16/3418
Disturbance prevention or evaluation; Refreshing of disturbed memory data
G11C16/3422
Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem
G11C16/3427
Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
G11C16/3431
Circuits or methods to detect disturbed nonvolatile memory cells
G11C16/3436
Arrangements for verifying correct programming or erasure
G11C16/344
Arrangements for verifying correct erasure or for detecting overerased cells
G11C16/3445
Circuits or methods to verify correct erasure of nonvolatile memory cells
G11C16/345
Circuits or methods to detect overerased nonvolatile memory cells, usually during erasure verification
G11C16/3454
Arrangements for verifying correct programming or for detecting overprogrammed cells
G11C16/3459
Circuits or methods to verify correct programming of nonvolatile memory cells
G11C16/3463
Circuits or methods to detect overprogrammed nonvolatile memory cells, usually during program verification
G11C16/3468
Prevention of overerasure or overprogramming
G11C16/3472
Circuits or methods to verify correct erasure of nonvolatile memory cells whilst erasing is in progress
G11C16/3477
Circuits or methods to prevent overerasing of nonvolatile memory cells
G11C16/3481
Circuits or methods to verify correct programming of nonvolatile memory cells whilst programming is in progress
G11C16/3486
Circuits or methods to prevent overprogramming of nonvolatile memory cells
G11C16/349
Arrangements for evaluating degradation, retention or wearout
G11C16/3495
Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices
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last 30 patents
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Issue date
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G11 - INFORMATION STORAGE
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Issue date
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Issue date
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Issue date
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G11 - INFORMATION STORAGE
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Data erasure verification for three-dimensional non-volatile memory
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Issue date
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G11 - INFORMATION STORAGE
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Issue date
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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12,211,913
Issue date
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G11 - INFORMATION STORAGE
Information
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Wordline or pillar state detection for faster read access times
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12,205,653
Issue date
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G11 - INFORMATION STORAGE
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Issue date
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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Semiconductor-element-including memory device
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Issue date
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G11 - INFORMATION STORAGE
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G06 - COMPUTING CALCULATING COUNTING
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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H01 - BASIC ELECTRIC ELEMENTS
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE
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G06 - COMPUTING CALCULATING COUNTING
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G11 - INFORMATION STORAGE
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G11 - INFORMATION STORAGE