Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem

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GPHYSICS G11Information storage G11CSTATIC STORES G11C16/00Erasable programmable read-only memories

Current Industry

G11C16/3422Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem

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Patents Grantslast 30 patents

Information Patent Grant
Data reading method, memory storage device, and memory control circ...
- Patent number 12,124,743
- Issue date Oct 22, 2024
- Phison Electronics Corp.
- Yu-Heng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Charge loss compensation during read operations in a memory device
- Patent number 12,057,174
- Issue date Aug 6, 2024
- Micron Technology, Inc.
- Vivek Venkata Kalluru
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device error detection with improved scanning
- Patent number 12,002,521
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Audit techniques for read disturb detection in an open memory block
- Patent number 11,862,260
- Issue date Jan 2, 2024
- SanDisk Technologies LLC
- Jiacen Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
Read sample offset bit determination in a memory sub-system
- Patent number 11,733,928
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three dimensional stacked nonvolatile semiconductor memory wherein...
- Patent number 11,727,993
- Issue date Aug 15, 2023
- Kioxia Corporation
- Hiroshi Maejima
- G11 - INFORMATION STORAGE
Information Patent Grant
Risk assessment method based on data priority, memory storage devic...
- Patent number 11,715,532
- Issue date Aug 1, 2023
- Hefei Core Storage Electronic Limited
- Chih-Ling Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjusting scan event thresholds to mitigate memory errors
- Patent number 11,709,633
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Gianni Stephen Alsasua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power reduction during open and erased block reads of memory based...
- Patent number 11,521,688
- Issue date Dec 6, 2022
- Western Digital Technologies, Inc.
- Nan Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional stacked nonvolatile semiconductor memory in which...
- Patent number 11,430,521
- Issue date Aug 30, 2022
- Kioxia Corporation
- Hiroshi Maejima
- G11 - INFORMATION STORAGE
Information Patent Grant
Determining a read voltage based on a change in a read window
- Patent number 11,430,528
- Issue date Aug 30, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Grant
Capacitance coupling parameter estimation in flash memories
- Patent number 11,430,529
- Issue date Aug 30, 2022
- Seagate Technology LLC
- Meysam Asadi
- G11 - INFORMATION STORAGE
Information Patent Grant
CAM storage schemes and CAM read operations for detecting matching...
- Patent number 11,367,485
- Issue date Jun 21, 2022
- Western Digital Technologies, Inc.
- Idan Alrod
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating corrective read voltage offsets in non-volatile random...
- Patent number 11,302,403
- Issue date Apr 12, 2022
- International Business Machines Corporation
- Nikolaos Papandreou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read sample offset bit determination using most probably decoder lo...
- Patent number 11,288,009
- Issue date Mar 29, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for reducing program disturb degradation in flash...
- Patent number 11,270,778
- Issue date Mar 8, 2022
- Intel Corporation
- Han Zhao
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjusting scan event thresholds to mitigate memory errors
- Patent number 11,269,553
- Issue date Mar 8, 2022
- Micron Technology, Inc.
- Gianni Stephen Alsasua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system, data processing system and operation method of the same
- Patent number 11,200,960
- Issue date Dec 14, 2021
- SK Hynix Inc.
- Jong-Min Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Anti-hacking mechanisms for flash memory device
- Patent number 11,188,237
- Issue date Nov 30, 2021
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing post-read disturb in a nonvolatile memory device
- Patent number 11,139,030
- Issue date Oct 5, 2021
- SanDisk Technologies LLC
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device error detection with improved scanning
- Patent number 11,139,035
- Issue date Oct 5, 2021
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile memory devices and methods of reading the nonvolatile m...
- Patent number 11,133,070
- Issue date Sep 28, 2021
- SK HYNIX SYSTEM IC INC.
- Hyun Min Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Updating corrective read voltage offsets in non-volatile random acc...
- Patent number 11,056,199
- Issue date Jul 6, 2021
- International Business Machines Corporation
- Nikolaos Papandreou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Nonvolatile memory device and method of controlling initialization...
- Patent number 11,056,200
- Issue date Jul 6, 2021
- Samsung Electronics Co., Ltd.
- Jiyeon Shin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory controller and method of operating the same for processing t...
- Patent number 11,037,639
- Issue date Jun 15, 2021
- SK Hynix Inc.
- Min Ho Her
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calculating corrective read voltage offsets in non-volatile random...
- Patent number 10,957,407
- Issue date Mar 23, 2021
- International Business Machines Corporation
- Nikolaos Papandreou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory management method and storage controller
- Patent number 10,936,391
- Issue date Mar 2, 2021
- Shenzhen EpoStar Electronics Limited CO.
- Yu-Hua Hsiao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CAM storage schemes and CAM read operations for detecting matching...
- Patent number 10,910,057
- Issue date Feb 2, 2021
- Western Digital Technologies, Inc.
- Idan Alrod
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System handling for first read read disturb
- Patent number 10,790,031
- Issue date Sep 29, 2020
- Western Digital Technologies, Inc.
- Piyush Sagdeo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices and methods for read disturb mitigation involving wo...
- Patent number 10,770,156
- Issue date Sep 8, 2020
- Micron Technology, Inc.
- Renato C. Padilla
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CHARGE LOSS COMPENSATION DURING READ OPERATIONS IN A MEMORY DEVICE
- Publication number 20240355397
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Vivek Venkata Kalluru
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR PERFORMING READ OPERATION
- Publication number 20240290394
- Publication date Aug 29, 2024
- SK HYNIX INC.
- Jae Yeop JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
- Publication number 20240005995
- Publication date Jan 4, 2024
- KIOXIA Corporation
- Hiroshi MAEJIMA
- G11 - INFORMATION STORAGE
Information Patent Application
AUDIT TECHNIQUES FOR READ DISTURB DETECTION IN AN OPEN MEMORY BLOCK
- Publication number 20230260584
- Publication date Aug 17, 2023
- JIACEN GUO
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY STORAGE APPARATUS AND A BIASING METHOD THEREOF, WHICH...
- Publication number 20220366963
- Publication date Nov 17, 2022
- Powerchip Semiconductor Manufacturing Corporation
- Chien-Hung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
- Publication number 20220351778
- Publication date Nov 3, 2022
- Kioxia Corporation
- Hiroshi MAEJIMA
- G11 - INFORMATION STORAGE
Information Patent Application
READ SAMPLE OFFSET BIT DETERMINATION IN A MEMORY SUB-SYSTEM
- Publication number 20220214837
- Publication date Jul 7, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING SCAN EVENT THRESHOLDS TO MITIGATE MEMORY ERRORS
- Publication number 20220188040
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Gianni Stephen Alsasua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Reduction During Open and Erased Block Reads of Memory
- Publication number 20220122672
- Publication date Apr 21, 2022
- Western Digital Technologies, Inc.
- Nan Lu
- G11 - INFORMATION STORAGE
Information Patent Application
DETERMINING A READ VOLTAGE BASED ON A CHANGE IN A READ WINDOW
- Publication number 20220068407
- Publication date Mar 3, 2022
- Micron Technology, Inc.
- Vamsi Pavan Rayaprolu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE ERROR DETECTION WITH IMPROVED SCANNING
- Publication number 20210407600
- Publication date Dec 30, 2021
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WRITING A NONVOLATILE MEMORY TO PROGRAMMED LEVELS
- Publication number 20210224005
- Publication date Jul 22, 2021
- Hewlett-Packard Development Company, L.P.
- James Michael Gardner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALCULATING CORRECTIVE READ VOLTAGE OFFSETS IN NON-VOLATILE RANDOM...
- Publication number 20210134378
- Publication date May 6, 2021
- International Business Machines Corporation
- Nikolaos Papandreou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UPDATING CORRECTIVE READ VOLTAGE OFFSETS IN NON-VOLATILE RANDOM ACC...
- Publication number 20210134377
- Publication date May 6, 2021
- International Business Machines Corporation
- Nikolaos Papandreou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM, DATA PROCESSING SYSTEM AND OPERATION METHOD OF THE SAME
- Publication number 20210098070
- Publication date Apr 1, 2021
- SK HYNIX INC.
- Jong-Min LEE
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICES AND METHODS OF READING THE NONVOLATILE M...
- Publication number 20210090664
- Publication date Mar 25, 2021
- SK hynix system ic Inc.
- Hyun Min SONG
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING INITIALIZATION...
- Publication number 20210035650
- Publication date Feb 4, 2021
- Samsung Electronics Co., Ltd.
- Jiyeon SHIN
- G11 - INFORMATION STORAGE
Information Patent Application
CAM STORAGE SCHEMES AND CAM READ OPERATIONS FOR DETECTING MATCHING...
- Publication number 20210027838
- Publication date Jan 28, 2021
- Western Digital Technologies, Inc.
- Idan Alrod
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR REDUCING PROGRAM DISTURB DEGRADATION IN FLASH...
- Publication number 20200350028
- Publication date Nov 5, 2020
- Intel Corporation
- HAN ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
- Publication number 20200327943
- Publication date Oct 15, 2020
- Toshiba Memory Corporation
- Hiroshi MAEJIMA
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTING SCAN EVENT THRESHOLDS TO MITIGATE MEMORY ERRORS
- Publication number 20200278814
- Publication date Sep 3, 2020
- Micron Technology,Inc.
- Gianni Stephen Alsasua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE ERROR DETECTION WITH IMPROVED SCANNING
- Publication number 20200211662
- Publication date Jul 2, 2020
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME
- Publication number 20200176066
- Publication date Jun 4, 2020
- SK HYNIX INC.
- Min Ho HER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTED SCAN EVENT THRESHOLDS
- Publication number 20200097211
- Publication date Mar 26, 2020
- Micron Technology, Inc.
- Gianni Stephen Alsasua
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH MEMORY REGION READ COUNTS AND A MEMORY GROUP REA...
- Publication number 20200051647
- Publication date Feb 13, 2020
- SK HYNIX INC.
- Yong Il JUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20190392908
- Publication date Dec 26, 2019
- Samsung Electronics Co., Ltd.
- Jae-yun LEE
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS OF ERROR-BASED READ DISTURB MITIGATION AND MEMORY DEVICES U...
- Publication number 20190272881
- Publication date Sep 5, 2019
- Micron Technology, Inc.
- Renato C. Padilla
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF
- Publication number 20190214402
- Publication date Jul 11, 2019
- Macronix International Co., Ltd.
- I-Ting Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY SYSTEM AND OPERATING METHOD THEREOF
- Publication number 20190198119
- Publication date Jun 27, 2019
- SK HYNIX INC.
- Jong-Min LEE
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
- Publication number 20190172540
- Publication date Jun 6, 2019
- Toshiba Memory Corporation
- Hiroshi MAEJIMA
- G11 - INFORMATION STORAGE

Circuits or methods to evaluate read or write disturbance in nonvolatile memory, without steps to mitigate the problem

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Data reading method, memory storage device, and memory control circ...

Charge loss compensation during read operations in a memory device

Memory device error detection with improved scanning

Audit techniques for read disturb detection in an open memory block

Read sample offset bit determination in a memory sub-system

Three dimensional stacked nonvolatile semiconductor memory wherein...

Risk assessment method based on data priority, memory storage devic...

Adjusting scan event thresholds to mitigate memory errors

Power reduction during open and erased block reads of memory based...

Three dimensional stacked nonvolatile semiconductor memory in which...

Determining a read voltage based on a change in a read window

Capacitance coupling parameter estimation in flash memories

CAM storage schemes and CAM read operations for detecting matching...

Calculating corrective read voltage offsets in non-volatile random...

Read sample offset bit determination using most probably decoder lo...

Method and system for reducing program disturb degradation in flash...

Adjusting scan event thresholds to mitigate memory errors

Memory system, data processing system and operation method of the same

Anti-hacking mechanisms for flash memory device

Reducing post-read disturb in a nonvolatile memory device

Memory device error detection with improved scanning

Nonvolatile memory devices and methods of reading the nonvolatile m...

Updating corrective read voltage offsets in non-volatile random acc...

Nonvolatile memory device and method of controlling initialization...

Memory controller and method of operating the same for processing t...

Calculating corrective read voltage offsets in non-volatile random...

Memory management method and storage controller

CAM storage schemes and CAM read operations for detecting matching...

System handling for first read read disturb

Memory devices and methods for read disturb mitigation involving wo...

Patents Applicationslast 30 patents

CHARGE LOSS COMPENSATION DURING READ OPERATIONS IN A MEMORY DEVICE

MEMORY DEVICE FOR PERFORMING READ OPERATION

THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY

AUDIT TECHNIQUES FOR READ DISTURB DETECTION IN AN OPEN MEMORY BLOCK

FLASH MEMORY STORAGE APPARATUS AND A BIASING METHOD THEREOF, WHICH...

THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY

READ SAMPLE OFFSET BIT DETERMINATION IN A MEMORY SUB-SYSTEM

ADJUSTING SCAN EVENT THRESHOLDS TO MITIGATE MEMORY ERRORS

Power Reduction During Open and Erased Block Reads of Memory

DETERMINING A READ VOLTAGE BASED ON A CHANGE IN A READ WINDOW

MEMORY DEVICE ERROR DETECTION WITH IMPROVED SCANNING

WRITING A NONVOLATILE MEMORY TO PROGRAMMED LEVELS

CALCULATING CORRECTIVE READ VOLTAGE OFFSETS IN NON-VOLATILE RANDOM...

UPDATING CORRECTIVE READ VOLTAGE OFFSETS IN NON-VOLATILE RANDOM ACC...

MEMORY SYSTEM, DATA PROCESSING SYSTEM AND OPERATION METHOD OF THE SAME

NONVOLATILE MEMORY DEVICES AND METHODS OF READING THE NONVOLATILE M...

NONVOLATILE MEMORY DEVICE AND METHOD OF CONTROLLING INITIALIZATION...

CAM STORAGE SCHEMES AND CAM READ OPERATIONS FOR DETECTING MATCHING...

METHOD AND SYSTEM FOR REDUCING PROGRAM DISTURB DEGRADATION IN FLASH...

THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY

ADJUSTING SCAN EVENT THRESHOLDS TO MITIGATE MEMORY ERRORS

MEMORY DEVICE ERROR DETECTION WITH IMPROVED SCANNING

MEMORY CONTROLLER AND METHOD OF OPERATING THE SAME

ADJUSTED SCAN EVENT THRESHOLDS

MEMORY SYSTEM WITH MEMORY REGION READ COUNTS AND A MEMORY GROUP REA...

NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF

METHODS OF ERROR-BASED READ DISTURB MITIGATION AND MEMORY DEVICES U...

THREE-DIMENSIONAL NON-VOLATILE MEMORY AND MANUFACTURING METHOD THEREOF

MEMORY SYSTEM AND OPERATING METHOD THEREOF

THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY