combined in a redundant decoder

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CPC
G11C29/781

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/781combined in a redundant decoder

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Error correction in a memory device having an error correction code...
- Patent number 12,142,333
- Issue date Nov 12, 2024
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-channel memory device capable of switching redundancy memory...
- Patent number 12,112,822
- Issue date Oct 8, 2024
- Winbond Electronics Corp.
- Chih-Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory testing techniques
- Patent number 11,862,271
- Issue date Jan 2, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoding scheme for error correction code structure
- Patent number 11,734,107
- Issue date Aug 22, 2023
- Kioxia Corporation
- Avi Steiner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quarter match concurrent compensation in a memory system
- Patent number 11,626,154
- Issue date Apr 11, 2023
- Micron Technology, Inc.
- Jacob Rice
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for memory devices
- Patent number 11,562,787
- Issue date Jan 24, 2023
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-state programming for memory devices
- Patent number 11,087,836
- Issue date Aug 10, 2021
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Redundancy array column decoder for memory
- Patent number 10,943,633
- Issue date Mar 9, 2021
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for memory devices
- Patent number 10,878,896
- Issue date Dec 29, 2020
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Defective memory cell detection circuitry including use in automoti...
- Patent number 10,832,793
- Issue date Nov 10, 2020
- Micron Technology, Inc.
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for memory devices
- Patent number 10,748,606
- Issue date Aug 18, 2020
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layered semiconductor device, and production method therefor
- Patent number 10,714,151
- Issue date Jul 14, 2020
- ULTRAMEMORY INC.
- Yasutoshi Yamada
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system
- Patent number 10,629,249
- Issue date Apr 21, 2020
- SK Hynix Inc.
- Sang Hyun Ku
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including OTP memory cell and program method thereof
- Patent number 10,615,167
- Issue date Apr 7, 2020
- Samsung Electronics Co., Ltd.
- Sang-Seok Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor system
- Patent number 10,490,246
- Issue date Nov 26, 2019
- SK Hynix Inc.
- Sang Hyun Ku
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy array column decoder for memory
- Patent number 10,468,085
- Issue date Nov 5, 2019
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
Address control circuit and semiconductor device including the same
- Patent number 10,381,057
- Issue date Aug 13, 2019
- SK hynix Inc.
- Byeong Cheol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Address control circuit and semiconductor device including the same
- Patent number 10,381,058
- Issue date Aug 13, 2019
- SK hynix Inc.
- Byeong Cheol Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory system with wide I/O memory die
- Patent number 10,381,327
- Issue date Aug 13, 2019
- SanDisk Technologies LLC
- Venkatesh P. Ramachandra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device
- Patent number 10,338,835
- Issue date Jul 2, 2019
- TOSHIBA MEMORY CORPORATION
- Yoshiaki Osada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory apparatus with post package repair
- Patent number 10,217,525
- Issue date Feb 26, 2019
- Micron Technology, Imc.
- Hideyuki Yoko
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy array column decoder for memory
- Patent number 10,121,526
- Issue date Nov 6, 2018
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-stage decoder
- Patent number 10,089,177
- Issue date Oct 2, 2018
- SanDisk Technologies LLC
- Alexander Bazarsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor apparatus capable of improving efficiency for a circu...
- Patent number 10,020,030
- Issue date Jul 10, 2018
- SK hynix Inc.
- Seung Bong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient sense amplifier shifting for memory redundancy
- Patent number 9,905,316
- Issue date Feb 27, 2018
- QUALCOMM Incorporated
- Sonia Ghosh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with redundant IO circuit
- Patent number 9,824,780
- Issue date Nov 21, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- Atul Katoch
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient coding for memory redundancy
- Patent number 9,748,003
- Issue date Aug 29, 2017
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Repair circuit, memory apparatus using the same and operating metho...
- Patent number 9,583,161
- Issue date Feb 28, 2017
- SK hynix Inc.
- Yong Seop Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with improved refresh scheme for redundancy word line
- Patent number 9,514,850
- Issue date Dec 6, 2016
- SK Hynix Inc.
- Sang-Hee Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Compensation circuit and compensation method
- Patent number 9,455,051
- Issue date Sep 27, 2016
- SK hynix Inc.
- Sung Gu Lim
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE AND REPAIR METHOD OF THE MEMORY DEVICE
- Publication number 20240257898
- Publication date Aug 1, 2024
- Samsung Electronics Co., Ltd.
- Taehong KWON
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Testing Techniques
- Publication number 20240136006
- Publication date Apr 25, 2024
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Correction in a Memory Device having an Error Correction Code...
- Publication number 20230317195
- Publication date Oct 5, 2023
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-CHANNEL MEMORY DEVICE
- Publication number 20230215509
- Publication date Jul 6, 2023
- WINBOND ELECTRONICS CORP.
- Chih-Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-State Programming for Memory Devices
- Publication number 20210319828
- Publication date Oct 14, 2021
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-State Programming for Memory Devices
- Publication number 20210104275
- Publication date Apr 8, 2021
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-State Programming for Memory Devices
- Publication number 20200350007
- Publication date Nov 5, 2020
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECODING SCHEME FOR ERROR CORRECTION CODE STRUCTURE
- Publication number 20200293399
- Publication date Sep 17, 2020
- Toshiba Memory Corporation
- Avi Steiner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-STATE PROGRAMMING FOR MEMORY DEVICES
- Publication number 20200194064
- Publication date Jun 18, 2020
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Testing Techniques
- Publication number 20200194093
- Publication date Jun 18, 2020
- ARM Limited
- Andy Wangkun Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LAYERED SEMICONDUCTOR DEVICE, AND PRODUCTION METHOD THEREFOR
- Publication number 20200090708
- Publication date Mar 19, 2020
- UltraMemory Inc.
- Yasutoshi YAMADA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY
- Publication number 20200090726
- Publication date Mar 19, 2020
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM
- Publication number 20200075071
- Publication date Mar 5, 2020
- SK HYNIX INC.
- Sang Hyun KU
- G11 - INFORMATION STORAGE
Information Patent Application
DEFECTIVE MEMORY CELL DETECTION CIRCUITRY INCLUDING USE IN AUTOMOTI...
- Publication number 20200066368
- Publication date Feb 27, 2020
- Micron Technology, Inc.
- Christopher S. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
ADDRESS CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
- Publication number 20190198076
- Publication date Jun 27, 2019
- SK HYNIX INC.
- Byeong Cheol LEE
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY
- Publication number 20180374527
- Publication date Dec 27, 2018
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY SYSTEM WITH WIDE I/O MEMORY DIE
- Publication number 20180102344
- Publication date Apr 12, 2018
- SanDisk Technologies LLC
- Venkatesh P. Ramachandra
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT SENSE AMPLIFIER SHIFTING FOR MEMORY REDUNDANCY
- Publication number 20180033495
- Publication date Feb 1, 2018
- QUALCOMM Incorporated
- Sonia GHOSH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH REDUNDANT IO CIRCUIT
- Publication number 20160293277
- Publication date Oct 6, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Atul KATOCH
- G11 - INFORMATION STORAGE
Information Patent Application
REPAIR CIRCUIT, SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING...
- Publication number 20160133344
- Publication date May 12, 2016
- SK HYNIX INC.
- Jung-Taek YOU
- G11 - INFORMATION STORAGE
Information Patent Application
REPAIR CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME
- Publication number 20160104546
- Publication date Apr 14, 2016
- SK HYNIX INC.
- Tae-Sik YUN
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT CODING FOR MEMORY REDUNDANCY
- Publication number 20160078969
- Publication date Mar 17, 2016
- QUALCOMM Incorporated
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20160027532
- Publication date Jan 28, 2016
- SK HYNIX INC.
- Sang-Hee KIM
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE
- Publication number 20120057415
- Publication date Mar 8, 2012
- Yong Deok Cho
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE AND SYSTEM PERFORMING REPAIR OPERATION FO...
- Publication number 20110205796
- Publication date Aug 25, 2011
- Samsung Electronics Co., Ltd.
- Doo Gon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20100284233
- Publication date Nov 11, 2010
- Hynix Semiconductor Inc.
- Dong-Keun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD HAVING A MEMORY ARRAY STORING EACH BIT IN MULTIPL...
- Publication number 20080013366
- Publication date Jan 17, 2008
- Micron Technology, Inc.
- Michael A. Shore
- G11 - INFORMATION STORAGE
Information Patent Application
Device having a memory array storing each bit in multiple memory cells
- Publication number 20060039178
- Publication date Feb 23, 2006
- Michael A. Shore
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device and method of driving the same
- Publication number 20050232036
- Publication date Oct 20, 2005
- Hynix Semiconductor Inc.
- Byoung Jin Choi
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device capable of detecting repair address at...
- Publication number 20050226065
- Publication date Oct 13, 2005
- Seok-Cheol Yoon
- G11 - INFORMATION STORAGE

combined in a redundant decoder

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Error correction in a memory device having an error correction code...

Multi-channel memory device capable of switching redundancy memory...

Memory testing techniques

Decoding scheme for error correction code structure

Quarter match concurrent compensation in a memory system

Multi-state programming for memory devices

Multi-state programming for memory devices

Redundancy array column decoder for memory

Multi-state programming for memory devices

Defective memory cell detection circuitry including use in automoti...

Multi-state programming for memory devices

Layered semiconductor device, and production method therefor

Semiconductor device and semiconductor system

Memory device including OTP memory cell and program method thereof

Semiconductor device and semiconductor system

Redundancy array column decoder for memory

Address control circuit and semiconductor device including the same

Address control circuit and semiconductor device including the same

Non-volatile memory system with wide I/O memory die

Memory device

Memory apparatus with post package repair

Redundancy array column decoder for memory

Multi-stage decoder

Semiconductor apparatus capable of improving efficiency for a circu...

Efficient sense amplifier shifting for memory redundancy

Memory device with redundant IO circuit

Efficient coding for memory redundancy

Repair circuit, memory apparatus using the same and operating metho...

Memory device with improved refresh scheme for redundancy word line

Compensation circuit and compensation method

Patents Applicationslast 30 patents

MEMORY DEVICE AND REPAIR METHOD OF THE MEMORY DEVICE

Memory Testing Techniques

Error Correction in a Memory Device having an Error Correction Code...

MULTI-CHANNEL MEMORY DEVICE

Multi-State Programming for Memory Devices

Multi-State Programming for Memory Devices

Multi-State Programming for Memory Devices

DECODING SCHEME FOR ERROR CORRECTION CODE STRUCTURE

MULTI-STATE PROGRAMMING FOR MEMORY DEVICES

Memory Testing Techniques

LAYERED SEMICONDUCTOR DEVICE, AND PRODUCTION METHOD THEREFOR

REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM

DEFECTIVE MEMORY CELL DETECTION CIRCUITRY INCLUDING USE IN AUTOMOTI...

ADDRESS CONTROL CIRCUIT AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

REDUNDANCY ARRAY COLUMN DECODER FOR MEMORY

NON-VOLATILE MEMORY SYSTEM WITH WIDE I/O MEMORY DIE

EFFICIENT SENSE AMPLIFIER SHIFTING FOR MEMORY REDUNDANCY

MEMORY DEVICE WITH REDUNDANT IO CIRCUIT

REPAIR CIRCUIT, SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING...

REPAIR CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME

EFFICIENT CODING FOR MEMORY REDUNDANCY

MEMORY DEVICE

NONVOLATILE MEMORY DEVICE

NONVOLATILE MEMORY DEVICE AND SYSTEM PERFORMING REPAIR OPERATION FO...

SEMICONDUCTOR MEMORY DEVICE

DEVICE AND METHOD HAVING A MEMORY ARRAY STORING EACH BIT IN MULTIPL...

Device having a memory array storing each bit in multiple memory cells

Semiconductor memory device and method of driving the same

Semiconductor memory device capable of detecting repair address at...