comprising cells having several storage transistors connected in series

Industry

CPC
G11C16/0483

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C16/00Erasable programmable read-only memories

Current Industry

G11C16/0483comprising cells having several storage transistors connected in series

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory with different threshold voltages of memory cells
- Patent number 12,367,938
- Issue date Jul 22, 2025
- Kioxia Corporation
- Noboru Shibata
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and in-memory search method thereof
- Patent number 12,367,930
- Issue date Jul 22, 2025
- Macronix International Co., Ltd.
- Po-Hao Tseng
- G11 - INFORMATION STORAGE
Information Patent Grant
Stacked column floorplan for NAND
- Patent number 12,367,931
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Yuki Mizutani
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory devices having a support stack comprising...
- Patent number 12,369,317
- Issue date Jul 22, 2025
- Yangtze Memory Technologies Co., Ltd.
- Kun Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Power management
- Patent number 12,367,939
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Liang Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Binary read-based fast algorithm for optimal read level acquisition
- Patent number 12,367,937
- Issue date Jul 22, 2025
- SANDISK TECHNOLOGIES, INC.
- Zhenni Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Three-dimensional memory device containing dual-depth drain-select-...
- Patent number 12,369,319
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Akihiro Tobioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device operated by zone and data processing system includin...
- Patent number 12,366,964
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Joo Young Hwang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page buffer circuit with bit line select transistor
- Patent number 12,367,936
- Issue date Jul 22, 2025
- Yangtze Memory Technologies Co., Ltd.
- Teng Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
3D semiconductor device and structure with metal layers and a power...
- Patent number 12,369,347
- Issue date Jul 22, 2025
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Staggered read recovery for improved read window budget in a three...
- Patent number 12,362,002
- Issue date Jul 15, 2025
- INTEL NDTM US LLC
- Rifat Ferdous
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array structure
- Patent number 12,362,015
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Gerben Doornbos
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor storage device and method of manufacturing the same
- Patent number 12,363,901
- Issue date Jul 15, 2025
- Kioxia Corporation
- Yasuhiro Uchiyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with reduced area
- Patent number 12,362,017
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chun-Ying Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed bitline lockout for QLC/TLC die
- Patent number 12,362,012
- Issue date Jul 15, 2025
- SanDisk Technologies, Inc.
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including circuitry under bond pads
- Patent number 12,362,244
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Chiara Cerafogli
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of programming memory
- Patent number 12,362,018
- Issue date Jul 15, 2025
- Macronix International Co., Ltd.
- Ya-Jui Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device that varies voltages applied to bit lines
- Patent number 12,362,019
- Issue date Jul 15, 2025
- Kioxia Corporation
- Yoichi Minemura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having a control circuit for changing a...
- Patent number 12,362,020
- Issue date Jul 15, 2025
- Kioxia Corporation
- Shouichi Ozaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiver design in DDR memory interfaces
- Patent number 12,354,665
- Issue date Jul 8, 2025
- Western Digital Technologies, Inc.
- Mohammad Reza Mahmoodi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array having connections going through control gates
- Patent number 12,356,614
- Issue date Jul 8, 2025
- Toru Tanzawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of manufacturing the same
- Patent number 12,356,621
- Issue date Jul 8, 2025
- Kioxia Corporation
- Shinya Arai
- G11 - INFORMATION STORAGE
Information Patent Grant
Output array neuron conversion and calibration for analog neural me...
- Patent number 12,353,503
- Issue date Jul 8, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory arrays comprising strings of memory cells and methods used i...
- Patent number 12,354,658
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Jordan D. Greenlee
- G11 - INFORMATION STORAGE
Information Patent Grant
Discharge circuits
- Patent number 12,354,669
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Kenneth W. Marr
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses comprising transistors including extension regions
- Patent number 12,354,662
- Issue date Jul 8, 2025
- Lodestar Licensing Group LLC
- Haitao Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic adjustment of offset voltages for reading memory cells in a...
- Patent number 12,354,670
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Mustafa N. Kaynak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device
- Patent number 12,354,671
- Issue date Jul 8, 2025
- Kioxia Corporation
- Koji Kato
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method of operating the same
- Patent number 12,353,335
- Issue date Jul 8, 2025
- Samsung Electronics Co., Ltd.
- Sohyun Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Regulator circuit module, memory storage device and voltage control...
- Patent number 12,353,232
- Issue date Jul 8, 2025
- Phison Electronics Corp.
- Chien-Fu Huang
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Memory Array Comprising Strings Of Memory Cells And Methods Includi...
- Publication number 20250239306
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- John D. Hopkins
- G11 - INFORMATION STORAGE
Information Patent Application
PARTIAL-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES
- Publication number 20250239307
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY
- Publication number 20250239312
- Publication date Jul 24, 2025
- KIOXIA Corporation
- Masahiro SAITO
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT DEVICES HAVING REFLECTIVE STRUCTURES THEREIN THA...
- Publication number 20250240958
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Seongkeun Cho
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM
- Publication number 20250238062
- Publication date Jul 24, 2025
- Kioxia Corporation
- Akio SUGAHARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE HAVING DIFFERENT SHAPE SUPPORT PILL...
- Publication number 20250239305
- Publication date Jul 24, 2025
- SANDISK TECHNOLOGIES LLC
- Akira TAKAHASHI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE
- Publication number 20250239278
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Kohji Kanamori
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE COARSE THRESHOLD ESTIMATE READ UNDER MULTI-PLANE MODE
- Publication number 20250239311
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Luis Iam
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, AND ELECTRONI...
- Publication number 20250240960
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Ju Mi Bak
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF SELECTIVE BOTTOM WIDENING OF HIGH ASPECT RATIO OPENINGS T...
- Publication number 20250234553
- Publication date Jul 17, 2025
- SANDISK TECHNOLOGIES LLC
- Bing ZHOU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND MEMORY DEVICE
- Publication number 20250232808
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Naomi TAKEDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE BASED ON FLASH MEMORY AND READING OPERATION METHOD T...
- Publication number 20250232818
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- Haejong JANG
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING A SCHOTTKY SOURCE CONTACT...
- Publication number 20250232812
- Publication date Jul 17, 2025
- SANDISK TECHNOLOGIES LLC
- Masanori TSUTSUMI
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE REDUCING A NUMBER OF PROGRAM BIT LINES AN...
- Publication number 20250232813
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- Sangwon Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND OPERATION METHODS THEREOF
- Publication number 20250232816
- Publication date Jul 17, 2025
- Yangtze Memory Technologies Co., Ltd.
- Jie YUAN
- G11 - INFORMATION STORAGE
Information Patent Application
HIDDEN MAJORITY VOTE PROGRAM VERIFY SCHEME FOR A MEMORY DEVICE
- Publication number 20250232823
- Publication date Jul 17, 2025
- Micro Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250234620
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Tomonori KAJINO
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES, OPERATION METHODS THEREOF, AND RELATED STRUCTURES
- Publication number 20250231868
- Publication date Jul 17, 2025
- Yangtze Memory Technologies Co., Ltd.
- Lang DENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING METHOD FOR A MEMORY, A MEMORY, AND A MEMORY SYSTEM
- Publication number 20250231690
- Publication date Jul 17, 2025
- Yangtze Memory Technologies Co., Ltd.
- Weijun WAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE
- Publication number 20250232820
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- Hanmin NAM
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACK...
- Publication number 20250232822
- Publication date Jul 17, 2025
- Sunrise Memory Corporation
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICE INCLUDING A SCHOTTKY SOURCE CONTACT...
- Publication number 20250234544
- Publication date Jul 17, 2025
- SANDISK TECHNOLOGIES LLC
- Tatsuya HINOUE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM
- Publication number 20250232807
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Tokumasa HARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250232814
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Yuki INUZUKA
- G11 - INFORMATION STORAGE
Information Patent Application
MONITORING SECONDARY POWER SOURCES
- Publication number 20250231253
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- Woosung Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SUB-SYSTEM WITH DYNAMIC CALIBRATION USING COMPONENT-BASED FU...
- Publication number 20250225021
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Gerald L. Cadloni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMING MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING
- Publication number 20250226034
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Shyam Sunder Raghunathan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250226032
- Publication date Jul 10, 2025
- Samsung Electronics Co., Ltd.
- Sang-Won Park
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250226031
- Publication date Jul 10, 2025
- KIOXIA Corporation
- Yosuke MURAKAMI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER, MEMORY SYSTEM INCLUDING MEMORY CONTROLLER, AND M...
- Publication number 20250226036
- Publication date Jul 10, 2025
- Samsung Electronics Co., Ltd.
- Haedong NO
- G11 - INFORMATION STORAGE

comprising cells having several storage transistors connected in series

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor memory with different threshold voltages of memory cells

Memory device and in-memory search method thereof

Stacked column floorplan for NAND

Three-dimensional memory devices having a support stack comprising...

Power management

Binary read-based fast algorithm for optimal read level acquisition

Three-dimensional memory device containing dual-depth drain-select-...

Storage device operated by zone and data processing system includin...

Page buffer circuit with bit line select transistor

3D semiconductor device and structure with metal layers and a power...

Staggered read recovery for improved read window budget in a three...

Memory array structure

Semiconductor storage device and method of manufacturing the same

Memory device with reduced area

Mixed bitline lockout for QLC/TLC die

Memory device including circuitry under bond pads

Method of programming memory

Semiconductor storage device that varies voltages applied to bit lines

Semiconductor memory device having a control circuit for changing a...

Data receiver design in DDR memory interfaces

Memory array having connections going through control gates

Semiconductor memory device and method of manufacturing the same

Output array neuron conversion and calibration for analog neural me...

Memory arrays comprising strings of memory cells and methods used i...

Discharge circuits

Apparatuses comprising transistors including extension regions

Dynamic adjustment of offset voltages for reading memory cells in a...

Semiconductor memory device

Semiconductor device and method of operating the same

Regulator circuit module, memory storage device and voltage control...

Patents Applicationslast 30 patents

Memory Array Comprising Strings Of Memory Cells And Methods Includi...

PARTIAL-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES

MEMORY SYSTEM AND METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY

INTEGRATED CIRCUIT DEVICES HAVING REFLECTIVE STRUCTURES THEREIN THA...

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM

THREE-DIMENSIONAL MEMORY DEVICE HAVING DIFFERENT SHAPE SUPPORT PILL...

MEMORY DEVICE

MEMORY DEVICE COARSE THRESHOLD ESTIMATE READ UNDER MULTI-PLANE MODE

SEMICONDUCTOR DEVICE, METHOD OF FABRICATING THE SAME, AND ELECTRONI...

METHOD OF SELECTIVE BOTTOM WIDENING OF HIGH ASPECT RATIO OPENINGS T...

MEMORY SYSTEM AND MEMORY DEVICE

STORAGE DEVICE BASED ON FLASH MEMORY AND READING OPERATION METHOD T...

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING A SCHOTTKY SOURCE CONTACT...

NONVOLATILE MEMORY DEVICE REDUCING A NUMBER OF PROGRAM BIT LINES AN...

MEMORY DEVICES AND OPERATION METHODS THEREOF

HIDDEN MAJORITY VOTE PROGRAM VERIFY SCHEME FOR A MEMORY DEVICE

SEMICONDUCTOR MEMORY DEVICE

MEMORY DEVICES, OPERATION METHODS THEREOF, AND RELATED STRUCTURES

OPERATING METHOD FOR A MEMORY, A MEMORY, AND A MEMORY SYSTEM

MEMORY DEVICE

MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACK...

THREE-DIMENSIONAL MEMORY DEVICE INCLUDING A SCHOTTKY SOURCE CONTACT...

MEMORY SYSTEM

SEMICONDUCTOR MEMORY DEVICE

MONITORING SECONDARY POWER SOURCES

MEMORY SUB-SYSTEM WITH DYNAMIC CALIBRATION USING COMPONENT-BASED FU...

PROGRAMMING MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING

MEMORY DEVICE AND OPERATION METHOD THEREOF

SEMICONDUCTOR MEMORY DEVICE

MEMORY CONTROLLER, MEMORY SYSTEM INCLUDING MEMORY CONTROLLER, AND M...