comprising complete test loop

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G11C2029/0405

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GPHYSICS G11Information storage G11CSTATIC STORES

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G11C2029/0405comprising complete test loop

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Patents Grantslast 30 patents

Information Patent Grant
Data sampling circuit and semiconductor memory
- Patent number 11,854,636
- Issue date Dec 26, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhiqiang Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of improving read current stability in analog non-volatile m...
- Patent number 11,205,490
- Issue date Dec 21, 2021
- Silicon Storage Technology, Inc.
- Viktor Markov
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller, method of operating the same and storage device...
- Patent number 10,748,642
- Issue date Aug 18, 2020
- Samsung Electronics Co., Ltd.
- Kwang-hoon Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for testing a storage unit and apparatuses using the same
- Patent number 10,636,506
- Issue date Apr 28, 2020
- SHANNON SYSTEMS LTD.
- Zhen Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for generating featured test pattern
- Patent number 10,067,186
- Issue date Sep 4, 2018
- Mediatek Inc.
- Harry Hai Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing electronic memories based on fault and test algorithm perio...
- Patent number 9,831,000
- Issue date Nov 28, 2017
- Synopsys, Inc.
- Aram Hakhumyan
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and methods of testing open failures t...
- Patent number 9,633,747
- Issue date Apr 25, 2017
- SK hynix Inc.
- Sang Kwon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Auto-blow memory repair
- Patent number 9,490,033
- Issue date Nov 8, 2016
- Cavium, Inc.
- Steven W. Aiken
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit with bist circuit
- Patent number 9,443,611
- Issue date Sep 13, 2016
- Kabushiki Kaisha Toshiba
- Chikako Tokunaga
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for testing memory devices
- Patent number 9,373,417
- Issue date Jun 21, 2016
- INTEGRATED SILICON SOLUTION (SHANGHAI), INC.
- Mingzhao Tong
- G11 - INFORMATION STORAGE
Information Patent Grant
BIST circuit
- Patent number 9,355,745
- Issue date May 31, 2016
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit capable of performing self-test
- Patent number 9,330,788
- Issue date May 3, 2016
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test for stacked memory architecture
- Patent number 9,298,573
- Issue date Mar 29, 2016
- Intel Corporation
- Darshan Kobla
- G11 - INFORMATION STORAGE
Information Patent Grant
Seamless fail analysis with memory efficient storage of fail lists
- Patent number 9,251,915
- Issue date Feb 2, 2016
- Advantest Corporation
- Hanh Lai
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage medium and transmittal system utilizing the same
- Patent number 9,111,586
- Issue date Aug 18, 2015
- Silicon Motion, Inc.
- Hsu-Ping Ou
- G11 - INFORMATION STORAGE
Information Patent Grant
Double data rate memory physical interface high speed testing using...
- Patent number 9,043,662
- Issue date May 26, 2015
- Cadence Design Systems, Inc.
- John W. Selking
- G11 - INFORMATION STORAGE
Information Patent Grant
Test system which shares a register in different modes
- Patent number 8,984,354
- Issue date Mar 17, 2015
- Realtek Semiconductor Corp.
- Shuo-Fen Kuo
- G11 - INFORMATION STORAGE
Information Patent Grant
Deeply pipelined integrated memory built-in self-test (BIST) system...
- Patent number 8,837,243
- Issue date Sep 16, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Gary L. Taylor
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self test circuit and designing apparatus
- Patent number 8,671,317
- Issue date Mar 11, 2014
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit
- Patent number 8,599,632
- Issue date Dec 3, 2013
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for verifying memory testing software
- Patent number 8,595,557
- Issue date Nov 26, 2013
- International Business Machines Corporation
- Eric Jasinski
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for accelerating memory randomization
- Patent number 8,549,367
- Issue date Oct 1, 2013
- Cadence Design Systems, Inc.
- Mark A. Sherred
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated scan testing of a system-on-chip (SoC)
- Patent number 8,522,090
- Issue date Aug 27, 2013
- Marvell International Ltd.
- Jitendra Kumar Swarnkar
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage system with data recovery function and method thereof
- Patent number 8,418,030
- Issue date Apr 9, 2013
- A-Data Technology Co., Ltd.
- Ming-Dar Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and semiconductor device test method for ident...
- Patent number 8,325,548
- Issue date Dec 4, 2012
- Fujitsu Semiconductor Limited
- Tatsuru Matsuo
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing embedded memories in an integrated circuit
- Patent number 8,209,572
- Issue date Jun 26, 2012
- Mentor Graphics Corporation
- Don E. Ross
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and related testing method
- Patent number 8,201,034
- Issue date Jun 12, 2012
- Nanya Technology Corp.
- Yu-Chin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Control method for semiconductor integrated circuit and semiconduct...
- Patent number 8,127,191
- Issue date Feb 28, 2012
- Fujitsu Semiconductor Limited
- Takashi Maki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor integrated circuit and test system thereof
- Patent number 8,032,803
- Issue date Oct 4, 2011
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device including nonvolatile memory
- Patent number 7,983,096
- Issue date Jul 19, 2011
- Fujitsu Semiconductor Limited
- Kenichiro Kuroki
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
DATA SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY
- Publication number 20230101821
- Publication date Mar 30, 2023
- CHANGXIN MEMORY TECHNOLOGIES, INC
- Zhiqiang ZHANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER, METHOD OF OPERATING THE SAME AND STORAGE DEVICE...
- Publication number 20190287643
- Publication date Sep 19, 2019
- Samsung Electronics Co., Ltd.
- Kwang-hoon KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEAMLESS FAIL ANALYSIS WITH MEMORY EFFICIENT STORAGE OF FAIL LISTS
- Publication number 20150135026
- Publication date May 14, 2015
- Advantest Corporation
- Hanh Lai
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING ELECTRONIC MEMORIES BASED ON FAULT AND TEST ALGORITHM PERIO...
- Publication number 20140380107
- Publication date Dec 25, 2014
- Aram Hakhumyan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and Method for Testing Memory Devices
- Publication number 20140298120
- Publication date Oct 2, 2014
- Integrated Silicon Solution (Shanghai), Inc.
- Mingzhao Tong
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Integrated Circuit with Bist Circuit
- Publication number 20140245087
- Publication date Aug 28, 2014
- Kabushiki Kaisha Toshiba
- Chikako TOKUNAGA
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF-TEST FOR STACKED MEMORY ARCHITECTURE
- Publication number 20140164833
- Publication date Jun 12, 2014
- Darshan Kobla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES AND METHODS OF TESTING OPEN FAILURES T...
- Publication number 20140156213
- Publication date Jun 5, 2014
- Sang Kwon LEE
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MEMORY TEST METHOD
- Publication number 20140068193
- Publication date Mar 6, 2014
- FUJITSU SEMICONDUCTOR LIMITED
- Hitoshi YAMANAKA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TESTING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT TO WHICH THE SA...
- Publication number 20140040686
- Publication date Feb 6, 2014
- Fujitsu Limited
- MASAHIRO YANAGIDA
- G11 - INFORMATION STORAGE
Information Patent Application
Storage Medium and Transmittal System Utilizing the Same
- Publication number 20140036603
- Publication date Feb 6, 2014
- Hsu-Ping Ou
- G11 - INFORMATION STORAGE
Information Patent Application
DEEPLY PIPELINED INTEGRATED MEMORY BUILT-IN SELF-TEST (BIST) SYSTEM...
- Publication number 20130223168
- Publication date Aug 29, 2013
- Avago Technologies Enterprise IP (Singapore) Pte. Ltd.
- Gary L. Taylor
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR INTEGRATED CIRCUIT
- Publication number 20130070545
- Publication date Mar 21, 2013
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING ELECTRONIC MEMORIES BASED ON FAULT AND TEST ALGORITHM PERIO...
- Publication number 20130019130
- Publication date Jan 17, 2013
- Synopsys Inc.
- Aram HAKHUMYAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TEST SYSTEM
- Publication number 20120304032
- Publication date Nov 29, 2012
- Shuo-Fen Kuo
- G11 - INFORMATION STORAGE
Information Patent Application
BUILT-IN SELF TEST CIRCUIT AND DESIGNING APPARATUS
- Publication number 20120246527
- Publication date Sep 27, 2012
- Kabushiki Kaisha Toshiba
- Kenichi Anzou
- G11 - INFORMATION STORAGE
Information Patent Application
WAFER TEST APPARATUS, WAFER TEST METHOD, AND PROGRAM
- Publication number 20120109561
- Publication date May 3, 2012
- Elpida Memory, Inc.
- Satoru Terui
- G01 - MEASURING TESTING
Information Patent Application
TESTING EMBEDDED MEMORIES IN AN INTEGRATED CIRCUIT
- Publication number 20110145774
- Publication date Jun 16, 2011
- Mentor Graphics Corporation
- Don E. Ross
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING NONVOLATILE MEMORY
- Publication number 20110134709
- Publication date Jun 9, 2011
- FUJITSU SEMICONDUCTOR LIMITED
- Kenichiro KUROKI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE TEST METHOD
- Publication number 20100322023
- Publication date Dec 23, 2010
- FUJITSU SEMICONDUCTOR LIMITED
- Tatsuru MATSUO
- G11 - INFORMATION STORAGE
Information Patent Application
DOUBLE DATA RATE MEMORY PHYSICAL INTERFACE HIGH SPEED TESTING USING...
- Publication number 20100251042
- Publication date Sep 30, 2010
- DENALI SOFTWARE, INC.
- John W. Selking
- G01 - MEASURING TESTING
Information Patent Application
Method for Constructing Shmoo Plots for SRAMS
- Publication number 20100232242
- Publication date Sep 16, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Xiaowei Deng
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROL METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCT...
- Publication number 20100218057
- Publication date Aug 26, 2010
- Fujitsu Microelectronics Limited
- Takashi MAKI
- G11 - INFORMATION STORAGE
Information Patent Application
Memory test circuit which tests address access time of clock synchr...
- Publication number 20100027359
- Publication date Feb 4, 2010
- NEC Electronics Corporation
- Akihiro Banno
- G11 - INFORMATION STORAGE
Information Patent Application
TEST SYSTEM AND METHOD
- Publication number 20100023817
- Publication date Jan 28, 2010
- Samsung Electronics Co., Ltd.
- Jae-Woo PARK
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING NONVOLATILE MEMORY
- Publication number 20090316497
- Publication date Dec 24, 2009
- Fujitsu Microelectronics Limited
- Kenichiro KUROKI
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SELF-TEST CIRCUIT, SEMICONDUCTOR DEVICE AND IC CARD INCLUDIN...
- Publication number 20090316488
- Publication date Dec 24, 2009
- PANASONIC CORPORATION
- Kazuki YOSHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Integrated Circuit, Design Support Software System, A...
- Publication number 20090282285
- Publication date Nov 12, 2009
- Kabushiki Kaisha Toshiba
- Tetsu Hasegawa
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE SYSTEM WITH DATA RECOVERY FUNCTION AND METHOD THEREOF
- Publication number 20090282305
- Publication date Nov 12, 2009
- A-DATA TECHNOLOGY CO., LTD.
- MING-DAR CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Logic Built-In Self-Test Diagnostics of Integrated C...
- Publication number 20090254788
- Publication date Oct 8, 2009
- Daniel W. Cervantes
- G01 - MEASURING TESTING

comprising complete test loop

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Data sampling circuit and semiconductor memory

Method of improving read current stability in analog non-volatile m...

Memory controller, method of operating the same and storage device...

Methods for testing a storage unit and apparatuses using the same

Method and apparatus for generating featured test pattern

Testing electronic memories based on fault and test algorithm perio...

Semiconductor memory devices and methods of testing open failures t...

Auto-blow memory repair

Semiconductor integrated circuit with bist circuit

Circuit and method for testing memory devices

BIST circuit

Semiconductor integrated circuit capable of performing self-test

Built-in self-test for stacked memory architecture

Seamless fail analysis with memory efficient storage of fail lists

Storage medium and transmittal system utilizing the same

Double data rate memory physical interface high speed testing using...

Test system which shares a register in different modes

Deeply pipelined integrated memory built-in self-test (BIST) system...

Built-in self test circuit and designing apparatus

Semiconductor integrated circuit

Method and apparatus for verifying memory testing software

Method and system for accelerating memory randomization

Automated scan testing of a system-on-chip (SoC)

Storage system with data recovery function and method thereof

Semiconductor device and semiconductor device test method for ident...

Testing embedded memories in an integrated circuit

Memory device and related testing method

Control method for semiconductor integrated circuit and semiconduct...

Semiconductor integrated circuit and test system thereof

Semiconductor device including nonvolatile memory

Patents Applicationslast 30 patents

DATA SAMPLING CIRCUIT AND SEMICONDUCTOR MEMORY

MEMORY CONTROLLER, METHOD OF OPERATING THE SAME AND STORAGE DEVICE...

SEAMLESS FAIL ANALYSIS WITH MEMORY EFFICIENT STORAGE OF FAIL LISTS

TESTING ELECTRONIC MEMORIES BASED ON FAULT AND TEST ALGORITHM PERIO...

Circuit and Method for Testing Memory Devices

Semiconductor Integrated Circuit with Bist Circuit

BUILT-IN SELF-TEST FOR STACKED MEMORY ARCHITECTURE

SEMICONDUCTOR MEMORY DEVICES AND METHODS OF TESTING OPEN FAILURES T...

SEMICONDUCTOR DEVICE AND MEMORY TEST METHOD

TESTING METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT TO WHICH THE SA...

Storage Medium and Transmittal System Utilizing the Same

DEEPLY PIPELINED INTEGRATED MEMORY BUILT-IN SELF-TEST (BIST) SYSTEM...

SEMICONDUCTOR INTEGRATED CIRCUIT

TESTING ELECTRONIC MEMORIES BASED ON FAULT AND TEST ALGORITHM PERIO...

TEST SYSTEM

BUILT-IN SELF TEST CIRCUIT AND DESIGNING APPARATUS

WAFER TEST APPARATUS, WAFER TEST METHOD, AND PROGRAM

TESTING EMBEDDED MEMORIES IN AN INTEGRATED CIRCUIT

SEMICONDUCTOR DEVICE INCLUDING NONVOLATILE MEMORY

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE TEST METHOD

DOUBLE DATA RATE MEMORY PHYSICAL INTERFACE HIGH SPEED TESTING USING...

Method for Constructing Shmoo Plots for SRAMS

CONTROL METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCT...

Memory test circuit which tests address access time of clock synchr...

TEST SYSTEM AND METHOD

SEMICONDUCTOR DEVICE INCLUDING NONVOLATILE MEMORY

MEMORY SELF-TEST CIRCUIT, SEMICONDUCTOR DEVICE AND IC CARD INCLUDIN...

Semiconductor Integrated Circuit, Design Support Software System, A...

STORAGE SYSTEM WITH DATA RECOVERY FUNCTION AND METHOD THEREOF

Techniques for Logic Built-In Self-Test Diagnostics of Integrated C...