Concurrent multilevel programming and programming verification

Industry

CPC
G11C2211/5624

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C2211/5624Concurrent multilevel programming and programming verification

Industries

Patents Grantslast 30 patents

Information Patent Grant
Adjustment of program verify targets corresponding to a last progra...
- Patent number 12,040,026
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent programming of multiple cells for non-volatile memory de...
- Patent number 11,545,221
- Issue date Jan 3, 2023
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic programming of valley margins
- Patent number 11,373,712
- Issue date Jun 28, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent programming of multiple cells for non-volatile memory de...
- Patent number 11,342,028
- Issue date May 24, 2022
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dragging first pass read level thresholds based on changes in secon...
- Patent number 11,309,020
- Issue date Apr 19, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjustment of program verify targets corresponding to a last progra...
- Patent number 11,189,352
- Issue date Nov 30, 2021
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent programming of multiple cells for non-volatile memory de...
- Patent number 10,978,156
- Issue date Apr 13, 2021
- SanDisk Technologies LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Dragging first pass read level thresholds based on changes in secon...
- Patent number 10,885,975
- Issue date Jan 5, 2021
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic programing of valley margins of a memory cell
- Patent number 10,748,625
- Issue date Aug 18, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Misplacement mitigation algorithm
- Patent number 10,607,693
- Issue date Mar 31, 2020
- Micron Technology, Inc.
- Giuseppe Cariello
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 10,468,094
- Issue date Nov 5, 2019
- TOSHIBA MEMORY CORPORATION
- Hayao Kasai
- G11 - INFORMATION STORAGE
Information Patent Grant
Programming of nonvolatile memory with verify level dependent on me...
- Patent number 10,157,681
- Issue date Dec 18, 2018
- SanDisk Technologies LLC
- Nima Mokhlesi
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for writing into and reading a multi-levels EEPROM and corre...
- Patent number 9,899,090
- Issue date Feb 20, 2018
- STMicroelectronics (Rousset) SAS
- Francois Tailliet
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-state read or verify in non-volatile storage
- Patent number RE46573
- Issue date Oct 17, 2017
- Sandisk IL Ltd.
- Eran Sharon
Information Patent Grant
Method for writing into and reading a multi-levels EEPROM and corre...
- Patent number 9,711,230
- Issue date Jul 18, 2017
- STMicroelectronics (Rousset) SAS
- Francois Tailliet
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system including semiconductor memory device and program met...
- Patent number 9,564,189
- Issue date Feb 7, 2017
- SK Hynix Inc.
- Ju Hyeon Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Auto low current programming method without verify
- Patent number 9,514,806
- Issue date Dec 6, 2016
- Integrated Silicon Solution, Inc.
- Sung Jin Yoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi level antifuse memory device and method of operating the same
- Patent number 9,502,132
- Issue date Nov 22, 2016
- Samsung Electronics Co., Ltd.
- Min-Soo Jang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for reducing write-buffer capacities within memri...
- Patent number 9,405,614
- Issue date Aug 2, 2016
- Hewlett Packard Enterprise Development LP
- Erik Ordentlich
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit for switching a memristive device
- Patent number 9,324,421
- Issue date Apr 26, 2016
- Hewlett Packard Enterprise Development LP
- Frederick Perner
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage apparatus or semiconductor memory module
- Patent number 9,111,605
- Issue date Aug 18, 2015
- Hitachi, Ltd.
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading soft bits simultaneously
- Patent number 9,070,475
- Issue date Jun 30, 2015
- Sandisk IL Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-level binary search in non-volatile storage
- Patent number 8,873,285
- Issue date Oct 28, 2014
- SanDisk II, Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage apparatus or semiconductor memory module
- Patent number 8,614,922
- Issue date Dec 24, 2013
- Hitachi, Ltd.
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-state read or verify in non-volatile storage
- Patent number 8,509,000
- Issue date Aug 13, 2013
- Sandisk IL Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with write feedback
- Patent number 8,331,129
- Issue date Dec 11, 2012
- Hewlett-Packard Development Company, L.P.
- Wei Yi
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-state read or verify in non-volatile storage
- Patent number 8,233,324
- Issue date Jul 31, 2012
- Sandisk IL Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with fast binary programming and reduced power...
- Patent number 8,107,298
- Issue date Jan 31, 2012
- SanDisk Technologies Inc.
- Man L. Mui
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for protecting memory cells during programming
- Patent number 7,589,989
- Issue date Sep 15, 2009
- Sandisk 3D LLC
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient verification for coarse/fine programming of non volatile...
- Patent number 7,518,928
- Issue date Apr 14, 2009
- SanDisk Corporation
- Daniel C. Guterman
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20240331780
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20220044742
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...
- Publication number 20210358553
- Publication date Nov 18, 2021
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...
- Publication number 20210233589
- Publication date Jul 29, 2021
- SANDISK TECHNOLOGIES LLC
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Application
DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...
- Publication number 20210183439
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC PROGRAMMING OF VALLEY MARGINS
- Publication number 20200372962
- Publication date Nov 26, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...
- Publication number 20200286551
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC PROGRAMING OF VALLEY MARGINS OF A MEMORY CELL
- Publication number 20200286568
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20200286567
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...
- Publication number 20200005871
- Publication date Jan 2, 2020
- SanDisk Technologies LLC
- Xiang YANG
- G11 - INFORMATION STORAGE
Information Patent Application
MISPLACEMENT MITIGATION ALGORITHM
- Publication number 20200005862
- Publication date Jan 2, 2020
- Micron Technology, Inc.
- Giuseppe Cariello
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR WRITING INTO AND READING A MULTI-LEVELS EEPROM AND CORRE...
- Publication number 20170263320
- Publication date Sep 14, 2017
- STMicroelectronics (Rousset) SAS
- Francois Tailliet
- G11 - INFORMATION STORAGE
Information Patent Application
READING SOFT BITS SIMULTANEOUSLY
- Publication number 20140362646
- Publication date Dec 11, 2014
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT DATA-STORAGE DEVICES THAT INCLUDE MEMORY ELEMENTS CHARACT...
- Publication number 20140164869
- Publication date Jun 12, 2014
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR REDUCING WRITE-BUFFER CAPACITIES WITHIN MEMRI...
- Publication number 20140149824
- Publication date May 29, 2014
- Erik Ordentlich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING
- Publication number 20140071761
- Publication date Mar 13, 2014
- SANDISK TECHNOLOGIES INC.
- Eran Sharon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE
- Publication number 20140056062
- Publication date Feb 27, 2014
- Hitachi, Ltd
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI LEVEL ANTIFUSE MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20140022855
- Publication date Jan 23, 2014
- MIN-SOO JANG
- G11 - INFORMATION STORAGE
Information Patent Application
SIMULTANEOUS MULTI-LEVEL BINARY SEARCH IN NON-VOLATILE STORAGE
- Publication number 20130294169
- Publication date Nov 7, 2013
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND CIRCUIT FOR SWITCHING A MEMRISTIVE DEVICE
- Publication number 20130235651
- Publication date Sep 12, 2013
- Frederick Perner
- G11 - INFORMATION STORAGE
Information Patent Application
SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE
- Publication number 20120250415
- Publication date Oct 4, 2012
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE
- Publication number 20120155162
- Publication date Jun 21, 2012
- Hitachi, Ltd.
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH WRITE FEEDBACK
- Publication number 20120057390
- Publication date Mar 8, 2012
- Wei Yi
- G11 - INFORMATION STORAGE
Information Patent Application
SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE
- Publication number 20110235420
- Publication date Sep 29, 2011
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY WITH FAST BINARY PROGRAMMING AND REDUCED POWER...
- Publication number 20110188317
- Publication date Aug 4, 2011
- Man L. Mui
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR PROTECTING MEMORY CELLS DURING PROGRAMMING
- Publication number 20080094892
- Publication date Apr 24, 2008
- Luca G. Fasoli
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON-VOLATILE...
- Publication number 20070091685
- Publication date Apr 26, 2007
- Daniel C. Guterman
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON VOLATILE...
- Publication number 20070058436
- Publication date Mar 15, 2007
- Daniel C. Guterman
- G11 - INFORMATION STORAGE
Information Patent Application
Charge packet metering for coarse/fine programming of non-volatile...
- Publication number 20060221700
- Publication date Oct 5, 2006
- SanDisk Corporation
- Daniel C. Guterman
- G11 - INFORMATION STORAGE
Information Patent Application
Charge packet metering for coarse/fine programming of non-volatile...
- Publication number 20060203563
- Publication date Sep 14, 2006
- SanDisk Corporation
- Daniel C. Guterman
- G11 - INFORMATION STORAGE

Concurrent multilevel programming and programming verification

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Adjustment of program verify targets corresponding to a last progra...

Concurrent programming of multiple cells for non-volatile memory de...

Dynamic programming of valley margins

Concurrent programming of multiple cells for non-volatile memory de...

Dragging first pass read level thresholds based on changes in secon...

Adjustment of program verify targets corresponding to a last progra...

Concurrent programming of multiple cells for non-volatile memory de...

Dragging first pass read level thresholds based on changes in secon...

Dynamic programing of valley margins of a memory cell

Misplacement mitigation algorithm

Semiconductor memory device

Programming of nonvolatile memory with verify level dependent on me...

Method for writing into and reading a multi-levels EEPROM and corre...

Simultaneous multi-state read or verify in non-volatile storage

Method for writing into and reading a multi-levels EEPROM and corre...

Memory system including semiconductor memory device and program met...

Auto low current programming method without verify

Multi level antifuse memory device and method of operating the same

Method and system for reducing write-buffer capacities within memri...

Method and circuit for switching a memristive device

Semiconductor storage apparatus or semiconductor memory module

Reading soft bits simultaneously

Simultaneous multi-level binary search in non-volatile storage

Semiconductor storage apparatus or semiconductor memory module

Simultaneous multi-state read or verify in non-volatile storage

Memory array with write feedback

Simultaneous multi-state read or verify in non-volatile storage

Non-volatile memory with fast binary programming and reduced power...

Method for protecting memory cells during programming

Efficient verification for coarse/fine programming of non volatile...

Patents Applicationslast 30 patents

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...

CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...

DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...

DYNAMIC PROGRAMMING OF VALLEY MARGINS

DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...

DYNAMIC PROGRAMING OF VALLEY MARGINS OF A MEMORY CELL

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

CONCURRENT PROGRAMMING OF MULTIPLE CELLS FOR NON-VOLATILE MEMORY DE...

MISPLACEMENT MITIGATION ALGORITHM

METHOD FOR WRITING INTO AND READING A MULTI-LEVELS EEPROM AND CORRE...

READING SOFT BITS SIMULTANEOUSLY

EFFICIENT DATA-STORAGE DEVICES THAT INCLUDE MEMORY ELEMENTS CHARACT...

METHOD AND SYSTEM FOR REDUCING WRITE-BUFFER CAPACITIES WITHIN MEMRI...

NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING

SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE

MULTI LEVEL ANTIFUSE MEMORY DEVICE AND METHOD OF OPERATING THE SAME

SIMULTANEOUS MULTI-LEVEL BINARY SEARCH IN NON-VOLATILE STORAGE

METHOD AND CIRCUIT FOR SWITCHING A MEMRISTIVE DEVICE

SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE

SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE

MEMORY ARRAY WITH WRITE FEEDBACK

SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE

NON-VOLATILE MEMORY WITH FAST BINARY PROGRAMMING AND REDUCED POWER...

METHOD FOR PROTECTING MEMORY CELLS DURING PROGRAMMING

EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON-VOLATILE...

EFFICIENT VERIFICATION FOR COARSE/FINE PROGRAMMING OF NON VOLATILE...

Charge packet metering for coarse/fine programming of non-volatile...

Charge packet metering for coarse/fine programming of non-volatile...