Concurrent multilevel programming and reading

Industry

CPC
G11C2211/5623

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C2211/5623Concurrent multilevel programming and reading

Industries

Patents Grantslast 30 patents

Information Patent Grant
Adjustment of program verify targets corresponding to a last progra...
- Patent number 12,040,026
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for memory devices
- Patent number 11,562,787
- Issue date Jan 24, 2023
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient programming schemes in a nonvolatile memory
- Patent number 11,550,657
- Issue date Jan 10, 2023
- Apple Inc.
- Assaf Shappir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic programming of valley margins
- Patent number 11,373,712
- Issue date Jun 28, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Dragging first pass read level thresholds based on changes in secon...
- Patent number 11,309,020
- Issue date Apr 19, 2022
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjustment of program verify targets corresponding to a last progra...
- Patent number 11,189,352
- Issue date Nov 30, 2021
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent read and reconfigured write operations in a memory device
- Patent number 11,094,375
- Issue date Aug 17, 2021
- Adesto Technologies Corporation
- Gideon Intrater
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for memory devices
- Patent number 11,087,836
- Issue date Aug 10, 2021
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dragging first pass read level thresholds based on changes in secon...
- Patent number 10,885,975
- Issue date Jan 5, 2021
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-state programming for memory devices
- Patent number 10,878,896
- Issue date Dec 29, 2020
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-state programming for memory devices
- Patent number 10,748,606
- Issue date Aug 18, 2020
- Western Digital Technologies, Inc.
- Richard David Barndt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic programing of valley margins of a memory cell
- Patent number 10,748,625
- Issue date Aug 18, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent read and reconfigured write operations in a memory device
- Patent number 10,636,480
- Issue date Apr 28, 2020
- Adesto Technologies Corporation
- Gideon Intrater
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay programming requests in flash memory
- Patent number 10,347,346
- Issue date Jul 9, 2019
- International Business Machines Corporation
- Saravanan Sethuraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to perform concurrent read and write memory op...
- Patent number 9,513,992
- Issue date Dec 6, 2016
- Micron Technology, Inc.
- Graziano Mirichigni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Nonvolatile memory device using variable resistive element
- Patent number 9,336,877
- Issue date May 10, 2016
- Samsung Electronics Co., Ltd.
- Jae-Yun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to perform concurrent read and write memory op...
- Patent number 9,208,019
- Issue date Dec 8, 2015
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage apparatus or semiconductor memory module
- Patent number 9,111,605
- Issue date Aug 18, 2015
- Hitachi, Ltd.
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and data processing system
- Patent number 8,773,919
- Issue date Jul 8, 2014
- Hitachi, Ltd.
- Seiji Miura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 8,773,889
- Issue date Jul 8, 2014
- Kabushiki Kaisha Toshiba
- Naoya Tokiwa
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage apparatus or semiconductor memory module
- Patent number 8,614,922
- Issue date Dec 24, 2013
- Hitachi, Ltd.
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to perform concurrent read and write memory op...
- Patent number 8,583,987
- Issue date Nov 12, 2013
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 8,400,814
- Issue date Mar 19, 2013
- Kabushiki Kaisha Toshiba
- Naoya Tokiwa
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive algorithm in cache operation with dynamic data latch requi...
- Patent number 7,961,512
- Issue date Jun 14, 2011
- SanDisk Corporation
- Yan Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory apparatus
- Patent number 7,911,824
- Issue date Mar 22, 2011
- Panasonic Corporation
- Ken Kawai
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile storage using current sensing with biasing of source a...
- Patent number 7,539,060
- Issue date May 26, 2009
- SanDisk Corporation
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile storage with current sensing of negative threshold vol...
- Patent number 7,532,516
- Issue date May 12, 2009
- SanDisk Corporation
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for current sensing with biasing of source and P-well in non...
- Patent number 7,489,554
- Issue date Feb 10, 2009
- SanDisk Corporation
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for sensing negative threshold voltages in non-volatile stor...
- Patent number 7,447,079
- Issue date Nov 4, 2008
- SanDisk Corporation
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 6,947,322
- Issue date Sep 20, 2005
- Sharp Kabushiki Kaisha
- Shinsuke Anzai
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20240331780
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20220044742
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-State Programming for Memory Devices
- Publication number 20210319828
- Publication date Oct 14, 2021
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...
- Publication number 20210183439
- Publication date Jun 17, 2021
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-State Programming for Memory Devices
- Publication number 20210104275
- Publication date Apr 8, 2021
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PROGRAMMING OF VALLEY MARGINS
- Publication number 20200372962
- Publication date Nov 26, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
Multi-State Programming for Memory Devices
- Publication number 20200350007
- Publication date Nov 5, 2020
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...
- Publication number 20200286551
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC PROGRAMING OF VALLEY MARGINS OF A MEMORY CELL
- Publication number 20200286568
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Michael Sheperek
- G11 - INFORMATION STORAGE
Information Patent Application
ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...
- Publication number 20200286567
- Publication date Sep 10, 2020
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-STATE PROGRAMMING FOR MEMORY DEVICES
- Publication number 20200194064
- Publication date Jun 18, 2020
- Western Digital Technologies, Inc.
- Richard David BARNDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT READ AND RECONFIGURED WRITE OPERATIONS IN A MEMORY DEVICE
- Publication number 20180166130
- Publication date Jun 14, 2018
- Adesto Technologies Corporation
- Gideon Intrater
- G11 - INFORMATION STORAGE
Information Patent Application
DELAYING PROGRAMMING REQUESTS IN FLASH MEMORY
- Publication number 20180102176
- Publication date Apr 12, 2018
- International Business Machines Corporation
- Saravanan SETHURAMAN
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS TO PERFORM CONCURRENT READ AND WRITE MEMORY OP...
- Publication number 20140068380
- Publication date Mar 6, 2014
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE
- Publication number 20140056062
- Publication date Feb 27, 2014
- Hitachi, Ltd
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20130163309
- Publication date Jun 27, 2013
- KABUSHIKI KAISHA TOSHIBA
- Naoya Tokiwa
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE
- Publication number 20120155162
- Publication date Jun 21, 2012
- Hitachi, Ltd.
- Satoru Hanzawa
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor Device and Data Processing System
- Publication number 20120134203
- Publication date May 31, 2012
- Hitachi, Ltd
- Seiji Miura
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS TO PERFORM CONCURRENT READ AND WRITE MEMORY OP...
- Publication number 20120124449
- Publication date May 17, 2012
- Micron Technology, Inc.
- Graziano Mirichigni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20100277968
- Publication date Nov 4, 2010
- Naoya Tokiwa
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE AND METHOD SYSTEM INCLUDING THE SAME
- Publication number 20100238705
- Publication date Sep 23, 2010
- Yong June Kim
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY APPARATUS
- Publication number 20100103723
- Publication date Apr 29, 2010
- Ken Kawai
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive Algorithm in Cache Operation with Dynamic Data Latch Requi...
- Publication number 20090237998
- Publication date Sep 24, 2009
- Yan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DUR...
- Publication number 20080247253
- Publication date Oct 9, 2008
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR TEMPERATURE COMPENSATING BIT LINE DURING SENSE OPERATIO...
- Publication number 20080247254
- Publication date Oct 9, 2008
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE STORAGE WITH CURRENT SENSING OF NEGATIVE THRESHOLD VOL...
- Publication number 20080247228
- Publication date Oct 9, 2008
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE STORAGE USING CURRENT SENSING WITH BIASING OF SOURCE A...
- Publication number 20080247229
- Publication date Oct 9, 2008
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR CURRENT SENSING WITH BIASING OF SOURCE AND P-WELL IN NON...
- Publication number 20080247239
- Publication date Oct 9, 2008
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR SENSING NEGATIVE THRESHOLD VOLTAGES IN NON-VOLATILE STOR...
- Publication number 20080247238
- Publication date Oct 9, 2008
- Hao Thai Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device
- Publication number 20040114430
- Publication date Jun 17, 2004
- Shinsuke Anzai
- G11 - INFORMATION STORAGE

Concurrent multilevel programming and reading

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Adjustment of program verify targets corresponding to a last progra...

Multi-state programming for memory devices

Efficient programming schemes in a nonvolatile memory

Dynamic programming of valley margins

Dragging first pass read level thresholds based on changes in secon...

Adjustment of program verify targets corresponding to a last progra...

Concurrent read and reconfigured write operations in a memory device

Multi-state programming for memory devices

Dragging first pass read level thresholds based on changes in secon...

Multi-state programming for memory devices

Multi-state programming for memory devices

Dynamic programing of valley margins of a memory cell

Concurrent read and reconfigured write operations in a memory device

Delay programming requests in flash memory

Method and apparatus to perform concurrent read and write memory op...

Nonvolatile memory device using variable resistive element

Method and apparatus to perform concurrent read and write memory op...

Semiconductor storage apparatus or semiconductor memory module

Semiconductor device and data processing system

Semiconductor memory device

Semiconductor storage apparatus or semiconductor memory module

Method and apparatus to perform concurrent read and write memory op...

Semiconductor memory device

Adaptive algorithm in cache operation with dynamic data latch requi...

Nonvolatile memory apparatus

Non-volatile storage using current sensing with biasing of source a...

Non-volatile storage with current sensing of negative threshold vol...

Method for current sensing with biasing of source and P-well in non...

Method for sensing negative threshold voltages in non-volatile stor...

Semiconductor memory device

Patents Applicationslast 30 patents

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

Multi-State Programming for Memory Devices

DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...

Multi-State Programming for Memory Devices

DYNAMIC PROGRAMMING OF VALLEY MARGINS

Multi-State Programming for Memory Devices

DRAGGING FIRST PASS READ LEVEL THRESHOLDS BASED ON CHANGES IN SECON...

DYNAMIC PROGRAMING OF VALLEY MARGINS OF A MEMORY CELL

ADJUSTMENT OF PROGRAM VERIFY TARGETS CORRESPONDING TO A LAST PROGRA...

MULTI-STATE PROGRAMMING FOR MEMORY DEVICES

CONCURRENT READ AND RECONFIGURED WRITE OPERATIONS IN A MEMORY DEVICE

DELAYING PROGRAMMING REQUESTS IN FLASH MEMORY

METHOD AND APPARATUS TO PERFORM CONCURRENT READ AND WRITE MEMORY OP...

SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE

SEMICONDUCTOR MEMORY DEVICE

SEMICONDUCTOR STORAGE APPARATUS OR SEMICONDUCTOR MEMORY MODULE

Semiconductor Device and Data Processing System

METHOD AND APPARATUS TO PERFORM CONCURRENT READ AND WRITE MEMORY OP...

SEMICONDUCTOR MEMORY DEVICE

NONVOLATILE MEMORY DEVICE AND METHOD SYSTEM INCLUDING THE SAME

NONVOLATILE MEMORY APPARATUS

Adaptive Algorithm in Cache Operation with Dynamic Data Latch Requi...

NON-VOLATILE STORAGE WITH TEMPERATURE COMPENSATION FOR BIT LINE DUR...

METHOD FOR TEMPERATURE COMPENSATING BIT LINE DURING SENSE OPERATIO...

NON-VOLATILE STORAGE WITH CURRENT SENSING OF NEGATIVE THRESHOLD VOL...

NON-VOLATILE STORAGE USING CURRENT SENSING WITH BIASING OF SOURCE A...

METHOD FOR CURRENT SENSING WITH BIASING OF SOURCE AND P-WELL IN NON...

METHOD FOR SENSING NEGATIVE THRESHOLD VOLTAGES IN NON-VOLATILE STOR...

Semiconductor memory device