Concurrent multilevel reading of more than one cell

Industry

CPC
G11C2211/5631

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C2211/5631Concurrent multilevel reading of more than one cell

Industries

Patents Grantslast 30 patents

Information Patent Grant
Asynchronous multi-plane independent scheme dynamic analog resource...
- Patent number 11,901,034
- Issue date Feb 13, 2024
- Yangtze Memory Technologies Co., Ltd.
- Jason Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile computing method in flash memory
- Patent number 11,132,176
- Issue date Sep 28, 2021
- Macronix International Co., Ltd.
- Chun-Hsiung Hung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Permutation coding for improved memory cell operations
- Patent number 10,796,756
- Issue date Oct 6, 2020
- Micron Technology, Inc.
- Paolo Amato
- G11 - INFORMATION STORAGE
Information Patent Grant
Permutation coding for improved memory cell operations
- Patent number 10,796,755
- Issue date Oct 6, 2020
- Micron Technology, Inc.
- Paolo Amato
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and operating method thereof
- Patent number 10,770,151
- Issue date Sep 8, 2020
- SK Hynix Inc.
- Dong Uk Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Misplacement mitigation algorithm
- Patent number 10,607,693
- Issue date Mar 31, 2020
- Micron Technology, Inc.
- Giuseppe Cariello
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and operating method thereof
- Patent number 10,580,500
- Issue date Mar 3, 2020
- SK Hynix Inc.
- Dong Uk Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and operating method thereof
- Patent number 10,573,380
- Issue date Feb 25, 2020
- SK Hynix Inc.
- Nam Oh Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for performing a concurrent multiple page read of...
- Patent number 10,438,656
- Issue date Oct 8, 2019
- Intel Corporation
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-state read or verify in non-volatile storage
- Patent number RE46573
- Issue date Oct 17, 2017
- Sandisk IL Ltd.
- Eran Sharon
Information Patent Grant
Resistive memory sensing methods and devices
- Patent number 9,779,806
- Issue date Oct 3, 2017
- Micron Technology, Inc.
- Adam D. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and operating method thereof
- Patent number 9,570,178
- Issue date Feb 14, 2017
- SK Hynix Inc.
- Byoung In Joo
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading soft bits simultaneously
- Patent number 9,070,475
- Issue date Jun 30, 2015
- Sandisk IL Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-level binary search in non-volatile storage
- Patent number 8,873,285
- Issue date Oct 28, 2014
- SanDisk II, Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-state read or verify in non-volatile storage
- Patent number 8,509,000
- Issue date Aug 13, 2013
- Sandisk IL Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory sensing methods and devices
- Patent number 8,482,955
- Issue date Jul 9, 2013
- Micron Technology, Inc.
- Adam D. Johnson
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous multi-state read or verify in non-volatile storage
- Patent number 8,233,324
- Issue date Jul 31, 2012
- Sandisk IL Ltd.
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change memory structure with multiple resistance states and m...
- Patent number 7,952,919
- Issue date May 31, 2011
- Micron Technology, Inc.
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device
- Patent number 7,869,260
- Issue date Jan 11, 2011
- Kabushiki Kaisha Toshiba
- Yoshihiro Ueda
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change memory structure with multiple resistance states and m...
- Patent number 7,859,893
- Issue date Dec 28, 2010
- Micron Technology, Inc.
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Compensating for variations in memory cell programmed state distrib...
- Patent number 7,830,708
- Issue date Nov 9, 2010
- Seagate Technology LLC
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance change memory device
- Patent number 7,663,132
- Issue date Feb 16, 2010
- Kabushiki Kaisha Toshiba
- Haruki Toda
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistance change memory device
- Patent number 7,623,370
- Issue date Nov 24, 2009
- Kabushiki Kaisha Toshiba
- Haruki Toda
- G11 - INFORMATION STORAGE
Information Patent Grant
Operation sequence and commands for measuring threshold voltage dis...
- Patent number 7,613,045
- Issue date Nov 3, 2009
- Sandisk IL, Ltd
- Mark Murin
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading a multi-level passive element memory cell array
- Patent number 7,542,338
- Issue date Jun 2, 2009
- Sandisk 3D LLC
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 7,529,130
- Issue date May 5, 2009
- Kabushiki Kaisha Toshiba
- Haruki Toda
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for power-saving multi-pass sensing in non-volatile memory
- Patent number 7,447,094
- Issue date Nov 4, 2008
- SanDisk Corporation
- Shou-Chang Tsao
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory device circuit
- Patent number 7,426,131
- Issue date Sep 16, 2008
- Adesto Technologies
- Nad Edward Gilbert
- G11 - INFORMATION STORAGE
Information Patent Grant
Sense amplifier circuit for parallel sensing of four current levels
- Patent number 7,330,375
- Issue date Feb 12, 2008
- Atmel Corporation
- Jean-Michel Daga
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory device and architecture with multi level cells
- Patent number 7,082,056
- Issue date Jul 25, 2006
- Super Talent Electronics, Inc.
- Ben Wei Chen
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE COMPUTING METHOD IN FLASH MEMORY
- Publication number 20200301667
- Publication date Sep 24, 2020
- Macronix International Co., Ltd.
- Chun-Hsiung HUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MISPLACEMENT MITIGATION ALGORITHM
- Publication number 20200005862
- Publication date Jan 2, 2020
- Micron Technology, Inc.
- Giuseppe Cariello
- G11 - INFORMATION STORAGE
Information Patent Application
PERMUTATION CODING FOR IMPROVED MEMORY CELL OPERATIONS
- Publication number 20190355413
- Publication date Nov 21, 2019
- Micron Technology, Inc.
- Paolo Amato
- G11 - INFORMATION STORAGE
Information Patent Application
PERMUTATION CODING FOR IMPROVED MEMORY CELL OPERATIONS
- Publication number 20190325953
- Publication date Oct 24, 2019
- Micron Technology, Inc.
- Paolo Amato
- G11 - INFORMATION STORAGE
Information Patent Application
READING SOFT BITS SIMULTANEOUSLY
- Publication number 20140362646
- Publication date Dec 11, 2014
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING
- Publication number 20140071761
- Publication date Mar 13, 2014
- SANDISK TECHNOLOGIES INC.
- Eran Sharon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMULTANEOUS MULTI-LEVEL BINARY SEARCH IN NON-VOLATILE STORAGE
- Publication number 20130294169
- Publication date Nov 7, 2013
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY SENSING METHODS AND DEVICES
- Publication number 20130294148
- Publication date Nov 7, 2013
- Adam D. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE
- Publication number 20120250415
- Publication date Oct 4, 2012
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY SENSING METHODS AND DEVICES
- Publication number 20120218807
- Publication date Aug 30, 2012
- Micron Technology, Inc.
- Adam D. Johnson
- G11 - INFORMATION STORAGE
Information Patent Application
SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE
- Publication number 20110235420
- Publication date Sep 29, 2011
- Eran Sharon
- G11 - INFORMATION STORAGE
Information Patent Application
PHASE CHANGE MEMORY STRUCTURE WITH MULTIPLE RESISTANCE STATES AND M...
- Publication number 20110062409
- Publication date Mar 17, 2011
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Compensating for Variations in Memory Cell Programmed State Distrib...
- Publication number 20100271875
- Publication date Oct 28, 2010
- Seagate Technology LLC
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE
- Publication number 20090323395
- Publication date Dec 31, 2009
- Kabushiki Kaisha Toshiba
- Yoshihiro UEDA
- G11 - INFORMATION STORAGE
Information Patent Application
OPERATION SEQUENCE AND COMMANDS FOR MEASURING THRESHOLD VOLTAGE DIS...
- Publication number 20090135646
- Publication date May 28, 2009
- Mark Murin
- G11 - INFORMATION STORAGE
Information Patent Application
Phase change memory structure with multiple resistance states and m...
- Publication number 20080298114
- Publication date Dec 4, 2008
- Micron Technology, Inc.
- Jin Liu
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR READING A MULTI-LEVEL PASSIVE ELEMENT MEMORY CELL ARRAY
- Publication number 20080025089
- Publication date Jan 31, 2008
- Roy E. Scheuerlein
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTANCE CHANGE MEMORY DEVICE
- Publication number 20080002457
- Publication date Jan 3, 2008
- Kabushiki Kaisha Toshiba
- Haruki Toda
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTANCE CHANGE MEMORY DEVICE
- Publication number 20080002456
- Publication date Jan 3, 2008
- Kabushiki Kaisha Toshiba
- Haruki Toda
- G11 - INFORMATION STORAGE
Information Patent Application
Method for power-saving multi-pass sensing in non-volatile memory
- Publication number 20070153604
- Publication date Jul 5, 2007
- Shou-Chang Tsao
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE MEMORY DEVICE CIRCUIT
- Publication number 20070121368
- Publication date May 31, 2007
- Nad Edward Gilbert
- G11 - INFORMATION STORAGE
Information Patent Application
Sense amplifier circuit for parallel sensing of four current levels
- Publication number 20060256619
- Publication date Nov 16, 2006
- Jean-Michel Daga
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device
- Publication number 20060239073
- Publication date Oct 26, 2006
- KABUSHIKI KAISHA TOSHIBA
- Haruki Toda
- G11 - INFORMATION STORAGE
Information Patent Application
Highly compact Eprom and flash EEprom devices
- Publication number 20050243601
- Publication date Nov 3, 2005
- Eliyahou Harari
- G11 - INFORMATION STORAGE
Information Patent Application
Flash memory device and architecture with multi level cells
- Publication number 20050201148
- Publication date Sep 15, 2005
- Super Talent Electronics, Inc.
- Ben Wei Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Highly compact Eprom and flash EEprom devices
- Publication number 20030218920
- Publication date Nov 27, 2003
- SanDisk Corporation
- Eliyahou Harari
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY DEVICE HAVING HIGH SPEED PAGE MODE OPERATION
- Publication number 20020145908
- Publication date Oct 10, 2002
- Cheng-Chung Tsao
- G11 - INFORMATION STORAGE

Concurrent multilevel reading of more than one cell

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Asynchronous multi-plane independent scheme dynamic analog resource...

Non-volatile computing method in flash memory

Permutation coding for improved memory cell operations

Permutation coding for improved memory cell operations

Semiconductor memory device and operating method thereof

Misplacement mitigation algorithm

Semiconductor memory device and operating method thereof

Memory device and operating method thereof

System and method for performing a concurrent multiple page read of...

Simultaneous multi-state read or verify in non-volatile storage

Resistive memory sensing methods and devices

Semiconductor memory device and operating method thereof

Reading soft bits simultaneously

Simultaneous multi-level binary search in non-volatile storage

Simultaneous multi-state read or verify in non-volatile storage

Resistive memory sensing methods and devices

Simultaneous multi-state read or verify in non-volatile storage

Phase change memory structure with multiple resistance states and m...

Semiconductor storage device

Phase change memory structure with multiple resistance states and m...

Compensating for variations in memory cell programmed state distrib...

Resistance change memory device

Resistance change memory device

Operation sequence and commands for measuring threshold voltage dis...

Method for reading a multi-level passive element memory cell array

Semiconductor memory device

Method for power-saving multi-pass sensing in non-volatile memory

Programmable memory device circuit

Sense amplifier circuit for parallel sensing of four current levels

Flash memory device and architecture with multi level cells

Patents Applicationslast 30 patents

NON-VOLATILE COMPUTING METHOD IN FLASH MEMORY

MISPLACEMENT MITIGATION ALGORITHM

PERMUTATION CODING FOR IMPROVED MEMORY CELL OPERATIONS

PERMUTATION CODING FOR IMPROVED MEMORY CELL OPERATIONS

READING SOFT BITS SIMULTANEOUSLY

NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING

SIMULTANEOUS MULTI-LEVEL BINARY SEARCH IN NON-VOLATILE STORAGE

RESISTIVE MEMORY SENSING METHODS AND DEVICES

SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE

RESISTIVE MEMORY SENSING METHODS AND DEVICES

SIMULTANEOUS MULTI-STATE READ OR VERIFY IN NON-VOLATILE STORAGE

PHASE CHANGE MEMORY STRUCTURE WITH MULTIPLE RESISTANCE STATES AND M...

Compensating for Variations in Memory Cell Programmed State Distrib...

SEMICONDUCTOR STORAGE DEVICE

OPERATION SEQUENCE AND COMMANDS FOR MEASURING THRESHOLD VOLTAGE DIS...

Phase change memory structure with multiple resistance states and m...

METHOD FOR READING A MULTI-LEVEL PASSIVE ELEMENT MEMORY CELL ARRAY

RESISTANCE CHANGE MEMORY DEVICE

RESISTANCE CHANGE MEMORY DEVICE

Method for power-saving multi-pass sensing in non-volatile memory

PROGRAMMABLE MEMORY DEVICE CIRCUIT

Sense amplifier circuit for parallel sensing of four current levels

Semiconductor memory device

Highly compact Eprom and flash EEprom devices

Flash memory device and architecture with multi level cells

Highly compact Eprom and flash EEprom devices

NON-VOLATILE MEMORY DEVICE HAVING HIGH SPEED PAGE MODE OPERATION