Connectibility characteristics

Industry

CPC
H01L2027/11859

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR

Current Industry

H01L2027/11859Connectibility characteristics

Industries

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device including polygon-shaped standard cell
- Patent number RE49545
- Issue date Jun 6, 2023
- Samsung Electronics Co., Ltd.
- JinTae Kim
Information Patent Grant
Machine-learning design enablement platform
- Patent number 11,017,149
- Issue date May 25, 2021
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Lin Chuang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine-learning design enablement platform
- Patent number 10,678,973
- Issue date Jun 9, 2020
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yi-Lin Chuang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell layout utilizing boundary cell with mixed poly pitch within in...
- Patent number 10,445,453
- Issue date Oct 15, 2019
- Mediatek Inc.
- Jen-Hang Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device
- Patent number 10,224,331
- Issue date Mar 5, 2019
- Samsung Electronics Co., Ltd.
- Raheel Azmat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including polygon-shaped standard cell
- Patent number 10,204,920
- Issue date Feb 12, 2019
- Samsung Electronics Co., Ltd.
- JinTae Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High density and modular CMOS logic based on 3D stacked, independen...
- Patent number 9,515,088
- Issue date Dec 6, 2016
- GLOBALFOUNDRIES Inc.
- Murat Kerem Akarvardar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Efficient semiconductor device cell layout utilizing underlying loc...
- Patent number 8,816,403
- Issue date Aug 26, 2014
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jung-Hsuan Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to ensure double patterning technology compliance in standar...
- Patent number 8,756,550
- Issue date Jun 17, 2014
- Texas Instruments Incorporated
- James Walter Blatchford
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having a continuous active area and methods for...
- Patent number 8,736,061
- Issue date May 27, 2014
- GLOBALFOUNDRIES, INC.
- Frank Johnson
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20180197859
- Publication date Jul 12, 2018
- Samsung Electronic Co., Ltd.
- Raheel Azmat
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING POLYGON-SHAPED STANDARD CELL
- Publication number 20160300851
- Publication date Oct 13, 2016
- JinTae KIM
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS HAVING A CONTINUOUS ACTIVE AREA AND METHODS FOR...
- Publication number 20130328205
- Publication date Dec 12, 2013
- GLOBALFOUNDRIES INC.
- Frank Johnson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EFFICIENT SEMICONDUCTOR DEVICE CELL LAYOUT UTILIZING UNDERLYING LOC...
- Publication number 20130069236
- Publication date Mar 21, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Jung-Hsuan Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method To Ensure Double Patterning Technology Compliance In Standar...
- Publication number 20130074029
- Publication date Mar 21, 2013
- TEXAS INSTRUMENTS INCORPORATED
- James Walter Blatchford
- H01 - BASIC ELECTRIC ELEMENTS

Connectibility characteristics

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor device including polygon-shaped standard cell

Machine-learning design enablement platform

Machine-learning design enablement platform

Cell layout utilizing boundary cell with mixed poly pitch within in...

Semiconductor device

Semiconductor device including polygon-shaped standard cell

High density and modular CMOS logic based on 3D stacked, independen...

Efficient semiconductor device cell layout utilizing underlying loc...

Method to ensure double patterning technology compliance in standar...

Integrated circuits having a continuous active area and methods for...

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE

SEMICONDUCTOR DEVICE INCLUDING POLYGON-SHAPED STANDARD CELL

INTEGRATED CIRCUITS HAVING A CONTINUOUS ACTIVE AREA AND METHODS FOR...

EFFICIENT SEMICONDUCTOR DEVICE CELL LAYOUT UTILIZING UNDERLYING LOC...

Method To Ensure Double Patterning Technology Compliance In Standar...