Control signal input circuits

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CPC
G11C7/109

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/109Control signal input circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Multi-protocol analog front end circuit
- Patent number 12,249,394
- Issue date Mar 11, 2025
- Synopsys, Inc.
- G11 - INFORMATION STORAGE
Information Patent Grant
Folding ordering scheme for improved throughput in non-volatile memory
- Patent number 12,249,396
- Issue date Mar 11, 2025
- SanDisk Technologies, Inc.
- G11 - INFORMATION STORAGE
Information Patent Grant
Superconducting distributed bidirectional current driver system
- Patent number 12,249,393
- Issue date Mar 11, 2025
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device supporting in-memory MAC operation between ternary in...
- Patent number 12,249,395
- Issue date Mar 11, 2025
- Korea University Research and Business Foundation
- G11 - INFORMATION STORAGE
Information Patent Grant
Single ended sense amplifier with current pulse circuit
- Patent number 12,243,614
- Issue date Mar 4, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Siva Kumar Chinthu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of manufacturing semiconductor device
- Patent number 12,243,618
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Compute-in-memory macro device and electronic device
- Patent number 12,236,332
- Issue date Feb 25, 2025
- Novatek Microelectronics Corp.
- Chien Te Tung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level signaling in memory with wide system interface
- Patent number 12,237,953
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Timothy M. Hollis
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to perform a read of a column in a memory acce...
- Patent number 12,237,040
- Issue date Feb 25, 2025
- Intel Corporation
- Sourabh Dongaonkar
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiving circuit, data receiving system and memory device
- Patent number 12,237,042
- Issue date Feb 25, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system including an interface circuit connecting a controlle...
- Patent number 12,237,046
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Youngmin Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of reading data from self-selecting memory, self-selecting m...
- Patent number 12,237,047
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Hwan Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices having efficient serializers therein f...
- Patent number 12,237,049
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Sanguk Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system using asymmetric source-synchronous clocking
- Patent number 12,228,961
- Issue date Feb 18, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical bank group timing
- Patent number 12,230,355
- Issue date Feb 18, 2025
- RAMBUS INC.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,230,359
- Issue date Feb 18, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and electronic device
- Patent number 12,230,358
- Issue date Feb 18, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Takanori Matsuzaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component with input/output data rate alignment
- Patent number 12,229,435
- Issue date Feb 18, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component having internal read-modify-write operation
- Patent number 12,223,207
- Issue date Feb 11, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods of memory access control with section prede...
- Patent number 12,224,037
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Manami Senoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and data approximation search method thereof
- Patent number 12,224,034
- Issue date Feb 11, 2025
- Macronix International Co., Ltd.
- Chih-Chang Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and intelligent operation method thereof
- Patent number 12,224,038
- Issue date Feb 11, 2025
- Macronix International Co., Ltd.
- Kuan-Chih Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Computing device, memory controller, and method for performing an i...
- Patent number 12,217,819
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Current measurement for power converter circuits
- Patent number 12,216,515
- Issue date Feb 4, 2025
- Apple Inc.
- Shawn Searles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage device and operating method with multiple channels
- Patent number 12,217,821
- Issue date Feb 4, 2025
- SK Hynix Inc.
- Seung Han Ryu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with source line control
- Patent number 12,217,822
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE
Information Patent Grant
Device with client configuration and related method
- Patent number 12,210,880
- Issue date Jan 28, 2025
- STMicroelectronics S.r.l.
- Roberta Vittimani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal generator for controlling timing of signal in memory device
- Patent number 12,211,586
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,211,584
- Issue date Jan 28, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Yuki Okamoto
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE
- Publication number 20250078885
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- He-Zhou WAN
- G11 - INFORMATION STORAGE
Information Patent Application
EARLY DETECTION OF COMPRESSION STATUS USING INLINE METADATA
- Publication number 20250078886
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Patrick Michael Sheridan
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR OPERATING IN-MEMORY COMPUTING ARCHITECTURE...
- Publication number 20250078881
- Publication date Mar 6, 2025
- PEKING UNIVERSITY
- Peng HUANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, METHOD OF OPERATING THE MEMORY DEVICE, AND MEMORY SY...
- Publication number 20250078888
- Publication date Mar 6, 2025
- Samsung Electronics Co., Ltd.
- Tongsung Kim
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...
- Publication number 20250078884
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
LOW-POWER SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20250069644
- Publication date Feb 27, 2025
- Rambus Inc.
- Jared L. ZERBE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR
- Publication number 20250054524
- Publication date Feb 13, 2025
- KIOXIA Corporation
- Hiroshi Maejima
- G11 - INFORMATION STORAGE
Information Patent Application
SKIPPING PAGES FOR WEAK WORDLINES OF A MEMORY DEVICE DURING PRE-PRO...
- Publication number 20250054527
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Cheng Cheng Ang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE...
- Publication number 20250046348
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Keun Soo Song
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY
- Publication number 20250046353
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Erik V. Pohlmann
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION
- Publication number 20250046352
- Publication date Feb 6, 2025
- SK HYNIX INC.
- Young Mok JEONG
- G11 - INFORMATION STORAGE
Information Patent Application
REDUNDANCY AND MAJORITY VOTING IN A KEY-VALUE DATA STORAGE SYSTEM U...
- Publication number 20250046374
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Tyler L. Betz
- G11 - INFORMATION STORAGE
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20250046347
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...
- Publication number 20250037757
- Publication date Jan 30, 2025
- Samsung Electronics Co., Ltd.
- TAEYOUNG OH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING
- Publication number 20250028660
- Publication date Jan 23, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits And Methods For Generating Adjustable Signal Pulses That C...
- Publication number 20250022495
- Publication date Jan 16, 2025
- Altera Corporation
- Wee Leam Teoh
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE CIRCUIT FOR CONVERTING A SERIAL DATA STREAM TO A PARALLEL...
- Publication number 20250021270
- Publication date Jan 16, 2025
- Rambus Inc.
- Dongyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCED LOGIC GATE ACCUMULATORS
- Publication number 20250022493
- Publication date Jan 16, 2025
- Raytheon Company
- Micky R. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
High-Speed and Area-Efficient Parallel-Write-and-Read Memory
- Publication number 20250022494
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Hochul LEE
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...
- Publication number 20250022496
- Publication date Jan 16, 2025
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250015799
- Publication date Jan 9, 2025
- ROHM CO., LTD.
- Yasuhito SUGIMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODIFICATION OF A COMMAND TIMING PATTERN
- Publication number 20250006235
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Carl L. Minifie
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
- Publication number 20240428835
- Publication date Dec 26, 2024
- Rambus Inc.
- Andrew M. Fuller
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous Input Buffer Control Using a Ripple Counter
- Publication number 20240420746
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Brian W. Huber
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINE
- Publication number 20240420748
- Publication date Dec 19, 2024
- NVIDIA Corp.
- Cagri Erbagci
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM HAVING LUN SELECTI...
- Publication number 20240420743
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Jae Young LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING...
- Publication number 20240404570
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- Ki-Seok PARK
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES
- Publication number 20240402788
- Publication date Dec 5, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION
- Publication number 20240404568
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Riccardo ZURLA
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND MET...
- Publication number 20240404572
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- HYUNGJIN KIM
- G11 - INFORMATION STORAGE

Control signal input circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multi-protocol analog front end circuit

Folding ordering scheme for improved throughput in non-volatile memory

Superconducting distributed bidirectional current driver system

Memory device supporting in-memory MAC operation between ternary in...

Single ended sense amplifier with current pulse circuit

Method of manufacturing semiconductor device

Compute-in-memory macro device and electronic device

Multi-level signaling in memory with wide system interface

Method and apparatus to perform a read of a column in a memory acce...

Data receiving circuit, data receiving system and memory device

Memory system including an interface circuit connecting a controlle...

Method of reading data from self-selecting memory, self-selecting m...

Semiconductor memory devices having efficient serializers therein f...

Memory system using asymmetric source-synchronous clocking

Hierarchical bank group timing

Semiconductor device

Semiconductor device and electronic device

Memory component with input/output data rate alignment

Memory component having internal read-modify-write operation

Apparatuses and methods of memory access control with section prede...

Memory device and data approximation search method thereof

Memory device and intelligent operation method thereof

Computing device, memory controller, and method for performing an i...

Memory device for supporting command bus training mode and method o...

Current measurement for power converter circuits

Storage device and operating method with multiple channels

Memory device with source line control

Device with client configuration and related method

Signal generator for controlling timing of signal in memory device

Semiconductor device

Patents Applicationslast 30 patents

MEMORY DEVICE

EARLY DETECTION OF COMPRESSION STATUS USING INLINE METADATA

METHOD AND APPARATUS FOR OPERATING IN-MEMORY COMPUTING ARCHITECTURE...

MEMORY DEVICE, METHOD OF OPERATING THE MEMORY DEVICE, AND MEMORY SY...

BUFFER CONFIGURATIONS FOR COMMUNICATIONS BETWEEN MEMORY DIES AND A...

LOW-POWER SOURCE-SYNCHRONOUS SIGNALING

MEMORY DEVICE WITH MEMORY PILLAR INSIDE CONDUCTOR

SKIPPING PAGES FOR WEAK WORDLINES OF A MEMORY DEVICE DURING PRE-PRO...

TRACKING THE EFFECTS OF VOLTAGE AND TEMPERATURE ON A MEMORY DEVICE...

DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY

SEMICONDUCTOR DEVICE FOR PERFORMING DATA ALIGNMENT OPERATION

REDUNDANCY AND MAJORITY VOTING IN A KEY-VALUE DATA STORAGE SYSTEM U...

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...

MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING

Circuits And Methods For Generating Adjustable Signal Pulses That C...

INTERFACE CIRCUIT FOR CONVERTING A SERIAL DATA STREAM TO A PARALLEL...

REDUCED LOGIC GATE ACCUMULATORS

High-Speed and Area-Efficient Parallel-Write-and-Read Memory

APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...

SEMICONDUCTOR DEVICE

MODIFICATION OF A COMMAND TIMING PATTERN

SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING

Synchronous Input Buffer Control Using a Ripple Counter

SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINE

SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM HAVING LUN SELECTI...

MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING...

MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES

IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION

APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND MET...