Control signal input circuits

Industry

CPC
G11C7/109

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/109Control signal input circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Fast reference voltage training for I/O interface
- Patent number 12,367,915
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Tianyu Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Encoders, decoders, and semiconductor memory devices including the...
- Patent number 12,367,916
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Byongmo Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and memory system with both long and short sub word lines co...
- Patent number 12,367,945
- Issue date Jul 22, 2025
- SK Hynix Inc.
- Sang Woo Yoon
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for memory module data drivers
- Patent number 12,367,913
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Split array architecture for analog neural memory in a deep learnin...
- Patent number 12,367,386
- Issue date Jul 22, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile storage of secure data in 6T SRAM cells using hot carr...
- Patent number 12,361,987
- Issue date Jul 15, 2025
- BTQ Technologies Corp.
- Zachary Irving Belateche
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor system
- Patent number 12,361,989
- Issue date Jul 15, 2025
- SK hynix Inc.
- Kang Sub Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Transmitting data signals on separate layers of a memory module, an...
- Patent number 12,361,978
- Issue date Jul 15, 2025
- Lodestar Licensing Group LLC
- Yogesh Sharma
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,361,985
- Issue date Jul 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jhon-Jhy Liaw
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive write operations for a memory device
- Patent number 12,361,988
- Issue date Jul 15, 2025
- Micron Technology, Inc.
- Mattia Boniardi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory architecture supporting both conventional memory access mode...
- Patent number 12,361,982
- Issue date Jul 15, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Harsh Rawat
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage devices having multi drop structure
- Patent number 12,361,983
- Issue date Jul 15, 2025
- Samsung Electronics Co., Ltd.
- Jae-Sang Yun
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing precharge current surge in digital compute in memory
- Patent number 12,354,657
- Issue date Jul 8, 2025
- Mediatek Inc.
- Chetan Deshpande
- G11 - INFORMATION STORAGE
Information Patent Grant
Active current consumption save mode for non-volatile memory using...
- Patent number 12,354,704
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Ke Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal development caching in a memory device
- Patent number 12,353,762
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and semiconductor system
- Patent number 12,354,705
- Issue date Jul 8, 2025
- SK hynix Inc.
- Joon Hong Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 12,347,518
- Issue date Jul 1, 2025
- Kioxia Corporation
- Shohei Asami
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuitry borrowing for memory arrays
- Patent number 12,340,832
- Issue date Jun 24, 2025
- Micron Technology, Inc.
- Andrea Martinelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Shift register unit, driving method thereof, and device
- Patent number 12,340,866
- Issue date Jun 24, 2025
- BOE Technology Group Co., Ltd.
- Guangliang Shang
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface level-shifter dual-rail memory architecture
- Patent number 12,340,864
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Reduced circuit area memory device with a half-word memory architec...
- Patent number 12,340,865
- Issue date Jun 24, 2025
- Synopsys, Inc.
- Harold Pilo
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power wake up for memory
- Patent number 12,340,869
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuits with dynamically adjustable pulse widths and method...
- Patent number 12,340,871
- Issue date Jun 24, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ming-Hung Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system and method for operating memory system...
- Patent number 12,334,186
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Jaehyeok Baek
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device, storage device including the same, and...
- Patent number 12,334,155
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Minseok Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Power reduction in a clock buffer of a memory module based upon mem...
- Patent number 12,334,188
- Issue date Jun 17, 2025
- Dell Products L.P.
- Isaac Q. Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid volatile and non-volatile memory device
- Patent number 12,327,590
- Issue date Jun 10, 2025
- RAMBUS INC.
- Scott C. Best
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to mitigate memory die misalignment
- Patent number 12,327,607
- Issue date Jun 10, 2025
- Micron Technology, Inc.
- Jie Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing precharge power consumption in a memory array
- Patent number 12,327,602
- Issue date Jun 10, 2025
- Mediatek Inc.
- Gajanan Sahebrao Jedhe
- G11 - INFORMATION STORAGE
Information Patent Grant
Wrong way read-before write solutions in SRAM
- Patent number 12,327,608
- Issue date Jun 10, 2025
- Advanced Micro Devices, Inc.
- Russell Schreiber
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEM
- Publication number 20250239284
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Kuiyon Mun
- G11 - INFORMATION STORAGE
Information Patent Application
CONTROLLER CONFIGURED TO CONTROL MEMORY DEVICE, OPERATION METHOD OF...
- Publication number 20250239282
- Publication date Jul 24, 2025
- Samsung Electronics Co., Ltd.
- Hojun Yoon
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-LEVEL SIGNALING IN MEMORY WITH WIDE SYSTEM INTERFACE
- Publication number 20250240192
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Timothy M. Hollis
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT HAVING INTERNAL READ-MODIFY-WRITE OPERATION
- Publication number 20250231714
- Publication date Jul 17, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250231694
- Publication date Jul 17, 2025
- SK HYNIX INC.
- Chan Hui JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL BANK GROUP TIMING
- Publication number 20250218476
- Publication date Jul 3, 2025
- Rambus Inc.
- John Eric LINSTADT
- G11 - INFORMATION STORAGE
Information Patent Application
CLOCK GENERATION CIRCUIT AND MEMORY
- Publication number 20250218480
- Publication date Jul 3, 2025
- CXMT Corporation
- Jun Yang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT
- Publication number 20250217070
- Publication date Jul 3, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH RESET VOLTAGE CONTROL
- Publication number 20250218477
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ali Taghvaei
- G11 - INFORMATION STORAGE
Information Patent Application
RTT TRIM METHOD
- Publication number 20250218483
- Publication date Jul 3, 2025
- Micron Technology, Inc.
- Ryo Fujimaki
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER INTERMEDIATE PRE-CHARGE OPERATIONS IN MEMORY
- Publication number 20250218481
- Publication date Jul 3, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- Yorinobu Fujino
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...
- Publication number 20250210079
- Publication date Jun 26, 2025
- SK HYNIX INC.
- Nam Hyeok JEONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20250210074
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR IMPROVING EFFICIENCY OF MULTI-STORAGE-ROW COM...
- Publication number 20250210078
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Xiaoyu Sun
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM USING ASYMMETRIC SOURCE-SYNCHRONOUS CLOCKING
- Publication number 20250208645
- Publication date Jun 26, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CONTROLLER, SD CARD DEVICE, METHOD USED IN FLASH MEMOR...
- Publication number 20250199954
- Publication date Jun 19, 2025
- SILICON MOTION INC
- CHAO-KUEI HSIEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED ADDRESS INTERFACE ACTIVATE SEQUENCE USING MODE REGISTER WRITE
- Publication number 20250201285
- Publication date Jun 19, 2025
- Micron Technology, Inc.
- Paul Philip Grahek
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY INTERFACE CIRCUIT, STORAGE DEVICE HAVING THE SAM...
- Publication number 20250201287
- Publication date Jun 19, 2025
- Samsung Electronics Co., Ltd.
- Choongeui Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM
- Publication number 20250201288
- Publication date Jun 19, 2025
- KIOXIA Corporation
- Akio SUGAHARA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR RETRIEVING PRESET TRIM CODE AND TRIM CODE RELOADING SYSTEM
- Publication number 20250191625
- Publication date Jun 12, 2025
- Ememory Technology Inc.
- Tzu-Neng LAI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF
- Publication number 20250190306
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Zheng-Jun LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE WITH IMPROVED DATA RECEIVING LOGIC USING MULTIPLE LATCHING A...
- Publication number 20250191627
- Publication date Jun 12, 2025
- SK HYNIX INC.
- Ju Hyeon HAN
- G11 - INFORMATION STORAGE
Information Patent Application
DIES, SEMICONDUCTOR PACKAGE STRUCTURES, ENABLE PIN CONFIGURATION ME...
- Publication number 20250191622
- Publication date Jun 12, 2025
- Yangtze Memory Technologies Co., Ltd.
- Yingjun Wu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE WITH LOCAL SYNCHRONIZATION
- Publication number 20250181504
- Publication date Jun 5, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...
- Publication number 20250182834
- Publication date Jun 5, 2025
- MEDIATEK INC.
- Tzu-Hsien Yang
- G11 - INFORMATION STORAGE
Information Patent Application
TECHNIQUES FOR INDICATING ROW ACTIVATION
- Publication number 20250182800
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
- Publication number 20250182802
- Publication date Jun 5, 2025
- Samsung Electronics Co., Ltd.
- Youngmin Jo
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE
- Publication number 20250173093
- Publication date May 29, 2025
- Micron Technology, Inc.
- Dmitri Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION MEMORY CELL
- Publication number 20250174256
- Publication date May 29, 2025
- Microsemi SoC Corp.
- Victor Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH SOURCE LINE CONTROL
- Publication number 20250174257
- Publication date May 29, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Perng-Fei Yuh
- G11 - INFORMATION STORAGE

Control signal input circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Fast reference voltage training for I/O interface

Encoders, decoders, and semiconductor memory devices including the...

Memory and memory system with both long and short sub word lines co...

Apparatuses, systems, and methods for memory module data drivers

Split array architecture for analog neural memory in a deep learnin...

Non-volatile storage of secure data in 6T SRAM cells using hot carr...

Semiconductor system

Transmitting data signals on separate layers of a memory module, an...

Memory device

Adaptive write operations for a memory device

Memory architecture supporting both conventional memory access mode...

Storage devices having multi drop structure

Reducing precharge current surge in digital compute in memory

Active current consumption save mode for non-volatile memory using...

Signal development caching in a memory device

Semiconductor device and semiconductor system

Memory system

Circuitry borrowing for memory arrays

Shift register unit, driving method thereof, and device

Interface level-shifter dual-rail memory architecture

Reduced circuit area memory device with a half-word memory architec...

Low power wake up for memory

Memory circuits with dynamically adjustable pulse widths and method...

Memory device, memory system and method for operating memory system...

Non-volatile memory device, storage device including the same, and...

Power reduction in a clock buffer of a memory module based upon mem...

Hybrid volatile and non-volatile memory device

Techniques to mitigate memory die misalignment

Reducing precharge power consumption in a memory array

Wrong way read-before write solutions in SRAM

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY DEVICE, CONTROLLER AND MEMORY SYSTEM

CONTROLLER CONFIGURED TO CONTROL MEMORY DEVICE, OPERATION METHOD OF...

MULTI-LEVEL SIGNALING IN MEMORY WITH WIDE SYSTEM INTERFACE

MEMORY COMPONENT HAVING INTERNAL READ-MODIFY-WRITE OPERATION

MEMORY DEVICE AND OPERATING METHOD THEREOF

HIERARCHICAL BANK GROUP TIMING

CLOCK GENERATION CIRCUIT AND MEMORY

MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT

MEMORY DEVICE WITH RESET VOLTAGE CONTROL

RTT TRIM METHOD

LOW POWER INTERMEDIATE PRE-CHARGE OPERATIONS IN MEMORY

MEMORY CONTROLLER PERFORMING TRAINING TO IMPROVE COMMUNICATION AND...

MEMORY DEVICE AND METHOD OF OPERATING THE SAME

SYSTEM AND METHOD FOR IMPROVING EFFICIENCY OF MULTI-STORAGE-ROW COM...

MEMORY SYSTEM USING ASYMMETRIC SOURCE-SYNCHRONOUS CLOCKING

FLASH MEMORY CONTROLLER, SD CARD DEVICE, METHOD USED IN FLASH MEMOR...

EXTENDED ADDRESS INTERFACE ACTIVATE SEQUENCE USING MODE REGISTER WRITE

NONVOLATILE MEMORY INTERFACE CIRCUIT, STORAGE DEVICE HAVING THE SAM...

SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM

METHOD FOR RETRIEVING PRESET TRIM CODE AND TRIM CODE RELOADING SYSTEM

SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF

DEVICE WITH IMPROVED DATA RECEIVING LOGIC USING MULTIPLE LATCHING A...

DIES, SEMICONDUCTOR PACKAGE STRUCTURES, ENABLE PIN CONFIGURATION ME...

MEMORY MODULE WITH LOCAL SYNCHRONIZATION

MEMORY DEVICE USING MULTIPLE MEMORY CELLS GROUPED TO JOINTLY STORE...

TECHNIQUES FOR INDICATING ROW ACTIVATION

SEMICONDUCTOR DEVICE AND MEMORY SYSTEM INCLUDING THE SAME

WRITE BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE

CONFIGURATION MEMORY CELL

MEMORY DEVICE WITH SOURCE LINE CONTROL