Control signal input circuits

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CPC
G11C7/109

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/109Control signal input circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Device with client configuration and related method
- Patent number 12,210,880
- Issue date Jan 28, 2025
- STMicroelectronics S.r.l.
- Roberta Vittimani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal generator for controlling timing of signal in memory device
- Patent number 12,211,586
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Xiu-Li Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,211,584
- Issue date Jan 28, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Yuki Okamoto
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture with single resistor memory element...
- Patent number 12,211,585
- Issue date Jan 28, 2025
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-die package
- Patent number 12,205,667
- Issue date Jan 21, 2025
- Realtek Semiconductor Corp.
- Sheng-Feng Chung
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with adjustment of phase of data signal and cl...
- Patent number 12,205,668
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Jaemin Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and operating method of memory system
- Patent number 12,205,670
- Issue date Jan 21, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Win-San Khwa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory circuit and method of operating same
- Patent number 12,205,664
- Issue date Jan 21, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Hua-Hsin Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipe latch circuit, operating method thereof, and semiconductor mem...
- Patent number 12,205,666
- Issue date Jan 21, 2025
- SK hynix Inc.
- Bo Kyeom Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus, memory device, and method for multi-phase clock training
- Patent number 12,198,783
- Issue date Jan 14, 2025
- Samsung Electronics Co., Ltd.
- Taegook Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device sideband systems and methods
- Patent number 12,198,774
- Issue date Jan 14, 2025
- Micron Technology, Inc.
- Joshua E. Alzheimer
- G11 - INFORMATION STORAGE
Information Patent Grant
Storage device with eye open monitoring (EOM) circuit and method to...
- Patent number 12,198,781
- Issue date Jan 14, 2025
- Samsung Electronics Co., Ltd.
- Hyunjoon Yoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for configuring multiple input-output channels
- Patent number 12,190,987
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Dean E. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Off-chip driving device and driving capability enhancement method t...
- Patent number 12,190,991
- Issue date Jan 7, 2025
- NANYA TECHNOLOGY CORPORATION
- Chang-Ting Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
Data output buffer and semiconductor apparatus including the same
- Patent number 12,190,989
- Issue date Jan 7, 2025
- SK hynix Inc.
- Kyu Dong Hwang
- G11 - INFORMATION STORAGE
Information Patent Grant
Command processing circuit and data processing circuit
- Patent number 12,190,992
- Issue date Jan 7, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Liping Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Single port memory with multiple memory operations per clock cycle
- Patent number 12,190,994
- Issue date Jan 7, 2025
- Xilinx, Inc.
- Kumar Rahul
- G11 - INFORMATION STORAGE
Information Patent Grant
Write broadcast operations associated with a memory device
- Patent number 12,189,988
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Model inversion in integrated circuit devices having analog inferen...
- Patent number 12,190,993
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Poorna Kale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared decoder circuit and method
- Patent number 12,183,432
- Issue date Dec 31, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- XiuLi Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for indicating row activation
- Patent number 12,183,421
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for write clock double data rate duty cycle corre...
- Patent number 12,183,427
- Issue date Dec 31, 2024
- Cadence Design Systems, Inc.
- Sachin Ramesh Gugwad
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable column access
- Patent number 12,183,419
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Hyunyoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Internal and external data transfer for stacked memory dies
- Patent number 12,176,059
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,176,062
- Issue date Dec 24, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- He-Zhou Wan
- G11 - INFORMATION STORAGE
Information Patent Grant
Channel routing for simultaneous switching outputs
- Patent number 12,176,065
- Issue date Dec 24, 2024
- ATI Technologies ULC
- Xuan Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Buffer configurations for communications between memory dies and a...
- Patent number 12,170,127
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Sujeet V. Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiving circuit, data receiving system and storage device
- Patent number 12,170,129
- Issue date Dec 17, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Feng Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing threshold voltage drift based on operating characteristics...
- Patent number 12,169,646
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Murong Lang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-volatile memory circuit and method
- Patent number 12,165,722
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Gu-Huan Li
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...
- Publication number 20250037757
- Publication date Jan 30, 2025
- Samsung Electronics Co., Ltd.
- TAEYOUNG OH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING
- Publication number 20250028660
- Publication date Jan 23, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuits And Methods For Generating Adjustable Signal Pulses That C...
- Publication number 20250022495
- Publication date Jan 16, 2025
- Altera Corporation
- Wee Leam Teoh
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED LOGIC GATE ACCUMULATORS
- Publication number 20250022493
- Publication date Jan 16, 2025
- Raytheon Company
- Micky R. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
High-Speed and Area-Efficient Parallel-Write-and-Read Memory
- Publication number 20250022494
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Hochul LEE
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE CIRCUIT FOR CONVERTING A SERIAL DATA STREAM TO A PARALLEL...
- Publication number 20250021270
- Publication date Jan 16, 2025
- Rambus Inc.
- Dongyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...
- Publication number 20250022496
- Publication date Jan 16, 2025
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20250015799
- Publication date Jan 9, 2025
- ROHM CO., LTD.
- Yasuhito SUGIMOTO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODIFICATION OF A COMMAND TIMING PATTERN
- Publication number 20250006235
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Carl L. Minifie
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
- Publication number 20240428835
- Publication date Dec 26, 2024
- Rambus Inc.
- Andrew M. Fuller
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronous Input Buffer Control Using a Ripple Counter
- Publication number 20240420746
- Publication date Dec 19, 2024
- Micron Technology, Inc.
- Brian W. Huber
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINE
- Publication number 20240420748
- Publication date Dec 19, 2024
- NVIDIA Corp.
- Cagri Erbagci
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM HAVING LUN SELECTI...
- Publication number 20240420743
- Publication date Dec 19, 2024
- SK HYNIX INC.
- Jae Young LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING...
- Publication number 20240404570
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- Ki-Seok PARK
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES
- Publication number 20240402788
- Publication date Dec 5, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION
- Publication number 20240404568
- Publication date Dec 5, 2024
- STMicroelectronics International N.V.
- Riccardo ZURLA
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND MET...
- Publication number 20240404572
- Publication date Dec 5, 2024
- Samsung Electronics Co., Ltd.
- HYUNGJIN KIM
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM
- Publication number 20240395294
- Publication date Nov 28, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Win-San KHWA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS
- Publication number 20240395297
- Publication date Nov 28, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
STORAGE DEVICE BASED ON DAISY CHAIN TOPOLOGY
- Publication number 20240395292
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Jeffrey E. KWAK
- G11 - INFORMATION STORAGE
Information Patent Application
OFFSET CANCELLATION
- Publication number 20240395299
- Publication date Nov 28, 2024
- Lodestar Licensing Group LLC
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS
- Publication number 20240395296
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240395298
- Publication date Nov 28, 2024
- Samsung Electronics Co., Ltd.
- BAEK JIN LIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION
- Publication number 20240386983
- Publication date Nov 21, 2024
- Lodestar Licensing Group LLC
- Keisuke Fujishiro
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...
- Publication number 20240386928
- Publication date Nov 21, 2024
- Lodestar Licensing Group LLC
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
CONTENT ADDRESSABLE MEMORY FOR LARGE SEARCH WORDS
- Publication number 20240386923
- Publication date Nov 21, 2024
- Macronix International Co., Ltd.
- Hang-Ting Lue
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED CIRCUIT AREA MEMORY DEVICE WITH A HALF-WORD MEMORY ARCHITEC...
- Publication number 20240371416
- Publication date Nov 7, 2024
- Synopsys, Inc.
- Harold PILO
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE DATA PROTECTION CIRCUITRY FOR MEMORY DEVICES
- Publication number 20240371423
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
DATA TRANSMISSION USING DELAYED TIMING SIGNALS
- Publication number 20240372542
- Publication date Nov 7, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC SENSING LEVELS FOR NONVOLATILE MEMORY DEVICES
- Publication number 20240355368
- Publication date Oct 24, 2024
- Infineon Technologies, LLC
- Shivananda SHETTY
- G11 - INFORMATION STORAGE

Control signal input circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Device with client configuration and related method

Signal generator for controlling timing of signal in memory device

Semiconductor device

Partitioned memory architecture with single resistor memory element...

Multi-die package

Semiconductor device with adjustment of phase of data signal and cl...

Memory system and operating method of memory system

Memory circuit and method of operating same

Pipe latch circuit, operating method thereof, and semiconductor mem...

Apparatus, memory device, and method for multi-phase clock training

Memory device sideband systems and methods

Storage device with eye open monitoring (EOM) circuit and method to...

Method for configuring multiple input-output channels

Off-chip driving device and driving capability enhancement method t...

Data output buffer and semiconductor apparatus including the same

Command processing circuit and data processing circuit

Single port memory with multiple memory operations per clock cycle

Write broadcast operations associated with a memory device

Model inversion in integrated circuit devices having analog inferen...

Shared decoder circuit and method

Techniques for indicating row activation

System and method for write clock double data rate duty cycle corre...

Programmable column access

Internal and external data transfer for stacked memory dies

Memory device

Channel routing for simultaneous switching outputs

Buffer configurations for communications between memory dies and a...

Data receiving circuit, data receiving system and storage device

Managing threshold voltage drift based on operating characteristics...

Non-volatile memory circuit and method

Patents Applicationslast 30 patents

SEMICONDUCTOR DIE FOR CONTROLLING ON-DIE-TERMINATION OF ANOTHER SEM...

MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING

Circuits And Methods For Generating Adjustable Signal Pulses That C...

REDUCED LOGIC GATE ACCUMULATORS

High-Speed and Area-Efficient Parallel-Write-and-Read Memory

INTERFACE CIRCUIT FOR CONVERTING A SERIAL DATA STREAM TO A PARALLEL...

APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...

SEMICONDUCTOR DEVICE

MODIFICATION OF A COMMAND TIMING PATTERN

SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING

Synchronous Input Buffer Control Using a Ripple Counter

SHARED METAL WIRE CAPACITANCE FOR NEGATIVE BIT-LINE

SEMICONDUCTOR APPARATUS AND SEMICONDUCTOR SYSTEM HAVING LUN SELECTI...

MEMORY SYSTEM PERFORMING HIERARCHICAL DUTY CYCLE ADJUSTER TRAINING...

MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES

IN-MEMORY COMPUTATION DEVICE FOR PERFORMING A SIGNED MAC OPERATION

APPARATUS, MEMORY CONTROLLER, MEMORY DEVICE, MEMORY SYSTEM, AND MET...

MEMORY SYSTEM AND OPERATING METHOD OF MEMORY SYSTEM

METHODS AND SYSTEMS FOR IMPROVING READ AND WRITE OF MEMORY CELLS

STORAGE DEVICE BASED ON DAISY CHAIN TOPOLOGY

OFFSET CANCELLATION

SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS

SEMICONDUCTOR DEVICE

APPARATUSES, SYSTEMS, AND METHODS FOR ERROR CORRECTION

APPARATUSES AND METHODS FOR SETTING A DUTY CYCLE ADJUSTER FOR IMPRO...

CONTENT ADDRESSABLE MEMORY FOR LARGE SEARCH WORDS

REDUCED CIRCUIT AREA MEMORY DEVICE WITH A HALF-WORD MEMORY ARCHITEC...

CONFIGURABLE DATA PROTECTION CIRCUITRY FOR MEMORY DEVICES

DATA TRANSMISSION USING DELAYED TIMING SIGNALS

DYNAMIC SENSING LEVELS FOR NONVOLATILE MEMORY DEVICES