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Conversion of analogue values to or from differential modulation
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H03M3/00
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Parent Industries
H
ELECTRICITY
H03
Electronic circuits
H03M
CODING DECODING CODE CONVERSION IN GENERAL
Current Industry
H03M3/00
Conversion of analogue values to or from differential modulation
Sub Industries
H03M3/02
Delta modulation
H03M3/022
with adaptable step size
H03M3/024
using syllabic companding
H03M3/04
Differential modulation with several bits
H03M3/042
with adaptable step size
H03M3/30
Delta-sigma modulation
H03M3/32
with special provisions or arrangements for power saving
H03M3/322
Continuously compensating for, or preventing, undesired influence of physical parameters
H03M3/324
characterised by means or methods for compensating or preventing more than one type of error at a time
H03M3/326
by averaging out the errors
H03M3/328
using dither
H03M3/33
the dither being a random signal
H03M3/332
in particular a pseudo-random signal
H03M3/334
the dither being at least partially dependent on the input signal
H03M3/336
the dither being in the time domain
H03M3/338
by permutation in the time domain
H03M3/34
by chopping
H03M3/342
by double sampling
H03M3/344
by filtering other than the noise-shaping inherent to delta-sigma modulators
H03M3/346
by suppressing active signals at predetermined times
H03M3/348
using return-to-zero signals
H03M3/35
using redundancy
H03M3/352
of deviations from the desired transfer characteristic
H03M3/354
at one point, i.e. by adjusting a single reference value
H03M3/356
Offset or drift compensation
H03M3/358
of non-linear distortion
H03M3/36
by temporarily adapting the operation upon detection of instability conditions
H03M3/362
in feedback mode
H03M3/364
by resetting one or more loop filter stages
H03M3/366
in feed-forward mode
H03M3/368
of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators
H03M3/37
Compensation or reduction of delay or phase error
H03M3/372
Jitter reduction
H03M3/374
Relaxation of settling time constraints
H03M3/376
Prevention or reduction of switching transients
H03M3/378
Testing
H03M3/38
Calibration
H03M3/382
at one point of the transfer characteristic, i.e. by adjusting a single reference value
H03M3/384
Offset correction
H03M3/386
over the full range of the converter
H03M3/388
by storing corrected or correction values in one or more digital look-up tables
H03M3/39
Structural details of delta-sigma modulators
H03M3/392
Arrangements for selecting among plural operation modes
H03M3/394
among different orders of the loop filter
H03M3/396
among different frequency bands
H03M3/398
among different converter types
H03M3/40
Arrangements for handling quadrature signals
H03M3/402
Arrangements specific to bandpass modulators
H03M3/404
characterised by the type of bandpass filters used
H03M3/406
by the use of a pair of integrators forming a closed loop
H03M3/408
by the use of an LC circuit
H03M3/41
combined with modulation to or demodulation from the carrier
H03M3/412
characterised by the number of quantisers and their type and resolution
H03M3/414
having multiple quantisers arranged in cascaded loops, each of the second and further loops processing the quantisation error of the loop preceding it
H03M3/416
all these quantisers being multiple bit quantisers
H03M3/418
all these quantisers being single bit quantisers
H03M3/42
having multiple quantisers arranged in parallel loops
H03M3/422
having one quantiser only
H03M3/424
the quantiser being a multiple bit one
H03M3/426
the quantiser being a successive approximation type analogue/digital converter
H03M3/428
with lower resolution
H03M3/43
the quantiser being a single bit one
H03M3/432
the quantiser being a pulse width modulation type analogue/digital converter
H03M3/434
with multi-level feedback
H03M3/436
characterised by the order of the loop filter
H03M3/438
the modulator having a higher order loop filter in the feedforward path
H03M3/44
with provisions for rendering the modulator inherently stable
H03M3/442
by restricting the swing within the loop
H03M3/444
using non-linear elements
H03M3/446
by a particular choice of poles or zeroes in the z-plane, e.g. by positioning zeroes outside the unit circle
H03M3/448
by removing part of the zeroes
H03M3/45
with distributed feedforward inputs
H03M3/452
with weighted feedforward summation
H03M3/454
with distributed feedback
H03M3/456
the modulator having a first order loop filter in the feedforward path
H03M3/458
Analogue/digital converters using delta-sigma modulation as an intermediate step
H03M3/46
using a combination of at least one delta-sigma modulator in series with at least one analogue/digital converter of a different type
H03M3/462
Details relating to the decimation process
H03M3/464
Details of the digital/analogue conversion in the feedback path
H03M3/466
Multiplexed conversion systems
H03M3/468
Interleaved, i.e. using multiple converters or converter parts for one channel
H03M3/47
using time-division multiplexing
H03M3/472
Shared
H03M3/474
using time-division multiplexing
H03M3/476
Non-linear conversion systems
H03M3/478
Means for controlling the correspondence between the range of the input signal and the range of signals the converter can handle; Means for out-of-range indication
H03M3/48
characterised by the type of range control
H03M3/482
by adapting the quantisation step size
H03M3/484
by adapting the gain of the feedback signal
H03M3/486
by adapting the input gain
H03M3/488
using automatic control
H03M3/49
in feedback mode
H03M3/492
in feed forward mode
H03M3/494
Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems
H03M3/496
Details of sampling arrangements or methods
H03M3/498
Variable sample rate
H03M3/50
Digital/analogue converters using delta-sigma modulation as an intermediate step
H03M3/502
Details of the final digital/analogue conversion following the digital delta-sigma modulation
H03M3/504
the final digital/analogue converter being constituted by a finite impulse response [FIR] filter
H03M3/506
the final digital/analogue converter being constituted by a pulse width modulator
H03M3/508
Details relating to the interpolation process
H03M3/51
Automatic control for modifying converter range
Industries
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Patent Grant
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Issue date
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Issue date
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Issue date
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Issue date
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H03 - BASIC ELECTRONIC CIRCUITRY
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Issue date
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Issue date
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Issue date
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Issue date
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Issue date
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H03 - BASIC ELECTRONIC CIRCUITRY
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Patent number
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Issue date
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H03 - BASIC ELECTRONIC CIRCUITRY
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Issue date
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Issue date
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Issue date
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H03 - BASIC ELECTRONIC CIRCUITRY
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Issue date
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H03 - BASIC ELECTRONIC CIRCUITRY
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Issue date
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G06 - COMPUTING CALCULATING COUNTING
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Issue date
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H03 - BASIC ELECTRONIC CIRCUITRY
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