Data reordering during input/output

Industry

CPC
G11C7/1012

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1012Data reordering during input/output

Industries

Patents Grantslast 30 patents

Information Patent Grant
Memory array with compensated word line access delay
- Patent number 12,183,420
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Si Hong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Transposing in a matrix-vector processor
- Patent number 12,182,537
- Issue date Dec 31, 2024
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable column access
- Patent number 12,183,419
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Hyunyoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Data reading/writing method, memory, storage apparatus, and terminal
- Patent number 12,183,425
- Issue date Dec 31, 2024
- Huawei Technologies Co., Ltd.
- Huifang Jiao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device configured to store parity data and method of...
- Patent number 12,176,056
- Issue date Dec 24, 2024
- SK hynix Inc.
- Byoung Sung You
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses for sense amplifier voltage control
- Patent number 12,165,695
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sang-Kyun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
In-memory computation circuit and method
- Patent number 12,164,882
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One-time programmable memory device and semiconductor memory device...
- Patent number 12,165,726
- Issue date Dec 10, 2024
- Samsung Electronics Co., Ltd.
- Yeongmuk Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture and method for repeatedly using the...
- Patent number 12,159,685
- Issue date Dec 3, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic drive based on standard commodity FPGA IC chips
- Patent number 12,153,865
- Issue date Nov 26, 2024
- iCometrue Company Ltd.
- Mou-Shiung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, method of operating the memory device, memory module...
- Patent number 12,154,651
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Sunyoung Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device comprising programmable command-and-address and/or da...
- Patent number 12,142,348
- Issue date Nov 12, 2024
- RAMBUS INC.
- Ian Shaeffer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Calibration methods and structures for partitioned memory architect...
- Patent number 12,136,468
- Issue date Nov 5, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Data buffer for memory devices with memory address remapping
- Patent number 12,125,556
- Issue date Oct 22, 2024
- RAMBUS INC.
- Christopher Haywood
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with programmable number of filters
- Patent number 12,106,822
- Issue date Oct 1, 2024
- MediaTek Singapore Pte Ltd.
- Chetan Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microelectronic devices, and related memory devices and electronic...
- Patent number 12,101,932
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Erwin E. Yu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Semiconductor device
- Patent number 12,100,459
- Issue date Sep 24, 2024
- Kioxia Corporation
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repairable latch array
- Patent number 12,100,464
- Issue date Sep 24, 2024
- Advanced Micro Devices, Inc.
- Joel Thornton Irby
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices
- Patent number 12,073,910
- Issue date Aug 27, 2024
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of data latches for plane level compression of soft bit data in...
- Patent number 12,057,188
- Issue date Aug 6, 2024
- SanDisk Technologies, Inc.
- Siddarth Naga Murty Bassa
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable data protection circuitry for memory devices
- Patent number 12,046,322
- Issue date Jul 23, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and memory system
- Patent number 12,040,044
- Issue date Jul 16, 2024
- Kioxia Corporation
- Yohei Yasuda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory circuit architecture with multiplexing between memory banks
- Patent number 12,020,766
- Issue date Jun 25, 2024
- QUALCOMM Incorporated
- Pradeep Raj
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and method of operating the same
- Patent number 12,014,796
- Issue date Jun 18, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses, systems, and methods for managing metadata storage at...
- Patent number 12,014,797
- Issue date Jun 18, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transmission apparatus and method having clock gating mechanism
- Patent number 12,009,056
- Issue date Jun 11, 2024
- Realtek Semiconductor Corporation
- Fu-Chin Tsai
- G11 - INFORMATION STORAGE
Information Patent Grant
Pre-decoder circuity
- Patent number 12,002,537
- Issue date Jun 4, 2024
- Micron Technology, Inc.
- Byung S. Moon
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal development caching in a memory device
- Patent number 11,989,450
- Issue date May 21, 2024
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Receiver for receiving multi-level signal and memory device includi...
- Patent number 11,972,831
- Issue date Apr 30, 2024
- Samsung Electronics Co., Ltd.
- Hyunsub Rie
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power and robust level-shifting pulse latch for dual-power memo...
- Patent number 11,972,834
- Issue date Apr 30, 2024
- QUALCOMM Incorporated
- Adithya Bhaskaran
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICES AND ELECTRONIC SYSTEMS
- Publication number 20250008727
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Erwin E. Yu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME
- Publication number 20240412767
- Publication date Dec 12, 2024
- Samsung Electronics Co., LTD
- CHANHEE PARK
- G11 - INFORMATION STORAGE
Information Patent Application
COMPARISON OPERATIONS IN MEMORY
- Publication number 20240412775
- Publication date Dec 12, 2024
- Lodestar Licensing Group LLC
- Kyle B. Wheeler
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED CIRCUIT AREA MEMORY DEVICE WITH A HALF-WORD MEMORY ARCHITEC...
- Publication number 20240371416
- Publication date Nov 7, 2024
- Synopsys, Inc.
- Harold PILO
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE DATA PROTECTION CIRCUITRY FOR MEMORY DEVICES
- Publication number 20240371423
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES
- Publication number 20240371417
- Publication date Nov 7, 2024
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240371448
- Publication date Nov 7, 2024
- KIOXIA Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS
- Publication number 20240362386
- Publication date Oct 31, 2024
- iCometrue Company Ltd.
- Mou-Shiung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT, MULTIPLIER-ADDER, AND CIRCUIT OPTIMIZATION METHOD
- Publication number 20240355372
- Publication date Oct 24, 2024
- Huawei Technologies Co., Ltd
- Leibin NI
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
- Publication number 20240345971
- Publication date Oct 17, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE PAGE SIZE ARCHITECTURE
- Publication number 20240347088
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Corrado Villa
- G11 - INFORMATION STORAGE
Information Patent Application
COMPUTE-IN-MEMORY CIRCUIT AND CONTROL METHOD THEREOF
- Publication number 20240339138
- Publication date Oct 10, 2024
- Peking University
- Zongwei WANG
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE
- Publication number 20240329885
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZQ CALIBRATION CIRCUIT, OPERATION METHOD, MEMORY AND MEMORY SYSTEM
- Publication number 20240331743
- Publication date Oct 3, 2024
- Yangtze Memory Technologies Co., Ltd.
- Huiyuan Yue
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND INTELLIGENT OPERATION METHOD THEREOF
- Publication number 20240331747
- Publication date Oct 3, 2024
- Macronix International Co., Ltd.
- Kuan-Chih CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
PRE-DECODER CIRCUITRY
- Publication number 20240321327
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Byung S. Moon
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT...
- Publication number 20240321328
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CIRCUIT ARCHITECTURE WITH MULTIPLEXING BETWEEN MEMORY BANKS
- Publication number 20240312496
- Publication date Sep 19, 2024
- QUALCOMM Incorporated
- Pradeep RAJ
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND METHOD OF OPERATING THE SAME
- Publication number 20240312497
- Publication date Sep 19, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEMS AND DEVICES THAT SUPPORT METHODS FOR CALIBRATING INP...
- Publication number 20240296876
- Publication date Sep 5, 2024
- Samsung Electronics Co., Ltd.
- YongHyun An
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND OPERATING METHOD OF THE SAME
- Publication number 20240282349
- Publication date Aug 22, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Tai-Hao Wen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE
- Publication number 20240281171
- Publication date Aug 22, 2024
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA-EFFICIENT, WIDTH-ADJUSTABLE SIGNALING INTERFACE
- Publication number 20240265953
- Publication date Aug 8, 2024
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORIES AND MEMORY COMPONENTS WITH INTERCONNECTED AND REDUNDANT DA...
- Publication number 20240257863
- Publication date Aug 1, 2024
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND MEMORY DEVICE WITH IN-MEMORY COMPUTING
- Publication number 20240241694
- Publication date Jul 18, 2024
- Samsung Electronics Co., Ltd.
- Daekun YOON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ OPERATIONS FOR A MEMORY ARRAY AND REGISTER
- Publication number 20240242746
- Publication date Jul 18, 2024
- Micron Technology, Inc.
- Vijayakrishna J. Vankayala
- G11 - INFORMATION STORAGE
Information Patent Application
LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS
- Publication number 20240232489
- Publication date Jul 11, 2024
- iCometrue Company Ltd.
- Mou-Shiung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE DIMENSIONAL MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20240203463
- Publication date Jun 20, 2024
- Taiwan Semiconductor Manufacturing company Ltd.
- MURAT KEREM AKARVARDAR
- G11 - INFORMATION STORAGE
Information Patent Application
SYNDROME DECODING SYSTEM
- Publication number 20240185898
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Eyal En Gad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PSEUDO DUAL PORT MEMORY DEVICES
- Publication number 20240185896
- Publication date Jun 6, 2024
- Samsung Electronics Co., Ltd.
- Chan Ho Lee
- G11 - INFORMATION STORAGE

Data reordering during input/output

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory array with compensated word line access delay

Transposing in a matrix-vector processor

Programmable column access

Data reading/writing method, memory, storage apparatus, and terminal

Semiconductor device configured to store parity data and method of...

Apparatuses for sense amplifier voltage control

In-memory computation circuit and method

One-time programmable memory device and semiconductor memory device...

Partitioned memory architecture and method for repeatedly using the...

Logic drive based on standard commodity FPGA IC chips

Memory device, method of operating the memory device, memory module...

Memory device comprising programmable command-and-address and/or da...

Calibration methods and structures for partitioned memory architect...

Data buffer for memory devices with memory address remapping

Memory array with programmable number of filters

Microelectronic devices, and related memory devices and electronic...

Semiconductor device

Repairable latch array

Semiconductor memory devices

Use of data latches for plane level compression of soft bit data in...

Configurable data protection circuitry for memory devices

Semiconductor device and memory system

Memory circuit architecture with multiplexing between memory banks

Memory device and method of operating the same

Apparatuses, systems, and methods for managing metadata storage at...

Data transmission apparatus and method having clock gating mechanism

Pre-decoder circuity

Signal development caching in a memory device

Receiver for receiving multi-level signal and memory device includi...

Low power and robust level-shifting pulse latch for dual-power memo...

Patents Applicationslast 30 patents

MEMORY DEVICES AND ELECTRONIC SYSTEMS

MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME

COMPARISON OPERATIONS IN MEMORY

REDUCED CIRCUIT AREA MEMORY DEVICE WITH A HALF-WORD MEMORY ARCHITEC...

CONFIGURABLE DATA PROTECTION CIRCUITRY FOR MEMORY DEVICES

SEMICONDUCTOR MEMORY DEVICES

SEMICONDUCTOR DEVICE

LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS

CIRCUIT, MULTIPLIER-ADDER, AND CIRCUIT OPTIMIZATION METHOD

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING

VARIABLE PAGE SIZE ARCHITECTURE

COMPUTE-IN-MEMORY CIRCUIT AND CONTROL METHOD THEREOF

SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE

ZQ CALIBRATION CIRCUIT, OPERATION METHOD, MEMORY AND MEMORY SYSTEM

MEMORY DEVICE AND INTELLIGENT OPERATION METHOD THEREOF

PRE-DECODER CIRCUITRY

APPARATUSES, SYSTEMS, AND METHODS FOR MANAGING METADATA STORAGE AT...

MEMORY CIRCUIT ARCHITECTURE WITH MULTIPLEXING BETWEEN MEMORY BANKS

MEMORY DEVICE AND METHOD OF OPERATING THE SAME

MEMORY SYSTEMS AND DEVICES THAT SUPPORT METHODS FOR CALIBRATING INP...

MEMORY SYSTEM AND OPERATING METHOD OF THE SAME

READ BROADCAST OPERATIONS ASSOCIATED WITH A MEMORY DEVICE

AREA-EFFICIENT, WIDTH-ADJUSTABLE SIGNALING INTERFACE

MEMORIES AND MEMORY COMPONENTS WITH INTERCONNECTED AND REDUNDANT DA...

METHOD AND MEMORY DEVICE WITH IN-MEMORY COMPUTING

READ OPERATIONS FOR A MEMORY ARRAY AND REGISTER

LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS

THREE DIMENSIONAL MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

SYNDROME DECODING SYSTEM

PSEUDO DUAL PORT MEMORY DEVICES