Data reordering during input/output

Industry

CPC
G11C7/1012

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1012Data reordering during input/output

Industries

Patents Grantslast 30 patents

Information Patent Grant
Area-efficient, width-adjustable signaling interface
- Patent number 12,300,345
- Issue date May 13, 2025
- RAMBUS INC.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for memory alignment
- Patent number 12,293,105
- Issue date May 6, 2025
- John D. Leidel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and method of operating the same
- Patent number 12,277,990
- Issue date Apr 15, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Sheng Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Series of parallel sensing operations for multi-level cells
- Patent number 12,272,420
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Qing Dong
- G11 - INFORMATION STORAGE
Information Patent Grant
Communicating data with stacked memory dies
- Patent number 12,265,489
- Issue date Apr 1, 2025
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication-and-accumulation circuits and processing-in-memory d...
- Patent number 12,254,284
- Issue date Mar 18, 2025
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for reading memory
- Patent number 12,243,586
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yuhsiang Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Device ID setting method and electronic device applying the device...
- Patent number 12,237,039
- Issue date Feb 25, 2025
- PixArt Imaging Inc.
- En-Feng Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute-in-memory macro device and electronic device
- Patent number 12,236,332
- Issue date Feb 25, 2025
- Novatek Microelectronics Corp.
- Chien Te Tung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical bank group timing
- Patent number 12,230,355
- Issue date Feb 18, 2025
- RAMBUS INC.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device and intelligent operation method thereof
- Patent number 12,224,038
- Issue date Feb 11, 2025
- Macronix International Co., Ltd.
- Kuan-Chih Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Processing-in-memory devices having multiplication-and-accumulation...
- Patent number 12,217,019
- Issue date Feb 4, 2025
- SK hynix Inc.
- Choung Ki Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three dimensional memory device and method for manufacturing the same
- Patent number 12,205,665
- Issue date Jan 21, 2025
- Taiwan Semiconductor Manufacturing Company Ltd.
- Murat Kerem Akarvardar
- G11 - INFORMATION STORAGE
Information Patent Grant
Write broadcast operations associated with a memory device
- Patent number 12,189,988
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array with compensated word line access delay
- Patent number 12,183,420
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Si Hong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Transposing in a matrix-vector processor
- Patent number 12,182,537
- Issue date Dec 31, 2024
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable column access
- Patent number 12,183,419
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Hyunyoo Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Data reading/writing method, memory, storage apparatus, and terminal
- Patent number 12,183,425
- Issue date Dec 31, 2024
- Huawei Technologies Co., Ltd.
- Huifang Jiao
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device configured to store parity data and method of...
- Patent number 12,176,056
- Issue date Dec 24, 2024
- SK hynix Inc.
- Byoung Sung You
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses for sense amplifier voltage control
- Patent number 12,165,695
- Issue date Dec 10, 2024
- Micron Technology, Inc.
- Sang-Kyun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
In-memory computation circuit and method
- Patent number 12,164,882
- Issue date Dec 10, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yu-Der Chih
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One-time programmable memory device and semiconductor memory device...
- Patent number 12,165,726
- Issue date Dec 10, 2024
- Samsung Electronics Co., Ltd.
- Yeongmuk Cho
- G11 - INFORMATION STORAGE
Information Patent Grant
Partitioned memory architecture and method for repeatedly using the...
- Patent number 12,159,685
- Issue date Dec 3, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Logic drive based on standard commodity FPGA IC chips
- Patent number 12,153,865
- Issue date Nov 26, 2024
- iCometrue Company Ltd.
- Mou-Shiung Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, method of operating the memory device, memory module...
- Patent number 12,154,651
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Sunyoung Lim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device comprising programmable command-and-address and/or da...
- Patent number 12,142,348
- Issue date Nov 12, 2024
- RAMBUS INC.
- Ian Shaeffer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Calibration methods and structures for partitioned memory architect...
- Patent number 12,136,468
- Issue date Nov 5, 2024
- GLOBALFOUNDRIES U.S. Inc.
- Venkatesh P. Gopinath
- G11 - INFORMATION STORAGE
Information Patent Grant
Data buffer for memory devices with memory address remapping
- Patent number 12,125,556
- Issue date Oct 22, 2024
- RAMBUS INC.
- Christopher Haywood
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with programmable number of filters
- Patent number 12,106,822
- Issue date Oct 1, 2024
- MediaTek Singapore Pte Ltd.
- Chetan Deshpande
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microelectronic devices, and related memory devices and electronic...
- Patent number 12,101,932
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Erwin E. Yu
- B81 - MICRO-STRUCTURAL TECHNOLOGY

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE, CONTROL LOGIC CIRCUIT, AND METHOD OF OPERATING THEREOF
- Publication number 20250149074
- Publication date May 8, 2025
- Yue SHENG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DA...
- Publication number 20250131953
- Publication date Apr 24, 2025
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
- Publication number 20250124956
- Publication date Apr 17, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- MURAT KEREM AKARVARDAR
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE GENERATING VOLTAGE RESPONSIVE TO TEMPERATURE AND METH...
- Publication number 20250095696
- Publication date Mar 20, 2025
- SK HYNIX INC.
- Min Hye KANG
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE COLUMN ACCESS
- Publication number 20250095699
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Hyunyoo Lee
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH SPEED MEMORY CIRCUIT ARCHITECTURE WITH IMPROVED AREA AND POWER...
- Publication number 20250095698
- Publication date Mar 20, 2025
- QUALCOMM Incorporated
- Sonia GHOSH
- G11 - INFORMATION STORAGE
Information Patent Application
IN-MEMORY COMPUTATION CIRCUIT AND METHOD
- Publication number 20250094126
- Publication date Mar 20, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Der CHIH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING-IN-MEMORY DEVICES HAVING MULTIPLICATION-AND-ACCUMULATION...
- Publication number 20250094128
- Publication date Mar 20, 2025
- SK HYNIX INC.
- Choung Ki SONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATIC RANDOM ACCESS MEMORY (SRAM) FAULT CORRECTION
- Publication number 20250087295
- Publication date Mar 13, 2025
- QUALCOMM Incorporated
- Darshan Kumar Nandanwar
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-CIRCUIT CONTROL SYSTEM AND READING METHOD FOR STATUS INFORMAT...
- Publication number 20250087253
- Publication date Mar 13, 2025
- Macronix International Co., Ltd.
- Shuo-Nan Hung
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH COMPENSATED WORD LINE ACCESS DELAY
- Publication number 20250087254
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Si Hong Kim
- G11 - INFORMATION STORAGE
Information Patent Application
DATA BUFFER FOR MEMORY DEVICES WITH MEMORY ADDRESS REMAPPING
- Publication number 20250087255
- Publication date Mar 13, 2025
- Rambus Inc.
- Christopher Haywood
- G11 - INFORMATION STORAGE
Information Patent Application
LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS
- Publication number 20250077754
- Publication date Mar 6, 2025
- iCometrue Company Ltd.
- Mou-Shiung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE CONFIGURED TO STORE PARITY DATA AND METHOD OF...
- Publication number 20250069628
- Publication date Feb 27, 2025
- SK HYNIX INC.
- Byoung Sung YOU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ONE-TIME PROGRAMMABLE MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE...
- Publication number 20250054558
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Yeongmuk Cho
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED LOGIC GATE ACCUMULATORS
- Publication number 20250022493
- Publication date Jan 16, 2025
- Raytheon Company
- Micky R. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
High-Speed and Area-Efficient Parallel-Write-and-Read Memory
- Publication number 20250022494
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Hochul LEE
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND ELECTRONIC SYSTEMS
- Publication number 20250008727
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Erwin E. Yu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME
- Publication number 20240412767
- Publication date Dec 12, 2024
- Samsung Electronics Co., LTD
- CHANHEE PARK
- G11 - INFORMATION STORAGE
Information Patent Application
COMPARISON OPERATIONS IN MEMORY
- Publication number 20240412775
- Publication date Dec 12, 2024
- Lodestar Licensing Group LLC
- Kyle B. Wheeler
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCED CIRCUIT AREA MEMORY DEVICE WITH A HALF-WORD MEMORY ARCHITEC...
- Publication number 20240371416
- Publication date Nov 7, 2024
- Synopsys, Inc.
- Harold PILO
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE DATA PROTECTION CIRCUITRY FOR MEMORY DEVICES
- Publication number 20240371423
- Publication date Nov 7, 2024
- Micron Technology, Inc.
- Marco Sforzin
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICES
- Publication number 20240371417
- Publication date Nov 7, 2024
- Samsung Electronics Co., Ltd.
- Jongcheol Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240371448
- Publication date Nov 7, 2024
- KIOXIA Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS
- Publication number 20240362386
- Publication date Oct 31, 2024
- iCometrue Company Ltd.
- Mou-Shiung LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT, MULTIPLIER-ADDER, AND CIRCUIT OPTIMIZATION METHOD
- Publication number 20240355372
- Publication date Oct 24, 2024
- Huawei Technologies Co., Ltd
- Leibin NI
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE PAGE SIZE ARCHITECTURE
- Publication number 20240347088
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Corrado Villa
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
- Publication number 20240345971
- Publication date Oct 17, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE-IN-MEMORY CIRCUIT AND CONTROL METHOD THEREOF
- Publication number 20240339138
- Publication date Oct 10, 2024
- Peking University
- Zongwei WANG
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE
- Publication number 20240329885
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Dmitri A. Yudanov
- G06 - COMPUTING CALCULATING COUNTING

Data reordering during input/output

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Area-efficient, width-adjustable signaling interface

Apparatuses and methods for memory alignment

Memory device and method of operating the same

Series of parallel sensing operations for multi-level cells

Communicating data with stacked memory dies

Multiplication-and-accumulation circuits and processing-in-memory d...

Method for reading memory

Device ID setting method and electronic device applying the device...

Compute-in-memory macro device and electronic device

Hierarchical bank group timing

Memory device and intelligent operation method thereof

Processing-in-memory devices having multiplication-and-accumulation...

Three dimensional memory device and method for manufacturing the same

Write broadcast operations associated with a memory device

Memory array with compensated word line access delay

Transposing in a matrix-vector processor

Programmable column access

Data reading/writing method, memory, storage apparatus, and terminal

Semiconductor device configured to store parity data and method of...

Apparatuses for sense amplifier voltage control

In-memory computation circuit and method

One-time programmable memory device and semiconductor memory device...

Partitioned memory architecture and method for repeatedly using the...

Logic drive based on standard commodity FPGA IC chips

Memory device, method of operating the memory device, memory module...

Memory device comprising programmable command-and-address and/or da...

Calibration methods and structures for partitioned memory architect...

Data buffer for memory devices with memory address remapping

Memory array with programmable number of filters

Microelectronic devices, and related memory devices and electronic...

Patents Applicationslast 30 patents

MEMORY DEVICE, CONTROL LOGIC CIRCUIT, AND METHOD OF OPERATING THEREOF

MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DA...

THREE DIMENSIONAL MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME

MEMORY DEVICE GENERATING VOLTAGE RESPONSIVE TO TEMPERATURE AND METH...

PROGRAMMABLE COLUMN ACCESS

HIGH SPEED MEMORY CIRCUIT ARCHITECTURE WITH IMPROVED AREA AND POWER...

IN-MEMORY COMPUTATION CIRCUIT AND METHOD

PROCESSING-IN-MEMORY DEVICES HAVING MULTIPLICATION-AND-ACCUMULATION...

STATIC RANDOM ACCESS MEMORY (SRAM) FAULT CORRECTION

MULTI-CIRCUIT CONTROL SYSTEM AND READING METHOD FOR STATUS INFORMAT...

MEMORY ARRAY WITH COMPENSATED WORD LINE ACCESS DELAY

DATA BUFFER FOR MEMORY DEVICES WITH MEMORY ADDRESS REMAPPING

LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS

SEMICONDUCTOR DEVICE CONFIGURED TO STORE PARITY DATA AND METHOD OF...

ONE-TIME PROGRAMMABLE MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE...

REDUCED LOGIC GATE ACCUMULATORS

High-Speed and Area-Efficient Parallel-Write-and-Read Memory

MEMORY DEVICES AND ELECTRONIC SYSTEMS

MULTI-BIT CELL AND MULTI-BIT CELL ARRAY INCLUDING THE SAME

COMPARISON OPERATIONS IN MEMORY

REDUCED CIRCUIT AREA MEMORY DEVICE WITH A HALF-WORD MEMORY ARCHITEC...

CONFIGURABLE DATA PROTECTION CIRCUITRY FOR MEMORY DEVICES

SEMICONDUCTOR MEMORY DEVICES

SEMICONDUCTOR DEVICE

LOGIC DRIVE BASED ON STANDARD COMMODITY FPGA IC CHIPS

CIRCUIT, MULTIPLIER-ADDER, AND CIRCUIT OPTIMIZATION METHOD

VARIABLE PAGE SIZE ARCHITECTURE

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING

COMPUTE-IN-MEMORY CIRCUIT AND CONTROL METHOD THEREOF

SIGNAL DEVELOPMENT CACHING IN A MEMORY DEVICE