Delay lines

Industry

CPC
G06F2205/104

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2205/00Indexing scheme relating to group G06F5/00 Methods or arrangements for data conversion without changing the order or content of the data handled

Current Industry

G06F2205/104Delay lines

Industries

Patents Grantslast 30 patents

Information Patent Grant
Method for reducing latency
- Patent number 8,260,982
- Issue date Sep 4, 2012
- LSI Corporation
- Christopher D. Paulson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method for asynchronous pipeline processing with variab...
- Patent number 8,188,765
- Issue date May 29, 2012
- International Business Machines Corporation
- Michael R. Ouellette
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alignment mode selection mechanism for elastic interface
- Patent number 7,443,940
- Issue date Oct 28, 2008
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-power delay buffer circuit
- Patent number 7,170,800
- Issue date Jan 30, 2007
- NATIONAL TAIWAN UNIVERSITY
- Tzi-Dar Chiueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit to combine cache and delay line memory
- Patent number 7,107,401
- Issue date Sep 12, 2006
- Creative Technology Ltd.
- Thomas C. Savell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit for initializing a de-skewing buffer in a clock...
- Patent number 6,952,791
- Issue date Oct 4, 2005
- Broadcom Corporation
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing skew compensation technique for parallel data channels
- Patent number 6,874,097
- Issue date Mar 29, 2005
- Maxtor Corporation
- Mehran Aliahmad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Elastic store circuit with static phase offset
- Patent number 6,681,272
- Issue date Jan 20, 2004
- Applied Micro Circuits Corporation
- Walker Edward Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Elastic interface apparatus and method therefor
- Patent number 6,671,753
- Issue date Dec 30, 2003
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system having memory device with adjustable data clocking...
- Patent number 6,643,789
- Issue date Nov 4, 2003
- Micron Technology, Inc.
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for adjusting delay of a clock signal relative to a data...
- Patent number 6,499,111
- Issue date Dec 24, 2002
- Micron Technology, Inc.
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay signal generating apparatus and semiconductor test apparatus
- Patent number 6,420,921
- Issue date Jul 16, 2002
- Advantest Corporation
- Toshiyuki Okayasu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay device having a delay lock loop and method of calibration the...
- Patent number 6,400,197
- Issue date Jun 4, 2002
- VIA Technologies, Inc.
- Jiin Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system having memory device with adjustable data clocking
- Patent number 6,378,079
- Issue date Apr 23, 2002
- Micron Technology, Inc.
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Elastic interface apparatus and method therefor
- Patent number 6,334,163
- Issue date Dec 25, 2001
- International Business Machines Corp.
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous memory device having an adjustable data clocking circuit
- Patent number 6,327,196
- Issue date Dec 4, 2001
- Micron Technology, Inc.
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for controlling system bus timing with on-chip programmab...
- Patent number 6,289,468
- Issue date Sep 11, 2001
- Advanced Micro Devices, Inc.
- Gary M. Godfrey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for adjusting data timing by delaying clock si...
- Patent number 6,269,451
- Issue date Jul 31, 2001
- Micron Technology, Inc.
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable length delay circuit utilizing an integrated memory device...
- Patent number 5,406,518
- Issue date Apr 11, 1995
- Industrial Technology Research Institute
- Cheng-Yun Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer memory circuit having constant propagation delay
- Patent number 5,226,012
- Issue date Jul 6, 1993
- NEC Corporation
- Toru Amano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable digital signal delay device and its use for a error co...
- Patent number 5,150,066
- Issue date Sep 22, 1992
- U.S. Philips Corporation
- Pascal Butel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus including atomic probes utilizing tunnel current to read,...
- Patent number 5,144,581
- Issue date Sep 1, 1992
- Olympus Optical Co., Ltd.
- Akitoshi Toda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous voice reconstruction for a digital communication system
- Patent number 5,103,467
- Issue date Apr 7, 1992
- Motorola, Inc.
- Greogory J. Bedlek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital memory delay line for a video border generator
- Patent number 4,961,114
- Issue date Oct 2, 1990
- The Grass Valley Group, Inc.
- Charles White
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of addressing a random access memory as a delay line, and si...
- Patent number 4,757,469
- Issue date Jul 12, 1988
- U.S. Philips Corporation
- Eddy A. M. Odijk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital delay line
- Patent number 4,611,300
- Issue date Sep 9, 1986
- Peavey Electronics Corp.
- Wilson E. Taylor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable length delay line
- Patent number 4,213,191
- Issue date Jul 15, 1980
- Westinghouse Electric Corp.
- Robert S. Gemp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital matched filter and correlator using random access memory
- Patent number 3,950,635
- Issue date Apr 13, 1976
- James Nickolas Constant
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DATA REARRANGING CIRCUIT, VARIABLE DELAY CIRCUIT, FAST FOURIER TRAN...
- Publication number 20120278373
- Publication date Nov 1, 2012
- NEC Corporation
- Yuki Kobayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCUIT AND METHOD FOR ASYNCHRONOUS PIPELINE PROCESSING WITH VARIAB...
- Publication number 20120062300
- Publication date Mar 15, 2012
- International Business Machines Corporation
- Michael R. Ouellette
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method of transmitting data in an electronic circuit
- Publication number 20070002634
- Publication date Jan 4, 2007
- Luc Montperrus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for reducing latency
- Publication number 20060277329
- Publication date Dec 7, 2006
- Christopher D. Paulson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Alignment mode selection mechanism for elastic interface
- Publication number 20060181914
- Publication date Aug 17, 2006
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low-power delay buffer circuit
- Publication number 20060152980
- Publication date Jul 13, 2006
- Tzi-Dar Chiueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and circuit for initializing a de-skewing buffer in a clock...
- Publication number 20030105985
- Publication date Jun 5, 2003
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer system having memory device with adjustable data clocking...
- Publication number 20020144170
- Publication date Oct 3, 2002
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Elastic interface apparatus and method therefor
- Publication number 20020013875
- Publication date Jan 31, 2002
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for adjusting data delay
- Publication number 20010049797
- Publication date Dec 6, 2001
- Patrick J. Mullarkey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data processing circuit
- Publication number 20010021953
- Publication date Sep 13, 2001
- Katsuya Nakashima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delay device having a delay lock loop and method of calibration the...
- Publication number 20010009385
- Publication date Jul 26, 2001
- Jiin Lai
- G06 - COMPUTING CALCULATING COUNTING

Delay lines

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Method for reducing latency

Circuit and method for asynchronous pipeline processing with variab...

Alignment mode selection mechanism for elastic interface

Low-power delay buffer circuit

Method and circuit to combine cache and delay line memory

Method and circuit for initializing a de-skewing buffer in a clock...

Timing skew compensation technique for parallel data channels

Elastic store circuit with static phase offset

Elastic interface apparatus and method therefor

Computer system having memory device with adjustable data clocking...

Apparatus for adjusting delay of a clock signal relative to a data...

Delay signal generating apparatus and semiconductor test apparatus

Delay device having a delay lock loop and method of calibration the...

Computer system having memory device with adjustable data clocking

Elastic interface apparatus and method therefor

Synchronous memory device having an adjustable data clocking circuit

Technique for controlling system bus timing with on-chip programmab...

Method and apparatus for adjusting data timing by delaying clock si...

Variable length delay circuit utilizing an integrated memory device...

Buffer memory circuit having constant propagation delay

Programmable digital signal delay device and its use for a error co...

Apparatus including atomic probes utilizing tunnel current to read,...

Asynchronous voice reconstruction for a digital communication system

Digital memory delay line for a video border generator

Method of addressing a random access memory as a delay line, and si...

Digital delay line

Variable length delay line

Digital matched filter and correlator using random access memory

Patents Applicationslast 30 patents

DATA REARRANGING CIRCUIT, VARIABLE DELAY CIRCUIT, FAST FOURIER TRAN...

CIRCUIT AND METHOD FOR ASYNCHRONOUS PIPELINE PROCESSING WITH VARIAB...

System and method of transmitting data in an electronic circuit

Method for reducing latency

Alignment mode selection mechanism for elastic interface

Low-power delay buffer circuit

Method and circuit for initializing a de-skewing buffer in a clock...

Computer system having memory device with adjustable data clocking...

Elastic interface apparatus and method therefor

Method and apparatus for adjusting data delay

Data processing circuit

Delay device having a delay lock loop and method of calibration the...