Details of memory controller

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CPC
G06F13/1668

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Current Industry

G06F13/1668Details of memory controller

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Patents Grantslast 30 patents

Information Patent Grant
Streaming engine with early and late address and loop count registe...
- Patent number 12,367,150
- Issue date Jul 22, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Solid state drive with multiplexed internal channel access during p...
- Patent number 12,366,965
- Issue date Jul 22, 2025
- SK hynix NAND Product Solutions Corporation
- David J. Pelster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer architecture with disaggregated memory and high-bandwidth...
- Patent number 12,367,134
- Issue date Jul 22, 2025
- Luminous Computing, Inc.
- David Cureton Baker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, device, and computer program product for data access
- Patent number 12,367,162
- Issue date Jul 22, 2025
- Dell Products L.P.
- Ran Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,360,843
- Issue date Jul 15, 2025
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Credit aware central arbitration for multi-endpoint, multi-core system
- Patent number 12,360,844
- Issue date Jul 15, 2025
- Texas Instruments Incorporated
- Matthew David Pierson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output device operational modes for a system with memory pools
- Patent number 12,360,930
- Issue date Jul 15, 2025
- Honeywell International Inc.
- Pavel Zaykov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translating between CXL.mem and CXL.cache read transactions
- Patent number 12,360,925
- Issue date Jul 15, 2025
- UnifabriX Ltd.
- Ronen Aharon Hyatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and circuits for aggregating processing units and dynamical...
- Patent number 12,353,337
- Issue date Jul 8, 2025
- RAMBUS INC.
- Steven C. Woo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Locality-based data processing
- Patent number 12,353,338
- Issue date Jul 8, 2025
- Advanced Micro Devices, Inc.
- Gabriel H. Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Near-memory computing module and method, near-memory computing netw...
- Patent number 12,353,346
- Issue date Jul 8, 2025
- XI'AN UNIIC SEMICONDUCTORS CO., LTD.
- Xiping Jiang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Matrix data reuse techniques in multiply and accumulate units of pr...
- Patent number 12,353,846
- Issue date Jul 8, 2025
- MemryX
- Jacob Botimer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller and operating method thereof
- Patent number 12,346,250
- Issue date Jul 1, 2025
- SK hynix Inc.
- Jeen Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Firmware updating in PCIe type apparatuses
- Patent number 12,346,681
- Issue date Jul 1, 2025
- Yangtze Memory Technologies Co., Ltd.
- Peian Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic baseboard management controller memory use
- Patent number 12,346,282
- Issue date Jul 1, 2025
- Lenovo Enterprise Solutions (Singapore) Pte. Ltd.
- Gary D Cudak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seamlessly integrated microcontroller chip
- Patent number 12,339,794
- Issue date Jun 24, 2025
- AyDeeKay
- Scott David Kee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for replacing data from near to far memory ove...
- Patent number 12,339,779
- Issue date Jun 24, 2025
- University of Pittsburgh of the Commonwealth System of Higher Education
- Debashis Ganguly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block or page lock features in serial interface memory
- Patent number 12,339,788
- Issue date Jun 24, 2025
- Theodore T. Pekny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tokens to indicate completion of data storage
- Patent number 12,339,778
- Issue date Jun 24, 2025
- Zoltan Szubbocsev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device manageability bus
- Patent number 12,332,812
- Issue date Jun 17, 2025
- Intel Corporation
- George Vergis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-posted write transactions for a computer bus
- Patent number 12,332,813
- Issue date Jun 17, 2025
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic assignment of bus bandwidth for sending tensors to neural p...
- Patent number 12,332,816
- Issue date Jun 17, 2025
- DEEPX CO., LTD.
- Je Ik Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with address remapping circuitry to respond to a...
- Patent number 12,332,782
- Issue date Jun 17, 2025
- STMICROELECTRONICS INTERNATIONAL N.V.
- Loris Luise
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output (I/O) store protocol for pipelining coherent operations
- Patent number 12,332,783
- Issue date Jun 17, 2025
- International Business Machines Corporation
- Ekaterina M. Ambroladze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous architecture, delivered by cxl based cached switch SO...
- Patent number 12,326,813
- Issue date Jun 10, 2025
- Avago Technologies International Sales Pte. Limited
- Shreyas Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instant submission queue release
- Patent number 12,327,137
- Issue date Jun 10, 2025
- SanDisk Technologies, Inc.
- Amir Segev
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collaborative sensor data processing by deep learning accelerators...
- Patent number 12,327,175
- Issue date Jun 10, 2025
- Micron Technology, Inc.
- Poorna Kale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multicast and reflective memory behavior for memory model consistency
- Patent number 12,326,820
- Issue date Jun 10, 2025
- NVIDIA Corporation
- Glenn Alan Dearth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application authentication and data encryption without stored pre-s...
- Patent number 12,326,823
- Issue date Jun 10, 2025
- CRYPTOGRAPHY RESEARCH, INC.
- Mark E. Marson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bridge device and method for transferring command and data between...
- Patent number 12,321,297
- Issue date Jun 3, 2025
- Silicon Motion, Inc.
- Chen-Hao Chen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE MEMORIES IN VERTICALLY INTEGRATED MEMORY SYSTEMS AND ASSOCIAT...
- Publication number 20250231877
- Publication date Jul 17, 2025
- Micron Technology, Inc.
- Raghukiran Sreeramaneni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SMART STORAGE DEVICES
- Publication number 20250231891
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- SOO-YOUNG JI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE SIZE CHANGE
- Publication number 20250231878
- Publication date Jul 17, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND SCHEDULING FOR A MEMORY SYSTEM
- Publication number 20250231716
- Publication date Jul 17, 2025
- Micron Technology, Inc.
- Domenico Francesco De Angelis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL NETWORK PRE-ARBITRATION
- Publication number 20250231684
- Publication date Jul 17, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Matthew David PIERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOURCE ORDERING IN DEVICE INTERCONNECTS
- Publication number 20250225098
- Publication date Jul 10, 2025
- Intel Corporation
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH BANDWIDTH THREE-DIMENSIONAL SYSTEM-ON-CHIP
- Publication number 20250225095
- Publication date Jul 10, 2025
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM TO MINIMIZE EFFECTS OF GROUND PLANE NOISE
- Publication number 20250225088
- Publication date Jul 10, 2025
- Dell Products L.P.
- Sandor Tibor Farkas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT
- Publication number 20250217070
- Publication date Jul 3, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING SYSTEM INCLUDING CXL SWITCH, MEMORY DEVICE AND STORAGE DE...
- Publication number 20250217309
- Publication date Jul 3, 2025
- Samsung Electronics Co., Ltd.
- KYUNGHAN LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATOR SYSTEM USING DIGITAL IN-MEMORY COMPUTE CHIPLET DEVICES...
- Publication number 20250209017
- Publication date Jun 26, 2025
- d-MATRIX CORPORATION
- Sudeep BHOJA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE I/O VIRTUALIZATION INTERRUPT AND SCHEDULING
- Publication number 20250209021
- Publication date Jun 26, 2025
- Intel Corporation
- David Puffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE DEVICE WITH HARDWARE ACCELERATOR
- Publication number 20250209016
- Publication date Jun 26, 2025
- Sony Interactive Entertainment LLC
- John Gentilin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Translating Between CXL.mem and CXL.cache Read Transactions
- Publication number 20250199969
- Publication date Jun 19, 2025
- UNIFABRIX LTD.
- Ronen Aharon Hyatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL LAYER OF HIGH-SPEED MEMORY AND READ TRAINING METHOD OF HIG...
- Publication number 20250199968
- Publication date Jun 19, 2025
- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Jaewoong CHOI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing-in-Memory Chip Architecture, Packaging Method, and Apparatus
- Publication number 20250199998
- Publication date Jun 19, 2025
- Hangzhou Zhicun (Witmem) Technology Co., Ltd.
- Shaodi WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND MEDIA FOR UNORDERED INPUT/OUTPUT DIRECT MEMOR...
- Publication number 20250190349
- Publication date Jun 12, 2025
- SK hynix NAND Product Solutions Corporation
- Samuel Bradshaw
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMAND FENCING FOR MEMORY-BASED COMMUNICATION QUEUES
- Publication number 20250190376
- Publication date Jun 12, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND ELECTRONIC DEVICE INCLUDING THE SAME
- Publication number 20250190348
- Publication date Jun 12, 2025
- Samsung Electronics Co., Ltd.
- Kil Ho LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY EXPANDER, ELECTRONIC DEVICE INCLUDING THE MEMORY EXPANDER AN...
- Publication number 20250190378
- Publication date Jun 12, 2025
- Samsung Electronics Co., Ltd.
- Hyunseok Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE BURST LENGTH FOR A MEMORY DEVICE
- Publication number 20250190379
- Publication date Jun 12, 2025
- ADVANCED MICRO DEVICES, INC.
- Aaron John NYGREN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE OPTIMIZATION FOR A REMOTE STORAGE DEVICE
- Publication number 20250190355
- Publication date Jun 12, 2025
- International Business Machines Corporation
- ANDREW C. M. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LARGE PACKET DAISY CHAIN SERIAL BUS
- Publication number 20250190375
- Publication date Jun 12, 2025
- Graco Minnesota Inc.
- Morgan O. LaMoore
- G05 - CONTROLLING REGULATING
Information Patent Application
TECHNOLOGIES FOR DYNAMIC ACCELERATOR SELECTION
- Publication number 20250193295
- Publication date Jun 12, 2025
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH STORAGE DEVICE PASSTHROUGH IN A VIRTUALIZATION SYSTEM
- Publication number 20250181378
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- Hui WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO ESTIMATE CONSUMED MEMORY BANDWIDTH
- Publication number 20250181521
- Publication date Jun 5, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Patrick Kruse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING SYSTEM ARCHITECTURE HAVING EFFICIENT BUS CONNECTIONS
- Publication number 20250181527
- Publication date Jun 5, 2025
- SK HYNIX INC.
- Seong Ju LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FEATURE DICTIONARY FOR BANDWIDTH ENHANCEMENT
- Publication number 20250181529
- Publication date Jun 5, 2025
- Micron Technology, Inc.
- Kenneth Marion Curewitz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECONFIGURABLE CHANNEL INTERFACES FOR MEMORY DEVICES
- Publication number 20250181537
- Publication date Jun 5, 2025
- Lodestar Licensing Group LLC
- Michael Dieter Richter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING SYSTEM ARCHITECTURE HAVING EFFICIENT BUS CONNECTIONS
- Publication number 20250181526
- Publication date Jun 5, 2025
- SK HYNIX INC.
- Seong Ju LEE
- G06 - COMPUTING CALCULATING COUNTING

Details of memory controller

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Streaming engine with early and late address and loop count registe...

Solid state drive with multiplexed internal channel access during p...

Computer architecture with disaggregated memory and high-bandwidth...

Method, device, and computer program product for data access

Multicore shared cache operation engine

Credit aware central arbitration for multi-endpoint, multi-core system

Input/output device operational modes for a system with memory pools

Translating between CXL.mem and CXL.cache read transactions

Methods and circuits for aggregating processing units and dynamical...

Locality-based data processing

Near-memory computing module and method, near-memory computing netw...

Matrix data reuse techniques in multiply and accumulate units of pr...

Controller and operating method thereof

Firmware updating in PCIe type apparatuses

Dynamic baseboard management controller memory use

Seamlessly integrated microcontroller chip

Method and apparatus for replacing data from near to far memory ove...

Block or page lock features in serial interface memory

Tokens to indicate completion of data storage

Memory device manageability bus

Non-posted write transactions for a computer bus

Dynamic assignment of bus bandwidth for sending tensors to neural p...

Integrated circuit with address remapping circuitry to respond to a...

Input/output (I/O) store protocol for pipelining coherent operations

Heterogeneous architecture, delivered by cxl based cached switch SO...

Instant submission queue release

Collaborative sensor data processing by deep learning accelerators...

Multicast and reflective memory behavior for memory model consistency

Application authentication and data encryption without stored pre-s...

Bridge device and method for transferring command and data between...

Patents Applicationslast 30 patents

CACHE MEMORIES IN VERTICALLY INTEGRATED MEMORY SYSTEMS AND ASSOCIAT...

SMART STORAGE DEVICES

CACHE SIZE CHANGE

COMMAND SCHEDULING FOR A MEMORY SYSTEM

VIRTUAL NETWORK PRE-ARBITRATION

SOURCE ORDERING IN DEVICE INTERCONNECTS

HIGH BANDWIDTH THREE-DIMENSIONAL SYSTEM-ON-CHIP

SYSTEM TO MINIMIZE EFFECTS OF GROUND PLANE NOISE

MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT

COMPUTING SYSTEM INCLUDING CXL SWITCH, MEMORY DEVICE AND STORAGE DE...

ACCELERATOR SYSTEM USING DIGITAL IN-MEMORY COMPUTE CHIPLET DEVICES...

SCALABLE I/O VIRTUALIZATION INTERRUPT AND SCHEDULING

STORAGE DEVICE WITH HARDWARE ACCELERATOR

Translating Between CXL.mem and CXL.cache Read Transactions

PHYSICAL LAYER OF HIGH-SPEED MEMORY AND READ TRAINING METHOD OF HIG...

Computing-in-Memory Chip Architecture, Packaging Method, and Apparatus

SYSTEMS, METHODS, AND MEDIA FOR UNORDERED INPUT/OUTPUT DIRECT MEMOR...

COMMAND FENCING FOR MEMORY-BASED COMMUNICATION QUEUES

PROCESSOR AND ELECTRONIC DEVICE INCLUDING THE SAME

MEMORY EXPANDER, ELECTRONIC DEVICE INCLUDING THE MEMORY EXPANDER AN...

VARIABLE BURST LENGTH FOR A MEMORY DEVICE

CACHE OPTIMIZATION FOR A REMOTE STORAGE DEVICE

LARGE PACKET DAISY CHAIN SERIAL BUS

TECHNOLOGIES FOR DYNAMIC ACCELERATOR SELECTION

FLASH STORAGE DEVICE PASSTHROUGH IN A VIRTUALIZATION SYSTEM

METHODS AND APPARATUS TO ESTIMATE CONSUMED MEMORY BANDWIDTH

COMPUTING SYSTEM ARCHITECTURE HAVING EFFICIENT BUS CONNECTIONS

FEATURE DICTIONARY FOR BANDWIDTH ENHANCEMENT

RECONFIGURABLE CHANNEL INTERFACES FOR MEMORY DEVICES

COMPUTING SYSTEM ARCHITECTURE HAVING EFFICIENT BUS CONNECTIONS