Detection or location of defective auxiliary circuits

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GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/02Detection or location of defective auxiliary circuits

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Memory controller performing training to improve communication and...
- Patent number 12,272,425
- Issue date Apr 8, 2025
- SK Hynix Inc.
- Nam Hyeok Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Row access strobe (RAS) clobber and row hammer failures using a det...
- Patent number 12,265,630
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for dynamic accelerator selection
- Patent number 12,261,940
- Issue date Mar 25, 2025
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system determining a degraded word line based on fail bit co...
- Patent number 12,259,778
- Issue date Mar 25, 2025
- SK Hynix Inc.
- Gi Bbeum Han
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device and method for performing test
- Patent number 12,254,937
- Issue date Mar 18, 2025
- SK hynix Inc.
- Choung Ki Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with serial and parallel testing structure for sensin...
- Patent number 12,254,938
- Issue date Mar 18, 2025
- Alberto Troia
- G11 - INFORMATION STORAGE
Information Patent Grant
On-die termination of address and command signals
- Patent number 12,249,399
- Issue date Mar 11, 2025
- RAMBUS INC.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method
- Patent number 12,249,389
- Issue date Mar 11, 2025
- Kioxia Corporation
- Motoki Shimizu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for calibrating adjustable impedances of a...
- Patent number 12,249,969
- Issue date Mar 11, 2025
- Dean Gans
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage detection for managed memory systems
- Patent number 12,243,600
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Yoav Weinberg
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed test of functional memory interface logic in devices
- Patent number 12,243,603
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system
- Patent number 12,237,021
- Issue date Feb 25, 2025
- Kioxia Corporation
- Takashi Nakagawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for calibrating adjustable impedances of a...
- Patent number 12,231,106
- Issue date Feb 18, 2025
- Dean Gans
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device performing data read operation and controller...
- Patent number 12,230,341
- Issue date Feb 18, 2025
- SK hynix Inc.
- Hyung Jin Choi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device, memory system, and read operation method thereof
- Patent number 12,230,342
- Issue date Feb 18, 2025
- Yangtze Memory Technologies Co., Ltd.
- Hongtao Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Controller to detect malfunctioning address of memory device
- Patent number 12,230,350
- Issue date Feb 18, 2025
- RAMBUS INC.
- Adrian E. Ong
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component having internal read-modify-write operation
- Patent number 12,223,207
- Issue date Feb 11, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array test structure and method of forming the same
- Patent number 12,217,826
- Issue date Feb 4, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Meng-Han Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device, memory system, and operation method of memory device
- Patent number 12,211,581
- Issue date Jan 28, 2025
- Samsung Electronics Co., Ltd.
- Donghun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods including memory commands for semiconductor...
- Patent number 12,197,355
- Issue date Jan 14, 2025
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for testing inaccessible interface circuits i...
- Patent number 12,196,805
- Issue date Jan 14, 2025
- RAMBUS INC.
- Frederick A. Ware
- G01 - MEASURING TESTING
Information Patent Grant
Storage device with eye open monitoring (EOM) circuit and method to...
- Patent number 12,198,781
- Issue date Jan 14, 2025
- Samsung Electronics Co., Ltd.
- Hyunjoon Yoo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device performing sensing operation and method of operating...
- Patent number 12,190,973
- Issue date Jan 7, 2025
- SK Hynix Inc.
- Se Chun Park
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory test system and memory test method
- Patent number 12,190,977
- Issue date Jan 7, 2025
- NANYA TECHNOLOGY CORPORATION
- Cheng-Ting Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory test system and memory test method
- Patent number 12,190,978
- Issue date Jan 7, 2025
- NANYA TECHNOLOGY CORPORATION
- Cheng-Ting Hsu
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory built-in self-test power fail mitigation
- Patent number 12,190,979
- Issue date Jan 7, 2025
- Intel Corporation
- Bill Nale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage apparatus comprising cell section operable as dosimete...
- Patent number 12,183,410
- Issue date Dec 31, 2024
- ams International AG
- Tommaso Vincenzi
- G11 - INFORMATION STORAGE
Information Patent Grant
Block family error avoidance bin scans after memory device power-on
- Patent number 12,183,413
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Guang Hu
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for identifying memory devices of a semicon...
- Patent number 12,184,280
- Issue date Dec 31, 2024
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUSES AND METHODS FOR GRANULAR SINGLE-PASS METADATA ACCESS OP...
- Publication number 20250111887
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20250111873
- Publication date Apr 3, 2025
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...
- Publication number 20250103523
- Publication date Mar 27, 2025
- Lodestar Licensing Group LLP
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCAN-BASED VOLTAGE FREQUENCY SCALING
- Publication number 20250104794
- Publication date Mar 27, 2025
- Micron Technology, Inc.
- Leon Zlotnik
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE
- Publication number 20250095755
- Publication date Mar 20, 2025
- Samsung Electronics Co., Ltd.
- Tongsung Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD THEREOF
- Publication number 20250095766
- Publication date Mar 20, 2025
- Yangtze Memory Technologies Co., Ltd.
- Teng ZHOU
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL DROP COMPENSATED MEMORY
- Publication number 20250087289
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON
- Publication number 20250087292
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Guang Hu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...
- Publication number 20250070782
- Publication date Feb 27, 2025
- Lodestar Licensing Group LLC
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-POWER SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20250069644
- Publication date Feb 27, 2025
- Rambus Inc.
- Jared L. ZERBE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20250054561
- Publication date Feb 13, 2025
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20250054562
- Publication date Feb 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Wei LIN
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM
- Publication number 20250054564
- Publication date Feb 13, 2025
- KIOXIA Corporation
- Marie Takada
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT
- Publication number 20250044948
- Publication date Feb 6, 2025
- Lodestar Licensing Group, LLC
- Larry J. Koudele
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORE...
- Publication number 20250045159
- Publication date Feb 6, 2025
- SILICON MOTION, INC.
- Tsung-Chieh YANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT SOFT DECODING OF ERROR CORRECTION CODE VIA EXTRINSIC BIT...
- Publication number 20250037784
- Publication date Jan 30, 2025
- KIOXIA Corporation
- Avi Steiner
- G11 - INFORMATION STORAGE
Information Patent Application
On-Die Termination of Address and Command Signals
- Publication number 20250037746
- Publication date Jan 30, 2025
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING
- Publication number 20250028660
- Publication date Jan 23, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PRIORITIZATION OF SELECTOR VT SCANS
- Publication number 20250022523
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Pitamber Shukla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250022504
- Publication date Jan 16, 2025
- Samsung Electronics Co., Ltd.
- YOON-JOO EOM
- G11 - INFORMATION STORAGE
Information Patent Application
Non-Volatile Memory Switch with Host Isolation
- Publication number 20250013516
- Publication date Jan 9, 2025
- Marvell Asia Pte Ltd.
- Liping Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...
- Publication number 20250006250
- Publication date Jan 2, 2025
- Tahoe Research, Ltd.
- Chong J. ZHAO
- G11 - INFORMATION STORAGE
Information Patent Application
EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY
- Publication number 20250006285
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
TEST CIRCUIT AND SEMICONDUCTOR MEMORY SYSTEM INCLUDING THE TEST CIR...
- Publication number 20250006291
- Publication date Jan 2, 2025
- SK HYNIX INC.
- Jong Seok JUNG
- G11 - INFORMATION STORAGE
Information Patent Application
HOST APPARATUS AND EXTENSION DEVICE
- Publication number 20240428843
- Publication date Dec 26, 2024
- KIOXIA Corporation
- Akihisa FUJIMOTO
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM, METHOD OF OPERATING MEMORY SYSTEM, AND COMPUTER-READ...
- Publication number 20240428873
- Publication date Dec 26, 2024
- Yangtze Memory Technologies Co., Ltd.
- Lingling MA
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CIRCUIT WITH ADAPTIVE REPAIR CAPABILITY
- Publication number 20240420793
- Publication date Dec 19, 2024
- Rambus Inc.
- Scott C. Best
- G11 - INFORMATION STORAGE
Information Patent Application
GLITCH DETECTION REDUNDANCY
- Publication number 20240412805
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Angelo Alberto Rovelli
- G11 - INFORMATION STORAGE
Information Patent Application
RANDOM ACCESS MEMORY AND CORRESPONDING METHOD FOR MANAGING A RANDOM...
- Publication number 20240404613
- Publication date Dec 5, 2024
- STMicroelectronics S.r.l.
- Marco Casarsa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING OFFSETS FOR MEMORY READ OPERATIONS
- Publication number 20240404604
- Publication date Dec 5, 2024
- Micron Technology, Inc.
- Jie Zhou
- G11 - INFORMATION STORAGE

Detection or location of defective auxiliary circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory controller performing training to improve communication and...

Row access strobe (RAS) clobber and row hammer failures using a det...

Technologies for dynamic accelerator selection

Memory system determining a degraded word line based on fail bit co...

Semiconductor device and method for performing test

Memory device with serial and parallel testing structure for sensin...

On-die termination of address and command signals

Memory system and method

Apparatuses and methods for calibrating adjustable impedances of a...

Voltage detection for managed memory systems

At-speed test of functional memory interface logic in devices

Memory system

Apparatuses and methods for calibrating adjustable impedances of a...

Semiconductor device performing data read operation and controller...

Memory device, memory system, and read operation method thereof

Controller to detect malfunctioning address of memory device

Memory component having internal read-modify-write operation

Memory device for supporting command bus training mode and method o...

Memory array test structure and method of forming the same

Memory device, memory system, and operation method of memory device

Apparatuses and methods including memory commands for semiconductor...

Methods and apparatus for testing inaccessible interface circuits i...

Storage device with eye open monitoring (EOM) circuit and method to...

Memory device performing sensing operation and method of operating...

Memory test system and memory test method

Memory test system and memory test method

Dynamic random access memory built-in self-test power fail mitigation

Data storage apparatus comprising cell section operable as dosimete...

Block family error avoidance bin scans after memory device power-on

Apparatuses and methods for identifying memory devices of a semicon...

Patents Applicationslast 30 patents

APPARATUSES AND METHODS FOR GRANULAR SINGLE-PASS METADATA ACCESS OP...

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...

SCAN-BASED VOLTAGE FREQUENCY SCALING

MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD OF MEMORY DEVICE

MEMORY CONTROLLER, MEMORY SYSTEM AND OPERATION METHOD THEREOF

SIGNAL DROP COMPENSATED MEMORY

BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON

APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...

LOW-POWER SOURCE-SYNCHRONOUS SIGNALING

TIMING-DRIFT CALIBRATION

INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME

MEMORY SYSTEM

DYNAMIC TEMPERATURE COMPENSATION IN A MEMORY COMPONENT

METHOD, MEMORY CONTROLLER, AND MEMORY SYSTEM FOR READING DATA STORE...

EFFICIENT SOFT DECODING OF ERROR CORRECTION CODE VIA EXTRINSIC BIT...

On-Die Termination of Address and Command Signals

MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING

DYNAMIC PRIORITIZATION OF SELECTOR VT SCANS

MEMORY DEVICE AND OPERATION METHOD THEREOF

Non-Volatile Memory Switch with Host Isolation

TECHNIQUES TO COUPLE HIGH BANDWIDTH MEMORY DEVICE ON SILICON SUBSTR...

EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY

TEST CIRCUIT AND SEMICONDUCTOR MEMORY SYSTEM INCLUDING THE TEST CIR...

HOST APPARATUS AND EXTENSION DEVICE

MEMORY SYSTEM, METHOD OF OPERATING MEMORY SYSTEM, AND COMPUTER-READ...

BUFFER CIRCUIT WITH ADAPTIVE REPAIR CAPABILITY

GLITCH DETECTION REDUNDANCY

RANDOM ACCESS MEMORY AND CORRESPONDING METHOD FOR MANAGING A RANDOM...

DETERMINING OFFSETS FOR MEMORY READ OPERATIONS