Disposition of storage elements

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G11C5/02Disposition of storage elements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Semiconductor memory devices and methods of manufacturing thereof
- Patent number 12,369,316
- Issue date Jul 22, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Han Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory chip
- Patent number 12,354,693
- Issue date Jul 8, 2025
- Winbond Electronics Corp.
- Ying-Te Tu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component for a system-on-chip device
- Patent number 12,340,862
- Issue date Jun 24, 2025
- Alberto Troia
- G11 - INFORMATION STORAGE
Information Patent Grant
3D flash memory module chip and method of fabricating the same
- Patent number 12,327,594
- Issue date Jun 10, 2025
- Macronix International Co., Ltd.
- Teng-Hao Yeh
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with buried gate word line drivers
- Patent number 12,322,475
- Issue date Jun 3, 2025
- SK Hynix Inc.
- Dong Hyun Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
DIMM socket with seating floor to meet both longer length edge cont...
- Patent number 12,315,587
- Issue date May 27, 2025
- Intel Corporation
- Xiang Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array
- Patent number 12,317,510
- Issue date May 27, 2025
- United Microelectronics Corp.
- Hui-Lin Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Unified micro system with memory integrated circuit and logic integ...
- Patent number 12,302,554
- Issue date May 13, 2025
- Etron Technology, Inc.
- Chao-Chun Lu
- G11 - INFORMATION STORAGE
Information Patent Grant
Convolution operation accelerator and convolution operation method
- Patent number 12,293,804
- Issue date May 6, 2025
- Huazhong University of Science & Technology
- Xiangshui Miao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Manufacturing method of forming a semiconductor memory device with...
- Patent number 12,293,805
- Issue date May 6, 2025
- SK hynix Inc.
- Nam Jae Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
3D memory circuit
- Patent number 12,293,108
- Issue date May 6, 2025
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Javier A. DeLaCruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device
- Patent number 12,277,989
- Issue date Apr 15, 2025
- Kioxia Corporation
- Ryu Ogiwara
- G11 - INFORMATION STORAGE
Information Patent Grant
Communicating data with stacked memory dies
- Patent number 12,265,489
- Issue date Apr 1, 2025
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sub-word line driver placement for memory device
- Patent number 12,254,919
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yi-Tzu Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-deck non-volatile memory architecture with reduced terminatio...
- Patent number 12,254,946
- Issue date Mar 18, 2025
- Intel Corporation
- William K. Waller
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Write driver boost circuit for memory cells
- Patent number 12,254,918
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated assemblies and methods of forming integrated assemblies
- Patent number 12,250,812
- Issue date Mar 11, 2025
- Micron Technology, Inc.
- Jordan D. Greenlee
- G11 - INFORMATION STORAGE
Information Patent Grant
On-die termination of address and command signals
- Patent number 12,249,399
- Issue date Mar 11, 2025
- RAMBUS INC.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory systems with vertical integration
- Patent number 12,249,390
- Issue date Mar 11, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chieh Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated assemblies comprising vertically-stacked decks with inte...
- Patent number 12,249,598
- Issue date Mar 11, 2025
- Micron Technology, Inc.
- Werner Juengling
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for organizing data in a memory device
- Patent number 12,249,377
- Issue date Mar 11, 2025
- Glen E. Hush
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system having combined high density, low bandwidth and low d...
- Patent number 12,243,575
- Issue date Mar 4, 2025
- Apple Inc.
- Sukalpa Biswas
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus to perform a read of a column in a memory acce...
- Patent number 12,237,040
- Issue date Feb 25, 2025
- Intel Corporation
- Sourabh Dongaonkar
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device, memory device, and electronic device
- Patent number 12,230,314
- Issue date Feb 18, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Tatsuya Onuki
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with conductive layers separated betwee...
- Patent number 12,230,326
- Issue date Feb 18, 2025
- Kioxia Corporation
- Keisuke Suda
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and method for fabricating the same
- Patent number 12,223,989
- Issue date Feb 11, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Harry-Hak-Lay Chuang
- G11 - INFORMATION STORAGE
Information Patent Grant
TSV check circuit with replica path
- Patent number 12,224,275
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Harutaka Makabe
- G11 - INFORMATION STORAGE
Information Patent Grant
Drive circuit and memory device
- Patent number 12,217,825
- Issue date Feb 4, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Zhonglai Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated assemblies having transistor body regions coupled to car...
- Patent number 12,219,758
- Issue date Feb 4, 2025
- Micron Technology, Inc.
- Kamal M. Karda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array, integrated circuit including the same, and manufactur...
- Patent number 12,211,825
- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Wei-Sheng Yun
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SEMICON...
- Publication number 20250232796
- Publication date Jul 17, 2025
- SK HYNIX INC.
- Nam Jae LEE
- G11 - INFORMATION STORAGE
Information Patent Application
On-Die Termination of Address and Command Signals
- Publication number 20250226015
- Publication date Jul 10, 2025
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Application
CONSOLIDATION OF STAIRCASE AREA ETCH AND CMOS CONTACT AREA ETCH IN...
- Publication number 20250220902
- Publication date Jul 3, 2025
- Liu Liu
- G11 - INFORMATION STORAGE
Information Patent Application
STACKED DRAM DEVICE AND METHOD OF MANUFACTURE
- Publication number 20250210068
- Publication date Jun 26, 2025
- Rambus Inc.
- Thomas Vogelsang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME
- Publication number 20250201280
- Publication date Jun 19, 2025
- Samsung Electronics Co., Ltd.
- Junsuk KIM
- G11 - INFORMATION STORAGE
Information Patent Application
Sub-Word Line Driver Placement For Memory Device
- Publication number 20250201297
- Publication date Jun 19, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yi-Tzu Chen
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Assemblies and Methods of Forming Integrated Assemblies
- Publication number 20250194088
- Publication date Jun 12, 2025
- Micron Technology, Inc.
- Jordan D. Greenlee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Write Driver Boost Circuit for Memory Cells
- Publication number 20250191635
- Publication date Jun 12, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Sanjeev Kumar Jain
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CHIP, LOGIC CHIP, CHIP STACK STRUCTURE, AND MEMORY
- Publication number 20250192110
- Publication date Jun 12, 2025
- CXMT Corporation
- Jiarui ZHANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY SYSTEMS WITH VERTICAL INTEGRATION
- Publication number 20250182796
- Publication date Jun 5, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chieh Lee
- G11 - INFORMATION STORAGE
Information Patent Application
STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY A...
- Publication number 20250174264
- Publication date May 29, 2025
- Micron Technology, Inc.
- Fatma Arzum Simsek-Ege
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Assemblies Comprising Vertically-Stacked Decks
- Publication number 20250174619
- Publication date May 29, 2025
- Micron Technology, Inc.
- Werner Juengling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR DEVICES WITH WRAP-AROUND ARRAYS
- Publication number 20250166682
- Publication date May 22, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
COMMUNICATING DATA WITH STACKED MEMORY DIES
- Publication number 20250165413
- Publication date May 22, 2025
- Lodestar Licensing Group LLC
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20250157520
- Publication date May 15, 2025
- Apple Inc.
- Sukalpa Biswas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION
- Publication number 20250157503
- Publication date May 15, 2025
- Rambus Inc.
- James E. Harris
- G11 - INFORMATION STORAGE
Information Patent Application
Memory System Having Combined High Density, Low Bandwidth and Low D...
- Publication number 20250157521
- Publication date May 15, 2025
- Apple Inc.
- Sukalpa Biswas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FLASH MEMORY STRUCTURE
- Publication number 20250142816
- Publication date May 1, 2025
- UNITED MICROELECTRONICS CORP.
- QIULONG WU
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR FORMING SEMICONDUCTOR DEVICE
- Publication number 20250140295
- Publication date May 1, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Harry-Hak-Lay CHUANG
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Arrays Comprising Vertically-Alternating Tiers of Insulative...
- Publication number 20250140298
- Publication date May 1, 2025
- Micron Technology, Inc.
- Durai Vishak Nirmal Ramaswamy
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DA...
- Publication number 20250131953
- Publication date Apr 24, 2025
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Application
STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY A...
- Publication number 20250118341
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Fatma Arzum Simsek-Ege
- G11 - INFORMATION STORAGE
Information Patent Application
TRAINING AND OPERATIONS WITH A DOUBLE BUFFERED MEMORY TOPOLOGY
- Publication number 20250110897
- Publication date Apr 3, 2025
- Rambus Inc.
- Chi-Ming YEUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES INCLUDING PAD STRUCTURES
- Publication number 20250098159
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Erwin E. Yu
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH A THREE-DIMENSIONAL STACKED MEMORY...
- Publication number 20250098166
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Tomoo HISHIDA
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUSES AND METHODS FOR OPERATIONS IN A SELF-REFRESH STATE
- Publication number 20250095708
- Publication date Mar 20, 2025
- Lodestar Licensing Group LLC
- Perry V. Lea
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROELECTRONIC DEVICES INCLUDING SLOT STRUCTURES AND ADDITIONAL SL...
- Publication number 20250098158
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Shuangqiang Luo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY
- Publication number 20250087270
- Publication date Mar 13, 2025
- KIOXIA Corporation
- Hiroshi MAEJIMA
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTIONS FOR 3D MEMORY
- Publication number 20250087249
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Toru Tanzawa
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BANDWIDTH AGGREGATION USING SIMULTANEOUS ACCESS OF STACKED S...
- Publication number 20250087252
- Publication date Mar 13, 2025
- Rambus Inc.
- Yohan Frans
- G11 - INFORMATION STORAGE

Disposition of storage elements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Semiconductor memory devices and methods of manufacturing thereof

Memory chip

Memory component for a system-on-chip device

3D flash memory module chip and method of fabricating the same

Semiconductor device with buried gate word line drivers

DIMM socket with seating floor to meet both longer length edge cont...

Memory array

Unified micro system with memory integrated circuit and logic integ...

Convolution operation accelerator and convolution operation method

Manufacturing method of forming a semiconductor memory device with...

3D memory circuit

Semiconductor memory device

Communicating data with stacked memory dies

Sub-word line driver placement for memory device

Multi-deck non-volatile memory architecture with reduced terminatio...

Write driver boost circuit for memory cells

Integrated assemblies and methods of forming integrated assemblies

On-die termination of address and command signals

Memory systems with vertical integration

Integrated assemblies comprising vertically-stacked decks with inte...

Apparatuses and methods for organizing data in a memory device

Memory system having combined high density, low bandwidth and low d...

Method and apparatus to perform a read of a column in a memory acce...

Semiconductor device, memory device, and electronic device

Semiconductor memory device with conductive layers separated betwee...

Semiconductor device and method for fabricating the same

TSV check circuit with replica path

Drive circuit and memory device

Integrated assemblies having transistor body regions coupled to car...

Memory array, integrated circuit including the same, and manufactur...

Patents Applicationslast 30 patents

SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD OF THE SEMICON...

On-Die Termination of Address and Command Signals

CONSOLIDATION OF STAIRCASE AREA ETCH AND CMOS CONTACT AREA ETCH IN...

STACKED DRAM DEVICE AND METHOD OF MANUFACTURE

SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME

Sub-Word Line Driver Placement For Memory Device

Integrated Assemblies and Methods of Forming Integrated Assemblies

Write Driver Boost Circuit for Memory Cells

MEMORY CHIP, LOGIC CHIP, CHIP STACK STRUCTURE, AND MEMORY

MEMORY SYSTEMS WITH VERTICAL INTEGRATION

STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY A...

Integrated Assemblies Comprising Vertically-Stacked Decks

SEMICONDUCTOR DEVICES WITH WRAP-AROUND ARRAYS

COMMUNICATING DATA WITH STACKED MEMORY DIES

Memory System Having Combined High Density, Low Bandwidth and Low D...

MEMORY WITH DEFERRED FRACTIONAL ROW ACTIVATION

Memory System Having Combined High Density, Low Bandwidth and Low D...

FLASH MEMORY STRUCTURE

METHOD FOR FORMING SEMICONDUCTOR DEVICE

Memory Arrays Comprising Vertically-Alternating Tiers of Insulative...

MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DA...

STRUCTURES FOR WORD LINE MULTIPLEXING IN THREE-DIMENSIONAL MEMORY A...

TRAINING AND OPERATIONS WITH A DOUBLE BUFFERED MEMORY TOPOLOGY

MEMORY DEVICES INCLUDING PAD STRUCTURES

SEMICONDUCTOR MEMORY DEVICE WITH A THREE-DIMENSIONAL STACKED MEMORY...

APPARATUSES AND METHODS FOR OPERATIONS IN A SELF-REFRESH STATE

MICROELECTRONIC DEVICES INCLUDING SLOT STRUCTURES AND ADDITIONAL SL...

THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY

INTERCONNECTIONS FOR 3D MEMORY

MEMORY BANDWIDTH AGGREGATION USING SIMULTANEOUS ACCESS OF STACKED S...