for input/output signals

Industry

CPC
H03K19/17744

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K19/00Logic circuits

Current Industry

H03K19/17744for input/output signals

Industries

Patents Grantslast 30 patents

Information Patent Grant
Chained programmable delay elements
- Patent number 12,101,092
- Issue date Sep 24, 2024
- EFINIX, INC.
- Marcel Gort
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Anti-aging clock source multiplexing
- Patent number 12,095,459
- Issue date Sep 17, 2024
- QUALCOMM Incorporated
- Kevin Bowles
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor device
- Patent number 12,095,461
- Issue date Sep 17, 2024
- Renesas Electronics Corporation
- Daisuke Moriyama
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Control device and input-output interface unit
- Patent number 12,057,833
- Issue date Aug 6, 2024
- Yazaki Corporation
- Sadaharu Okuda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Application specific integrated circuit accelerators
- Patent number 12,057,834
- Issue date Aug 6, 2024
- Google LLC
- Michial Allen Gunter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel-to-serial conversion circuit, parallel-to-serial conversio...
- Patent number 12,047,069
- Issue date Jul 23, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Keqin Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Fused memory and arithmetic circuit
- Patent number 12,034,446
- Issue date Jul 9, 2024
- Achronix Semiconductor Corporation
- Daniel Pugh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic drive based on multichip package using interconnection bridge
- Patent number 12,027,491
- Issue date Jul 2, 2024
- iCometrue Company Ltd.
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-die FPGA implementing built-in analog circuit using active si...
- Patent number 12,009,307
- Issue date Jun 11, 2024
- WUXI ESIONTECH CO., LTD.
- Yueer Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asynchronous consensus circuit with stacked linear or paraelectric...
- Patent number 11,979,148
- Issue date May 7, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input signal shaping for a programmable logic array
- Patent number 11,979,153
- Issue date May 7, 2024
- STMicroelectronics (Rousset) SAS
- Jean-Francois Link
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatuses, systems, and methods for memory initiated calibration
- Patent number 11,979,147
- Issue date May 7, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuits having memory with flexible input-output circuits
- Patent number 11,979,152
- Issue date May 7, 2024
- Intel Corporation
- Chang Kian Tan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuration bit using RRAM
- Patent number 11,973,500
- Issue date Apr 30, 2024
- Crossbar, Inc.
- Sang Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Digitally controlled unified receiver for multi-rank system
- Patent number 11,973,501
- Issue date Apr 30, 2024
- NVIDIA Corp.
- Jiwang Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Field-programmable gate array device
- Patent number 11,955,972
- Issue date Apr 9, 2024
- Epinovatech AB
- Martin Andreas Olsson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic block with multiple types of programmable arrays...
- Patent number 11,942,935
- Issue date Mar 26, 2024
- STMicroelectronics (Rousset) SAS
- Mark Wallis
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pulse-generator-based bias-level sensors for reciprocal quantum logic
- Patent number 11,942,937
- Issue date Mar 26, 2024
- Northrop Grumman Systems Corporation
- Charles Ryan Wallace
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Superconducting field-programmable gate array
- Patent number 11,936,380
- Issue date Mar 19, 2024
- PSIQUANTUM CORP.
- Faraz Najafi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process of routing tile-to-tile interconnects of an FPGA, and metho...
- Patent number 11,916,551
- Issue date Feb 27, 2024
- Flex Logix Technologies, Inc.
- Yongning Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Layout designs of integrated circuits having backside routing tracks
- Patent number 11,908,852
- Issue date Feb 20, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd
- Wei-An Lai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory system
- Patent number 11,901,038
- Issue date Feb 13, 2024
- Kioxia Corporation
- Akinori Bito
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rapid data transfer sensor arrays
- Patent number 11,894,844
- Issue date Feb 6, 2024
- ALLEGRO MICROSYSTEMS, LLC
- Matthew Hein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Output buffer for a swappable single conductor interface
- Patent number 11,894,840
- Issue date Feb 6, 2024
- pSemi Corporation
- Robert Mark Englekirk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques to reduce the effect of pad asymmetry and signal routing...
- Patent number 11,881,861
- Issue date Jan 23, 2024
- Infineon Technologies AG
- Sunanda Manjunath
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for providing a serializer and deserializer (...
- Patent number 11,874,792
- Issue date Jan 16, 2024
- Gowin Semiconductor Corporation
- Grant Thomas Jennings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory emulation
- Patent number 11,874,768
- Issue date Jan 16, 2024
- Xilinx, Inc.
- Daniel Steger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous validity tree circuit using multi-function threshold g...
- Patent number 11,863,184
- Issue date Jan 2, 2024
- Kepler Computing Inc.
- Amrita Mathuriya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Communication system and layout method of communication system
- Patent number 11,855,634
- Issue date Dec 26, 2023
- Yazaki Corporation
- Masashi Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wake-up circuit and wake-up method
- Patent number 11,848,669
- Issue date Dec 19, 2023
- ZTE Corporation
- Qian Yang
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS
- Publication number 20240348253
- Publication date Oct 17, 2024
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Enhanced Adaptive Logic Circuitry with Improved Function Coverage a...
- Publication number 20240348252
- Publication date Oct 17, 2024
- Jeffrey Chromczak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT
- Publication number 20240313781
- Publication date Sep 19, 2024
- Xilinx, Inc.
- Brian C. GAIDE
- G01 - MEASURING TESTING
Information Patent Application
LOGIC DRIVE BASED ON MULTICHIP PACKAGE USING INTERCONNECTION BRIDGE
- Publication number 20240266322
- Publication date Aug 8, 2024
- iCometrue Company Ltd.
- Mou-Shiung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INPUT SIGNAL SHAPING FOR A PROGRAMMABLE LOGIC ARRAY
- Publication number 20240267050
- Publication date Aug 8, 2024
- STMicroelectronics (Rousset) SAS
- Jean-Francois LINK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR CONFIGURING PROGRAMMABLE ANALOG BLOCK
- Publication number 20240250684
- Publication date Jul 25, 2024
- CYPRESS SEMICONDUCTOR CORPORATION
- Nidhin MULANGATTIL SUDHAKARAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FIELD-PROGRAMMABLE GATE ARRAY DEVICE
- Publication number 20240250686
- Publication date Jul 25, 2024
- Epinovatech AB
- Martin Andreas Olsson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FUSED MEMORY AND ARITHMETIC CIRCUIT
- Publication number 20240235556
- Publication date Jul 11, 2024
- Achronix Semiconductor Corporation
- Daniel Pugh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM
- Publication number 20240235557
- Publication date Jul 11, 2024
- NVIDIA Corp.
- Jiwang Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Superconducting Field-Programmable Gate Array
- Publication number 20240204784
- Publication date Jun 20, 2024
- PsiQuantum Corp.
- Faraz Najafi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE STREAM SWITCHES AND FUNCTIONAL SAFETY CIRCUITS IN INTE...
- Publication number 20240195418
- Publication date Jun 13, 2024
- Xilinx, Inc.
- Karl Henrik Goran Bilski
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE WIRING SYSTEM FOR RECONFIGURABLE DEVICES
- Publication number 20240187000
- Publication date Jun 6, 2024
- ABU DHABI UNIVERSITY
- Mohammad Abdelfatah Mahmoud Alkhedher
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LAYOUT DESIGNS OF INTEGRATED CIRCUITS HAVING BACKSIDE ROUTING TRACKS
- Publication number 20240178214
- Publication date May 30, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Wei-An LAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PROGRAMMABLE LOGIC BLOCK WITH MULTIPLE TYPES OF PROGRAMMABLE ARRAYS...
- Publication number 20240178842
- Publication date May 30, 2024
- STMicroelectronics (Rousset) SAS
- Mark WALLIS
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mixed Signal Device with a Plurality of Digital Cells
- Publication number 20240154614
- Publication date May 9, 2024
- ZetaGig Inc.
- Sandeep Kumar Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS AND APPARATUS FOR PROVIDING A SERIALIZER AND DESERIALIZER (...
- Publication number 20240152484
- Publication date May 9, 2024
- Gowin Semiconductor Corporation
- Grant Thomas Jennings
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR MEMORY INITIATED CALIBRATION
- Publication number 20240063794
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RAPID DATA TRANSFER SENSOR ARRAYS
- Publication number 20240039538
- Publication date Feb 1, 2024
- ALLEGRO MICROSYSTEMS, LLC
- Matthew Hein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE LOGIC BLOCK WITH MULTIPLE TYPES OF PROGRAMMABLE ARRAYS...
- Publication number 20240014819
- Publication date Jan 11, 2024
- STMicroelectronics (Rousset) SAS
- Mark WALLIS
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ANTI-AGING CLOCK SOURCE MULTIPLEXING
- Publication number 20230396253
- Publication date Dec 7, 2023
- QUALCOMM Incorporated
- Kevin BOWLES
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CHAINED PROGRAMMABLE DELAY ELEMENTS
- Publication number 20230378947
- Publication date Nov 23, 2023
- EFINIX, INC.
- Marcel Gort
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PULSE-GENERATOR-BASED BIAS-LEVEL SENSORS FOR RECIPROCAL QUANTUM LOGIC
- Publication number 20230361776
- Publication date Nov 9, 2023
- Northrop Grumman Systems Corporation
- DANIEL RYAN WALLACE
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INPUT SIGNAL SHAPING FOR A PROGRAMMABLE LOGIC ARRAY
- Publication number 20230353154
- Publication date Nov 2, 2023
- STMicroelectronics (Rousset) SAS
- Jean-Francois LINK
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM
- Publication number 20230353155
- Publication date Nov 2, 2023
- NVIDIA Corp.
- Jiwang Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SECTIONAL CONFIGURATION FOR PROGRAMMABLE LOGIC DEVICES
- Publication number 20230353156
- Publication date Nov 2, 2023
- QuickLogic Corporation
- Ket Chong YAP
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Output Buffer for a Swappable Single Conductor Interface
- Publication number 20230318598
- Publication date Oct 5, 2023
- pSemi Corporation
- Robert Mark Englekirk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20230306173
- Publication date Sep 28, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Superconducting Field-Programmable Gate Array
- Publication number 20230283281
- Publication date Sep 7, 2023
- PsiQuantum Corp.
- Faraz Najafi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mixed Signal Device with a Plurality of Digital Cells
- Publication number 20230261656
- Publication date Aug 17, 2023
- Sandeep Kumar Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNIQUES TO REDUCE THE EFFECT OF PAD ASYMMETRY AND SIGNAL ROUTING...
- Publication number 20230238949
- Publication date Jul 27, 2023
- INFINEON TECHNOLOGIES AG
- Sunanda Manjunath
- H03 - BASIC ELECTRONIC CIRCUITRY

for input/output signals

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Chained programmable delay elements

Anti-aging clock source multiplexing

Semiconductor device

Control device and input-output interface unit

Application specific integrated circuit accelerators

Parallel-to-serial conversion circuit, parallel-to-serial conversio...

Fused memory and arithmetic circuit

Logic drive based on multichip package using interconnection bridge

Multi-die FPGA implementing built-in analog circuit using active si...

Asynchronous consensus circuit with stacked linear or paraelectric...

Input signal shaping for a programmable logic array

Apparatuses, systems, and methods for memory initiated calibration

Integrated circuits having memory with flexible input-output circuits

Configuration bit using RRAM

Digitally controlled unified receiver for multi-rank system

Field-programmable gate array device

Programmable logic block with multiple types of programmable arrays...

Pulse-generator-based bias-level sensors for reciprocal quantum logic

Superconducting field-programmable gate array

Process of routing tile-to-tile interconnects of an FPGA, and metho...

Layout designs of integrated circuits having backside routing tracks

Memory system

Rapid data transfer sensor arrays

Output buffer for a swappable single conductor interface

Techniques to reduce the effect of pad asymmetry and signal routing...

Methods and apparatus for providing a serializer and deserializer (...

Flash memory emulation

Asynchronous validity tree circuit using multi-function threshold g...

Communication system and layout method of communication system

Wake-up circuit and wake-up method

Patents Applicationslast 30 patents

MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS

Enhanced Adaptive Logic Circuitry with Improved Function Coverage a...

PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT

LOGIC DRIVE BASED ON MULTICHIP PACKAGE USING INTERCONNECTION BRIDGE

INPUT SIGNAL SHAPING FOR A PROGRAMMABLE LOGIC ARRAY

SYSTEM AND METHOD FOR CONFIGURING PROGRAMMABLE ANALOG BLOCK

FIELD-PROGRAMMABLE GATE ARRAY DEVICE

FUSED MEMORY AND ARITHMETIC CIRCUIT

DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM

Superconducting Field-Programmable Gate Array

PROGRAMMABLE STREAM SWITCHES AND FUNCTIONAL SAFETY CIRCUITS IN INTE...

PROGRAMMABLE WIRING SYSTEM FOR RECONFIGURABLE DEVICES

LAYOUT DESIGNS OF INTEGRATED CIRCUITS HAVING BACKSIDE ROUTING TRACKS

PROGRAMMABLE LOGIC BLOCK WITH MULTIPLE TYPES OF PROGRAMMABLE ARRAYS...

Mixed Signal Device with a Plurality of Digital Cells

METHODS AND APPARATUS FOR PROVIDING A SERIALIZER AND DESERIALIZER (...

APPARATUSES, SYSTEMS, AND METHODS FOR MEMORY INITIATED CALIBRATION

RAPID DATA TRANSFER SENSOR ARRAYS

PROGRAMMABLE LOGIC BLOCK WITH MULTIPLE TYPES OF PROGRAMMABLE ARRAYS...

ANTI-AGING CLOCK SOURCE MULTIPLEXING

CHAINED PROGRAMMABLE DELAY ELEMENTS

PULSE-GENERATOR-BASED BIAS-LEVEL SENSORS FOR RECIPROCAL QUANTUM LOGIC

INPUT SIGNAL SHAPING FOR A PROGRAMMABLE LOGIC ARRAY

DIGITALLY CONTROLLED UNIFIED RECEIVER FOR MULTI-RANK SYSTEM

SECTIONAL CONFIGURATION FOR PROGRAMMABLE LOGIC DEVICES

Output Buffer for a Swappable Single Conductor Interface

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

Superconducting Field-Programmable Gate Array

Mixed Signal Device with a Plurality of Digital Cells

TECHNIQUES TO REDUCE THE EFFECT OF PAD ASYMMETRY AND SIGNAL ROUTING...