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CPC
H03K19/17796

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K19/00Logic circuits

Current Industry

H03K19/17796for physical disposition of blocks

Industries

Patents Grantslast 30 patents

Information Patent Grant
Embedded network on chip accessible to programmable logic fabric of...
- Patent number 12,063,037
- Issue date Aug 13, 2024
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-die FPGA implementing built-in analog circuit using active si...
- Patent number 12,009,307
- Issue date Jun 11, 2024
- WUXI ESIONTECH CO., LTD.
- Yueer Shan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of routing tile-to-tile interconnects of an FPGA, and metho...
- Patent number 11,916,551
- Issue date Feb 27, 2024
- Flex Logix Technologies, Inc.
- Yongning Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 11,714,941
- Issue date Aug 1, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 11,700,002
- Issue date Jul 11, 2023
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit device with separate die for programmable fabric...
- Patent number 11,632,112
- Issue date Apr 18, 2023
- Intel Corporation
- Ravi Prakash Gutala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic drive based on standardized commodity programmable logic semi...
- Patent number 11,545,477
- Issue date Jan 3, 2023
- iCometrue Company Ltd.
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of driving semiconductor device
- Patent number 11,356,097
- Issue date Jun 7, 2022
- Semiconductor Energy Laboratory Co., Ltd.
- Yasuhiko Takemura
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FPGA with reconfigurable threshold logic gates for improved perform...
- Patent number 11,356,100
- Issue date Jun 7, 2022
- Arizona Board of Regents on behalf of Arizona State University
- Sarma Vrudhula
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 11,342,918
- Issue date May 24, 2022
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data processing engine array architecture with memory tiles
- Patent number 11,336,287
- Issue date May 17, 2022
- Xilinx, Inc.
- Javier Cabezas Rodriguez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data processing engine array architecture with memory tiles
- Patent number 11,296,707
- Issue date Apr 5, 2022
- Xilinx, Inc.
- Javier Cabezas Rodriguez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Embedded network on chip accessible to programmable logic fabric of...
- Patent number 11,296,706
- Issue date Apr 5, 2022
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Bridged integrated circuits
- Patent number 11,283,451
- Issue date Mar 22, 2022
- Google LLC
- Jonathan Ross
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process of routing tile-to-tile interconnects of an FPGA, and metho...
- Patent number 11,277,135
- Issue date Mar 15, 2022
- Flex Logix Technologies, Inc.
- Yongning Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
FPGA chip with distributed multifunctional layer structure
- Patent number 11,211,933
- Issue date Dec 28, 2021
- HERCULES MICROELECTRONICS CO., LTD.
- Chengli Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 11,206,024
- Issue date Dec 21, 2021
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for routing data across regions of an integrate...
- Patent number 11,115,026
- Issue date Sep 7, 2021
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 11,080,449
- Issue date Aug 3, 2021
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable circuit and the method for using the same
- Patent number 11,018,671
- Issue date May 25, 2021
- NEC Corporation
- Xu Bai
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Logic drive based on standardized commodity programmable logic semi...
- Patent number 10,957,679
- Issue date Mar 23, 2021
- iCometrue Company Ltd.
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for programing DDR compatible open architecture resistive c...
- Patent number 10,937,498
- Issue date Mar 2, 2021
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Bridged integrated circuits
- Patent number 10,886,923
- Issue date Jan 5, 2021
- Google LLC
- Jonathan Ross
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process of routing tile-to-tile interconnects of an FPGA, and metho...
- Patent number 10,855,284
- Issue date Dec 1, 2020
- Flex Logix Technologies, Inc.
- Yongning Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Network-on-chip (NOC) with flexible data width
- Patent number 10,790,827
- Issue date Sep 29, 2020
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock architecture in heterogeneous system-in-package
- Patent number 10,770,443
- Issue date Sep 8, 2020
- Intel Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Resistive change element arrays using a reference line
- Patent number 10,762,961
- Issue date Sep 1, 2020
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Apparatus and methods for merging post-write read and select gate m...
- Patent number 10,699,776
- Issue date Jun 30, 2020
- Western Digital Technologies, Inc.
- Lior Avital
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 10,642,946
- Issue date May 5, 2020
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bridged integrated circuits
- Patent number 10,637,478
- Issue date Apr 28, 2020
- Jonathan Ross
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS
- Publication number 20240348253
- Publication date Oct 17, 2024
- Atul Maheshwari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT
- Publication number 20240313781
- Publication date Sep 19, 2024
- Xilinx, Inc.
- Brian C. GAIDE
- G01 - MEASURING TESTING
Information Patent Application
Network-on-Chip (NOC) with Flexible Data Width
- Publication number 20230370068
- Publication date Nov 16, 2023
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20230306173
- Publication date Sep 28, 2023
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Device with Separate Die for Programmable Fabric...
- Publication number 20230253965
- Publication date Aug 10, 2023
- Intel Corporation
- Ravi Prakash Gutala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC DRIVE BASED ON STANDARDIZED COMMODITY PROGRAMMABLE LOGIC SEMI...
- Publication number 20230139263
- Publication date May 4, 2023
- iCometrue Company Ltd.
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-DIE FPGA IMPLEMENTING BUILT-IN ANALOG CIRCUIT USING ACTIVE SI...
- Publication number 20220344268
- Publication date Oct 27, 2022
- WUXI ESIONTECH CO., LTD.
- Yueer SHAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SYSTEMS AND METHODS FOR MODULAR DISAGGREGATED INTEGRATED CIRCUIT SY...
- Publication number 20220337251
- Publication date Oct 20, 2022
- Ankireddy Nalamalpu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF...
- Publication number 20220294454
- Publication date Sep 15, 2022
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20220198115
- Publication date Jun 23, 2022
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Process of Routing Tile-to-Tile Interconnects of an FPGA, and Metho...
- Publication number 20220173738
- Publication date Jun 2, 2022
- Flex Logix Technologies, Inc.
- Yongning Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NETWORK-ON-CHIP (NOC) WITH FLEXIBLE DATA WIDTH
- Publication number 20220116044
- Publication date Apr 14, 2022
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Three-Dimensional Stacked Programmable Logic Fabric and Processor D...
- Publication number 20220014202
- Publication date Jan 13, 2022
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FPGA CHIP WITH DISTRIBUTED MULTIFUNCTIONAL LAYER STRUCTURE
- Publication number 20210234545
- Publication date Jul 29, 2021
- HERCULES MICROELECTRONICS CO., LTD.
- Chengli LIU
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC DRIVE BASED ON STANDARDIZED COMMODITY PROGRAMMABLE LOGIC SEMI...
- Publication number 20210167057
- Publication date Jun 3, 2021
- iCometrue Company Ltd.
- Jin-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process of Routing Tile-to-Tile Interconnects of an FPGA, and Metho...
- Publication number 20210083674
- Publication date Mar 18, 2021
- Flex Logix Technologies, Inc.
- Yongning Liu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FPGA WITH RECONFIGURABLE THRESHOLD LOGIC GATES FOR IMPROVED PERFORM...
- Publication number 20210013886
- Publication date Jan 14, 2021
- Arizona Board of Regents on behalf of Arizona State University
- Sarma Vrudhula
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP (NOC) WITH FLEXIBLE DATA WIDTH
- Publication number 20210013887
- Publication date Jan 14, 2021
- Intel Corporation
- Sharath Raghava
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS FOR PROGRAMING DDR COMPATIBLE OPEN ARCHITECTURE RESISTIVE C...
- Publication number 20200395071
- Publication date Dec 17, 2020
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE
- Publication number 20200365463
- Publication date Nov 19, 2020
- MonolithIC 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE
- Publication number 20200335399
- Publication date Oct 22, 2020
- MonolithIC 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME
- Publication number 20200295764
- Publication date Sep 17, 2020
- NEC Corporation
- Xu BAI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20200226313
- Publication date Jul 16, 2020
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR MERGING POST-WRITE READ AND SELECT GATE M...
- Publication number 20200194061
- Publication date Jun 18, 2020
- Western Digital Technologies, Inc.
- Lior Avital
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR ROUTING DATA ACROSS REGIONS OF AN INTEGRATE...
- Publication number 20200153438
- Publication date May 14, 2020
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CLOCK ARCHITECTURE IN HETEROGENEOUS SYSTEM-IN-PACKAGE
- Publication number 20200105732
- Publication date Apr 2, 2020
- Intel Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Resistive Change Element Arrays Using a Reference Line
- Publication number 20190341107
- Publication date Nov 7, 2019
- Nantero, Inc.
- Claude L. Bertin
- B82 - NANO-TECHNOLOGY
Information Patent Application
Clock Distribution and Generation Architecture for Logic Tiles of a...
- Publication number 20190334526
- Publication date Oct 31, 2019
- Flex Logix Technologies, Inc.
- Cheng C. Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHODS TO PRODUCE A 3D SEMICONDUCTOR MEMORY DEVICE AND SYSTEM
- Publication number 20190164834
- Publication date May 30, 2019
- MonolithIC 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR ROUTING DATA ACROSS REGIONS OF AN INTEGRATE...
- Publication number 20190165789
- Publication date May 30, 2019
- Intel Corporation
- Sean R. Atsatt
- H03 - BASIC ELECTRONIC CIRCUITRY

for physical disposition of blocks

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Embedded network on chip accessible to programmable logic fabric of...

Multi-die FPGA implementing built-in analog circuit using active si...

Process of routing tile-to-tile interconnects of an FPGA, and metho...

Modular periphery tile for integrated circuit device

Network-on-chip (NOC) with flexible data width

Integrated circuit device with separate die for programmable fabric...

Logic drive based on standardized commodity programmable logic semi...

Semiconductor device and method of driving semiconductor device

FPGA with reconfigurable threshold logic gates for improved perform...

Network-on-chip (NOC) with flexible data width

Data processing engine array architecture with memory tiles

Data processing engine array architecture with memory tiles

Embedded network on chip accessible to programmable logic fabric of...

Bridged integrated circuits

Process of routing tile-to-tile interconnects of an FPGA, and metho...

FPGA chip with distributed multifunctional layer structure

Network-on-chip (NOC) with flexible data width

Systems and methods for routing data across regions of an integrate...

Modular periphery tile for integrated circuit device

Reconfigurable circuit and the method for using the same

Logic drive based on standardized commodity programmable logic semi...

Methods for programing DDR compatible open architecture resistive c...

Bridged integrated circuits

Process of routing tile-to-tile interconnects of an FPGA, and metho...

Network-on-chip (NOC) with flexible data width

Clock architecture in heterogeneous system-in-package

Resistive change element arrays using a reference line

Apparatus and methods for merging post-write read and select gate m...

Modular periphery tile for integrated circuit device

Bridged integrated circuits

Patents Applicationslast 30 patents

MODULAR FABRIC ARCHITECTURE IN FPGA PRODUCTS

PROGRAMMABLE LOGIC FABRIC AS DIE TO DIE INTERCONNECT

Network-on-Chip (NOC) with Flexible Data Width

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

Integrated Circuit Device with Separate Die for Programmable Fabric...

LOGIC DRIVE BASED ON STANDARDIZED COMMODITY PROGRAMMABLE LOGIC SEMI...

MULTI-DIE FPGA IMPLEMENTING BUILT-IN ANALOG CIRCUIT USING ACTIVE SI...

SYSTEMS AND METHODS FOR MODULAR DISAGGREGATED INTEGRATED CIRCUIT SY...

EMBEDDED NETWORK ON CHIP ACCESSIBLE TO PROGRAMMABLE LOGIC FABRIC OF...

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

Process of Routing Tile-to-Tile Interconnects of an FPGA, and Metho...

NETWORK-ON-CHIP (NOC) WITH FLEXIBLE DATA WIDTH

Three-Dimensional Stacked Programmable Logic Fabric and Processor D...

FPGA CHIP WITH DISTRIBUTED MULTIFUNCTIONAL LAYER STRUCTURE

LOGIC DRIVE BASED ON STANDARDIZED COMMODITY PROGRAMMABLE LOGIC SEMI...

Process of Routing Tile-to-Tile Interconnects of an FPGA, and Metho...

FPGA WITH RECONFIGURABLE THRESHOLD LOGIC GATES FOR IMPROVED PERFORM...

NETWORK-ON-CHIP (NOC) WITH FLEXIBLE DATA WIDTH

METHODS FOR PROGRAMING DDR COMPATIBLE OPEN ARCHITECTURE RESISTIVE C...

3D SEMICONDUCTOR DEVICE AND STRUCTURE

3D SEMICONDUCTOR DEVICE AND STRUCTURE

RECONFIGURABLE CIRCUIT AND THE METHOD FOR USING THE SAME

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

APPARATUS AND METHODS FOR MERGING POST-WRITE READ AND SELECT GATE M...

SYSTEMS AND METHODS FOR ROUTING DATA ACROSS REGIONS OF AN INTEGRATE...

CLOCK ARCHITECTURE IN HETEROGENEOUS SYSTEM-IN-PACKAGE

Resistive Change Element Arrays Using a Reference Line

Clock Distribution and Generation Architecture for Logic Tiles of a...

METHODS TO PRODUCE A 3D SEMICONDUCTOR MEMORY DEVICE AND SYSTEM

SYSTEMS AND METHODS FOR ROUTING DATA ACROSS REGIONS OF AN INTEGRATE...