Globally asynchronous, locally synchronous

Industry

CPC
G06F15/7825

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F15/00Digital computers in general Data processing equipment in general

Current Industry

G06F15/7825Globally asynchronous, locally synchronous

Industries

Patents Grantslast 30 patents

Information Patent Grant
System and method for synthesis of connectivity to an interconnect...
- Patent number 12,289,384
- Issue date Apr 29, 2025
- ARTERIS, INC.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing a partial reconfiguration (PR) bitstream to a cloud servi...
- Patent number 12,287,909
- Issue date Apr 29, 2025
- Intel Corporation
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Execution unit sharing between processing cores in a cluster of a s...
- Patent number 12,282,447
- Issue date Apr 22, 2025
- QUALCOMM Incorporated
- Hithesh Hassan Lepaksha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Symbiotic network on layers
- Patent number 12,283,572
- Issue date Apr 22, 2025
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Javier A. DeLaCruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system having a chip configured for memory attachment and...
- Patent number 12,273,268
- Issue date Apr 8, 2025
- Graphcore Limited
- Simon Christian Knowles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation framework for ultra-low power CGRAS
- Patent number 12,271,671
- Issue date Apr 8, 2025
- Carnegie Mellon University
- Brandon Lucia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
End-to-end transaction integrity through standard interconnect
- Patent number 12,261,691
- Issue date Mar 25, 2025
- NXP B.V.
- Loic Leconte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for processing convolutions on crossbar-based neu...
- Patent number 12,254,395
- Issue date Mar 18, 2025
- Hewlett Packard Enterprise Development LP
- Glaucimar Da Silva Aguiar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Debug trace microsectors
- Patent number 12,248,021
- Issue date Mar 11, 2025
- Altera Corporation
- Sean R. Atsatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-chip atomic transaction engine
- Patent number 12,229,422
- Issue date Feb 18, 2025
- Oracle International Corporation
- Rishabh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple system-on-chip arrangement for vehicle computing systems
- Patent number 12,229,079
- Issue date Feb 18, 2025
- MERCEDES-BENZ GROUP AG
- Francois Piednoel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Connectivity in coarse grained reconfigurable architecture
- Patent number 12,222,893
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Overlay layer hardware unit for network of processor cores
- Patent number 12,210,478
- Issue date Jan 28, 2025
- Tenstorrent Inc.
- Ivan Matosevic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-threaded, self-scheduling reconfigurable computing fabric
- Patent number 12,182,048
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Kernel mapping to nodes in compute fabric
- Patent number 12,174,760
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Gongyu Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of ethernet packets at a programmable integrated circuit
- Patent number 12,174,782
- Issue date Dec 24, 2024
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism to control order of tasks execution in a system-on-chip (...
- Patent number 12,166,643
- Issue date Dec 10, 2024
- ARTERIS, INC.
- Kurt Michael Shuler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Micro-network-on-chip and microsector infrastructure
- Patent number 12,164,462
- Issue date Dec 10, 2024
- Altera Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modular periphery tile for integrated circuit device
- Patent number 12,153,866
- Issue date Nov 26, 2024
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Highly optimized network-on-chip design at large scale
- Patent number 12,143,302
- Issue date Nov 12, 2024
- XSIGHT LABS LTD.
- Gil Moran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Networks on chip (NOC) for many-core neural network accelerator
- Patent number 12,117,961
- Issue date Oct 15, 2024
- MOFFETT INTERNATIONAL CO., LIMITED
- Xiaoqian Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic network-on-chip throttling
- Patent number 12,113,712
- Issue date Oct 8, 2024
- Advanced Micro Devices, Inc.
- Narendra Kamat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Relocatable FPGA modules
- Patent number 12,093,623
- Issue date Sep 17, 2024
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical networks on chip (NoC) for neural network accelerator
- Patent number 12,072,834
- Issue date Aug 27, 2024
- Moffett International Co., Limited
- Xiaoqian Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Broadcast remote sealing for scalable trusted execution environment...
- Patent number 12,050,722
- Issue date Jul 30, 2024
- Intel Corporation
- Steffen Schulz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Broadcast adapters in a network-on-chip
- Patent number 12,038,866
- Issue date Jul 16, 2024
- ARTERIS, INC.
- Syed Ijlal Ali Shah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for implementing an intelligence processing com...
- Patent number 12,013,807
- Issue date Jun 18, 2024
- Mythic, Inc.
- David Fick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect system
- Patent number 12,001,375
- Issue date Jun 4, 2024
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Weilin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transmission method and electronic chip of the manycore type
- Patent number 12,001,360
- Issue date Jun 4, 2024
- SAFRAN ELECTRONICS & DEFENSE
- Louis-Théophile Thirion
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable network-on-chip for high-bandwidth memory
- Patent number 11,995,028
- Issue date May 28, 2024
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR GENERATION OF NETWORKS-ON-CHIP (NoCs)
- Publication number 20250117355
- Publication date Apr 10, 2025
- Arteris, Inc
- Amir CHARIF
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD TO CONTROL TASKS EXECUTION IN A SYSTEM-ON-CHIP (S...
- Publication number 20250106119
- Publication date Mar 27, 2025
- Arteris, Inc
- Kurt Michael SHULER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTION UNIT SHARING BETWEEN PROCESSING CORES IN A CLUSTER OF A S...
- Publication number 20250103545
- Publication date Mar 27, 2025
- QUALCOMM Incorporated
- Hithesh Hassan LEPAKSHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
KERNEL MAPPING TO NODES IN COMPUTE FABRIC
- Publication number 20250094365
- Publication date Mar 20, 2025
- Micron Technology, Inc.
- Gongyu Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism To Improve The Reliability Of Sideband In Chiplets
- Publication number 20250086136
- Publication date Mar 13, 2025
- QUALCOMM Incorporated
- Ravindranath DODDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE
- Publication number 20250077753
- Publication date Mar 6, 2025
- Altera Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK-ON-CHIP ARCHITECTURE WITH DESTINATION VIRTUALIZATION
- Publication number 20250068583
- Publication date Feb 27, 2025
- Xilinx, Inc.
- Krishnan SRINIVASAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT
- Publication number 20250068584
- Publication date Feb 27, 2025
- Achronix Semiconductor Corporation
- Kent Orthner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER OPTIMIZED ARCHITECTURE FOR LARGE LANGUAGE MODEL-BASED APPLICA...
- Publication number 20250068838
- Publication date Feb 27, 2025
- QUALCOMM Incorporated
- Suyash RANJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE
- Publication number 20250036591
- Publication date Jan 30, 2025
- Intel Corporation
- Ilya K. Ganusov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORKS ON CHIP (NOC) FOR MANY-CORE NEURAL NETWORK ACCELERATOR
- Publication number 20250028673
- Publication date Jan 23, 2025
- MOFFETT INTERNATIONAL CO., LIMITED
- Xiaoqian ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR TRANSACTION BROADCAST IN A NETWORK ON CHIP
- Publication number 20240378174
- Publication date Nov 14, 2024
- Arteris, Inc
- Syed Ijlal Ali SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE SYSTEM-ON-CHIP ARRANGEMENT FOR VEHICLE COMPUTING SYSTEMS
- Publication number 20240378172
- Publication date Nov 14, 2024
- MERCEDES-BENZ GROUP AG
- Francois Piednoel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Relocatable FPGA Modules
- Publication number 20240370618
- Publication date Nov 7, 2024
- Achronix Semiconductor Corporation
- Michael Riepe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE LINK WIDTH IN TWO DIRECTIONS FOR MAIN BAND CHIP MODULE CON...
- Publication number 20240354279
- Publication date Oct 24, 2024
- QUALCOMM Incorporated
- Ravindranath DODDI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL NETWORKS ON CHIP (NOC) FOR NEURAL NETWORK ACCELERATOR
- Publication number 20240338339
- Publication date Oct 10, 2024
- MOFFETT INTERNATIONAL CO., LIMITED
- Xiaoqian ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORKS ON CHIP (NOC) FOR MANY-CORE NEURAL NETWORK ACCELERATOR
- Publication number 20240338338
- Publication date Oct 10, 2024
- MOFFETT INTERNATIONAL CO., LIMITED
- Xiaoqian ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REQUEST ALLOCATION METHOD FOR VIRTUAL CHANNEL, AND RELATED APPARATUS
- Publication number 20240330235
- Publication date Oct 3, 2024
- Suzhou MetaBrain Intelligent Technology Co., Ltd
- Huilin ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPLEMENTING AN INTELLIGENCE PROCESSING COM...
- Publication number 20240303217
- Publication date Sep 12, 2024
- Mythic, Inc.
- David Fick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable Network-on-Chip for High-Bandwidth Memory
- Publication number 20240296140
- Publication date Sep 5, 2024
- Intel Corporation
- Chee Hak Teh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECT FOR DIRECT MEMORY ACCESS CONTROLLERS
- Publication number 20240256478
- Publication date Aug 1, 2024
- Microsoft Technology Licensing, LLC
- Ruihua PENG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREMENTAL TOPOLOGY MODIFICATION OF A NETWORK-ON-CHIP
- Publication number 20240259274
- Publication date Aug 1, 2024
- Arteris, Inc
- Benoit De LESCURE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Symbiotic Network On Layers
- Publication number 20240250071
- Publication date Jul 25, 2024
- ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
- Javier A. DeLaCruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR CHIPLET SYNCHRONIZATION
- Publication number 20240202047
- Publication date Jun 20, 2024
- ADVANCED MICRO DEVICES, INC.
- Joseph L. Greathouse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
On-Chip Atomic Transaction Engine
- Publication number 20240111441
- Publication date Apr 4, 2024
- Oracle International Corporation
- Rishabh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-SCHEDULING THREADS IN A PROGRAMMABLE ATOMIC UNIT
- Publication number 20240086200
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Tony Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE
- Publication number 20240086355
- Publication date Mar 14, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATOR ARCHITECTURE ON A PROGRAMMABLE PLATFORM
- Publication number 20240078211
- Publication date Mar 7, 2024
- Altera Corporation
- David Shippy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
END-TO-END TRANSACTION INTEGRITY THROUGH STANDARD INTERCONNECT
- Publication number 20240070018
- Publication date Feb 29, 2024
- NXP B.V.
- Loic Leconte
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF DEBUGGING NETWORK-ON-CHIP
- Publication number 20240070039
- Publication date Feb 29, 2024
- SKYECHIP SDN BHD
- Yu Ying ONG
- G06 - COMPUTING CALCULATING COUNTING

Globally asynchronous, locally synchronous

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

System and method for synthesis of connectivity to an interconnect...

Providing a partial reconfiguration (PR) bitstream to a cloud servi...

Execution unit sharing between processing cores in a cluster of a s...

Symbiotic network on layers

Computer system having a chip configured for memory attachment and...

Generation framework for ultra-low power CGRAS

End-to-end transaction integrity through standard interconnect

System and method for processing convolutions on crossbar-based neu...

Debug trace microsectors

On-chip atomic transaction engine

Multiple system-on-chip arrangement for vehicle computing systems

Connectivity in coarse grained reconfigurable architecture

Overlay layer hardware unit for network of processor cores

Multi-threaded, self-scheduling reconfigurable computing fabric

Kernel mapping to nodes in compute fabric

Processing of ethernet packets at a programmable integrated circuit

Mechanism to control order of tasks execution in a system-on-chip (...

Micro-network-on-chip and microsector infrastructure

Modular periphery tile for integrated circuit device

Highly optimized network-on-chip design at large scale

Networks on chip (NOC) for many-core neural network accelerator

Dynamic network-on-chip throttling

Relocatable FPGA modules

Hierarchical networks on chip (NoC) for neural network accelerator

Broadcast remote sealing for scalable trusted execution environment...

Broadcast adapters in a network-on-chip

Systems and methods for implementing an intelligence processing com...

Interconnect system

Data transmission method and electronic chip of the manycore type

Scalable network-on-chip for high-bandwidth memory

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR GENERATION OF NETWORKS-ON-CHIP (NoCs)

SYSTEM AND METHOD TO CONTROL TASKS EXECUTION IN A SYSTEM-ON-CHIP (S...

EXECUTION UNIT SHARING BETWEEN PROCESSING CORES IN A CLUSTER OF A S...

KERNEL MAPPING TO NODES IN COMPUTE FABRIC

Mechanism To Improve The Reliability Of Sideband In Chiplets

MODULAR PERIPHERY TILE FOR INTEGRATED CIRCUIT DEVICE

NETWORK-ON-CHIP ARCHITECTURE WITH DESTINATION VIRTUALIZATION

PROCESSING OF ETHERNET PACKETS AT A PROGRAMMABLE INTEGRATED CIRCUIT

POWER OPTIMIZED ARCHITECTURE FOR LARGE LANGUAGE MODEL-BASED APPLICA...

MICRO-NETWORK-ON-CHIP AND MICROSECTOR INFRASTRUCTURE

NETWORKS ON CHIP (NOC) FOR MANY-CORE NEURAL NETWORK ACCELERATOR

SYSTEM AND METHOD FOR TRANSACTION BROADCAST IN A NETWORK ON CHIP

MULTIPLE SYSTEM-ON-CHIP ARRANGEMENT FOR VEHICLE COMPUTING SYSTEMS

Relocatable FPGA Modules

VARIABLE LINK WIDTH IN TWO DIRECTIONS FOR MAIN BAND CHIP MODULE CON...

HIERARCHICAL NETWORKS ON CHIP (NOC) FOR NEURAL NETWORK ACCELERATOR

NETWORKS ON CHIP (NOC) FOR MANY-CORE NEURAL NETWORK ACCELERATOR

REQUEST ALLOCATION METHOD FOR VIRTUAL CHANNEL, AND RELATED APPARATUS

SYSTEMS AND METHODS FOR IMPLEMENTING AN INTELLIGENCE PROCESSING COM...

Scalable Network-on-Chip for High-Bandwidth Memory

INTERCONNECT FOR DIRECT MEMORY ACCESS CONTROLLERS

INCREMENTAL TOPOLOGY MODIFICATION OF A NETWORK-ON-CHIP

Symbiotic Network On Layers

SYSTEMS AND METHODS FOR CHIPLET SYNCHRONIZATION

On-Chip Atomic Transaction Engine

SELF-SCHEDULING THREADS IN A PROGRAMMABLE ATOMIC UNIT

CONNECTIVITY IN COARSE GRAINED RECONFIGURABLE ARCHITECTURE

ACCELERATOR ARCHITECTURE ON A PROGRAMMABLE PLATFORM

END-TO-END TRANSACTION INTEGRITY THROUGH STANDARD INTERCONNECT

METHOD OF DEBUGGING NETWORK-ON-CHIP