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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

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G06F2212/1021Hit rate improvement

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Patents Grantslast 30 patents

Information Patent Grant
Information processing system and memory system
- Patent number 12,210,458
- Issue date Jan 28, 2025
- Kioxia Corporation
- Tomoya Suzuki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-stalling, non-blocking translation lookaside buffer invalidation
- Patent number 12,210,459
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data cache region prefetcher
- Patent number 12,204,459
- Issue date Jan 21, 2025
- Advanced Micro Devices, Inc.
- Donald W. McCauley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache support for indirect loads and indirect stores in graph appli...
- Patent number 12,204,901
- Issue date Jan 21, 2025
- Intel Corporation
- Robert Pawlowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware coherence signaling protocol
- Patent number 12,197,331
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully pipelined read-modify-write support
- Patent number 12,189,540
- Issue date Jan 7, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for allocation in a victim cache system
- Patent number 12,182,038
- Issue date Dec 31, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for adjusting data storage and computer device
- Patent number 12,174,740
- Issue date Dec 24, 2024
- Shanghai Bilibili Technology Co., Ltd.
- Sheng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache data provided based on data availability
- Patent number 12,164,433
- Issue date Dec 10, 2024
- Microsoft Technology Licensing, LLC
- Ahmed Abdelsalam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for data caching
- Patent number 12,153,522
- Issue date Nov 26, 2024
- Samsung Electronics Co., Ltd.
- Yangxu Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for maintaining cache coherency between nodes i...
- Patent number 12,147,344
- Issue date Nov 19, 2024
- Veritas Technologies LLC
- Bhushan Jagtap
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shared virtual memory to manage data coher...
- Patent number 12,147,346
- Issue date Nov 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation support for a virtual cache
- Patent number 12,141,076
- Issue date Nov 12, 2024
- International Business Machines Corporation
- Markus Helms
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherence shared state suppression
- Patent number 12,135,646
- Issue date Nov 5, 2024
- Texas Instruments Incorporated
- Abhijeet Ashok Chachad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses, methods, and systems for dynamic bypassing of last lev...
- Patent number 12,130,739
- Issue date Oct 29, 2024
- Intel Corporation
- Ayan Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for sharing a cache line between non-contiguous m...
- Patent number 12,130,736
- Issue date Oct 29, 2024
- Next Silicon Ltd
- Dan Shechter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bypass destaging of decrement reference count operations with delta...
- Patent number 12,117,938
- Issue date Oct 15, 2024
- Dell Products L.P.
- Jenny Derzhavetz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache aware searching based on files of buckets
- Patent number 12,105,632
- Issue date Oct 1, 2024
- Splunk Inc.
- Ledion Bitincka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for software multicore optimization
- Patent number 12,099,446
- Issue date Sep 24, 2024
- C SQUARED IP HOLDINGS LLC
- Kevin David Howard
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCE SHARED STATE SUPPRESSION
- Publication number 20250013569
- Publication date Jan 9, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR SOFTWARE MULTICORE OPTIMIZATION
- Publication number 20250013571
- Publication date Jan 9, 2025
- C Squared IP Holdings LLC
- Kevin David HOWARD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, DEVICE, AND COMPUTER PROGRAM PRODUCT FOR STORING DATA
- Publication number 20240394184
- Publication date Nov 28, 2024
- Dell Products L.P.
- Hailan Dong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TAG UPDATE BUS FOR UPDATED COHERENCE STATE
- Publication number 20240345956
- Publication date Oct 17, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Abhijeet Ashok CHACHAD
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adaptive Configuration of Address Translation Cache
- Publication number 20240345963
- Publication date Oct 17, 2024
- MELLANOX TECHNOLOGIES, LTD.
- Gal Shalom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STREAMING ENGINE WITH ERROR DETECTION, CORRECTION AND RESTART
- Publication number 20240320094
- Publication date Sep 26, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING A TRANSIENT CACHE LIST AND PROLONGED CACHE LIST TO MANAGE TRA...
- Publication number 20240303206
- Publication date Sep 12, 2024
- International Business Machines Corporation
- Beth Ann PETERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR ADAPTIVE CACHE CONFIGURATION
- Publication number 20240303204
- Publication date Sep 12, 2024
- Samsung Electronics Co., Ltd.
- Sahand Salamat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING DEMOTION HINTS WITH TRACK ACCESS REQUESTS TO CAUSE A STOR...
- Publication number 20240303197
- Publication date Sep 12, 2024
- International Business Machines Corporation
- Beth Ann PETERSON
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNIFORM CACHE SYSTEM FOR FAST DATA ACCESS
- Publication number 20240289276
- Publication date Aug 29, 2024
- ADVANCED MICRO DEVICES, INC.
- Dazheng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROACTIVE CACHING OF DATA FOR ACCELERATOR CORES IN A STORAGE DEVICE
- Publication number 20240273027
- Publication date Aug 15, 2024
- Western Digital Technologies, Inc.
- Ramanathan Muthiah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable Parallel Processing
- Publication number 20240264975
- Publication date Aug 8, 2024
- XDL Technologies Inc.
- Yuan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING RETIRED PAGES HISTORY FOR INSTRUCTION TRANSLATION LOOKASIDE B...
- Publication number 20240264949
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- Ajay Kumar Rathee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TILE-BASED GRAPHICS
- Publication number 20240249377
- Publication date Jul 25, 2024
- Imagination Technologies Limited
- Steven Fishwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING METHOD AND DEVICE WITH DATA SHARING
- Publication number 20240232091
- Publication date Jul 11, 2024
- Samsung Electronics Co., Ltd.
- Yoojin KIM
- G06 - COMPUTING CALCULATING COUNTING

Hit rate improvement

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Information processing system and memory system

Systems and methods for improving cache efficiency and utilization

Aggressive write flush scheme for a victim cache

Non-stalling, non-blocking translation lookaside buffer invalidation

Data cache region prefetcher

Graphics processor data access and sharing

Cache support for indirect loads and indirect stores in graph appli...

Methods and apparatus to reduce bank pressure using aggressive writ...

Hardware coherence signaling protocol

Fully pipelined read-modify-write support

Multi-tile memory management

Methods and apparatus for allocation in a victim cache system

Method and apparatus for adjusting data storage and computer device

Cache data provided based on data availability

Method and device for data caching

Cache structure and utilization

Methods and systems for maintaining cache coherency between nodes i...

Methods and apparatus for read-modify-write support in multi-banked...

Method and apparatus for shared virtual memory to manage data coher...

Victim cache with dynamic allocation of entries

Systolic disaggregation within a matrix accelerator architecture

Atomic operations and histogram operations in a cache pipeline

Translation support for a virtual cache

Cache coherence shared state suppression

Apparatuses, methods, and systems for dynamic bypassing of last lev...

System and method for sharing a cache line between non-contiguous m...

Bypass destaging of decrement reference count operations with delta...

Methods and apparatus for eviction in dual datapath victim cache sy...

Cache aware searching based on files of buckets

Method and system for software multicore optimization

Patents Applicationslast 30 patents

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

CACHE COHERENCE SHARED STATE SUPPRESSION

METHOD AND SYSTEM FOR SOFTWARE MULTICORE OPTIMIZATION

MULTI-TILE MEMORY MANAGEMENT

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

METHOD, DEVICE, AND COMPUTER PROGRAM PRODUCT FOR STORING DATA

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

TAG UPDATE BUS FOR UPDATED COHERENCE STATE

Adaptive Configuration of Address Translation Cache

STREAMING ENGINE WITH ERROR DETECTION, CORRECTION AND RESTART

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

USING A TRANSIENT CACHE LIST AND PROLONGED CACHE LIST TO MANAGE TRA...

SYSTEMS AND METHODS FOR ADAPTIVE CACHE CONFIGURATION

PROVIDING DEMOTION HINTS WITH TRACK ACCESS REQUESTS TO CAUSE A STOR...

VICTIM CACHE WITH WRITE MISS MERGING

UNIFORM CACHE SYSTEM FOR FAST DATA ACCESS

PROACTIVE CACHING OF DATA FOR ACCELERATOR CORES IN A STORAGE DEVICE

Reconfigurable Parallel Processing

USING RETIRED PAGES HISTORY FOR INSTRUCTION TRANSLATION LOOKASIDE B...

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

TILE-BASED GRAPHICS

COMPUTING METHOD AND DEVICE WITH DATA SHARING