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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

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G06F7/505in bit-parallel fashion

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Patents Grantslast 30 patents

Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 12,182,064
- Issue date Dec 31, 2024
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory bit-serial addition system
- Patent number 12,118,328
- Issue date Oct 15, 2024
- Purdue Research Foundation
- Mustafa Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-layer reconfigurable static random access memory (SRAM) based...
- Patent number 12,112,797
- Issue date Oct 8, 2024
- Shanghai Jiao Tong University
- Xinfei Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Surface code computations using Auto-CCZ quantum states
- Patent number 11,966,814
- Issue date Apr 23, 2024
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for performing a stable and short latency sort...
- Patent number 11,900,498
- Issue date Feb 13, 2024
- Intel Corporation
- Saikat Mandal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sum address memory decoded dual-read select register file
- Patent number 11,862,289
- Issue date Jan 2, 2024
- International Business Machines Corporation
- Geoffrey Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of manufacturing semiconductor devices by etching active fi...
- Patent number 11,830,775
- Issue date Nov 28, 2023
- Samsung Electronics Co., Ltd.
- Min-Chul Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 11,762,803
- Issue date Sep 19, 2023
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Binary parallel adder and multiplier
- Patent number 11,740,871
- Issue date Aug 29, 2023
- Micron Technology, Inc.
- Fabio Indelicato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining sums using logic circuits
- Patent number 11,714,448
- Issue date Aug 1, 2023
- SUPERFASTFPGA LIMITED
- Paul James Metzgen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Oblivious carry runway registers for performing piecewise additions
- Patent number 11,710,063
- Issue date Jul 25, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logarithmic addition-accumulator circuitry, processing pipeline inc...
- Patent number 11,693,625
- Issue date Jul 4, 2023
- Flex Logix Technologies, Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory bit-serial addition system
- Patent number 11,669,302
- Issue date Jun 6, 2023
- Purdue Research Foundation
- Mustafa Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder circuitry for very large integers
- Patent number 11,662,979
- Issue date May 30, 2023
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-memory arithmetic processors
- Patent number 11,662,980
- Issue date May 30, 2023
- FlashSilicon Incorporation
- Lee Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interlayer exchange coupled adder
- Patent number 11,641,783
- Issue date May 2, 2023
- Ceremorphic, Inc.
- Venkat Mattela
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Measurement based uncomputation for quantum circuit optimization
- Patent number 11,636,373
- Issue date Apr 25, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel hybrid adder
- Patent number 11,620,106
- Issue date Apr 4, 2023
- The United States of America as represented by the Secretary of the Navy
- Makia S Powell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quantum circuit optimization using windowed quantum arithmetic
- Patent number 11,586,969
- Issue date Feb 21, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Surface code computations using auto-CCZ quantum states
- Patent number 11,568,298
- Issue date Jan 31, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Measurement based uncomputation for quantum circuit optimization
- Patent number 11,531,923
- Issue date Dec 20, 2022
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Oblivious carry runway registers for performing piecewise additions
- Patent number 11,475,348
- Issue date Oct 18, 2022
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integer and characters prefix based methodologies combined with par...
- Patent number 11,354,093
- Issue date Jun 7, 2022
- Khalid Omar Thabit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefix network-directed addition
- Patent number 11,334,318
- Issue date May 17, 2022
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast binary counters based on symmetric stacking and methods for same
- Patent number 11,321,049
- Issue date May 3, 2022
- The Research Foundation for The State University of New York
- Christopher Fritz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple accumulate busses in a systolic array
- Patent number 11,308,027
- Issue date Apr 19, 2022
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple busses interleaved in a systolic array
- Patent number 11,308,026
- Issue date Apr 19, 2022
- Amazon Technologies, Inc.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real time configuration of multiple true random number generator so...
- Patent number 11,301,215
- Issue date Apr 12, 2022
- International Business Machines Corporation
- Kirk David Lamb
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of manufacturing semiconductor devices by etching active fi...
- Patent number 11,302,585
- Issue date Apr 12, 2022
- Samsung Electronics Co., Ltd.
- Min-Chul Sun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder-subtractor circuit and method of controlling adder-subtractor...
- Patent number 11,294,630
- Issue date Apr 5, 2022
- Fujitsu Limited
- Shiro Kamoshida
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
- Publication number 20240338582
- Publication date Oct 10, 2024
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...
- Publication number 20240265487
- Publication date Aug 8, 2024
- Intel Corporation
- Saikat MANDAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONSTANT MODULO VIA RECIRCULANT REDUCTION
- Publication number 20240134604
- Publication date Apr 25, 2024
- Intel Corporation
- Theo Drane
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES BY ETCHING ACTIVE FI...
- Publication number 20240047275
- Publication date Feb 8, 2024
- Samsung Electronics Co., Ltd.
- Min-Chul SUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
- Publication number 20240020560
- Publication date Jan 18, 2024
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY
- Publication number 20230385233
- Publication date Nov 30, 2023
- AMAZON TECHNOLOGIES, INC.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY BIT-SERIAL ADDITION SYSTEM
- Publication number 20230305804
- Publication date Sep 28, 2023
- Purdue Research Foundation
- Mustafa Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QUANTUM CIRCUIT OPTIMIZATION USING WINDOWED QUANTUM ARITHMETIC
- Publication number 20230281497
- Publication date Sep 7, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEASUREMENT BASED UNCOMPUTATION FOR QUANTUM CIRCUIT OPTIMIZATION
- Publication number 20230267354
- Publication date Aug 24, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Embedded Arithmetic Blocks for Structured ASICs
- Publication number 20230195416
- Publication date Jun 22, 2023
- Intel Corporation
- Sankaran Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL COMPUTATION OF A LOGIC OPERATION, INCREMENT, AND DECREMENT...
- Publication number 20230195417
- Publication date Jun 22, 2023
- Intel Corporation
- Mrinmay DUTTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SURFACE CODE COMPUTATIONS USING AUTO-CCZ QUANTUM STATES
- Publication number 20230177373
- Publication date Jun 8, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS
- Publication number 20230162073
- Publication date May 25, 2023
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUM ADDRESS MEMORY DECODED DUAL-READ SELECT REGISTER FILE
- Publication number 20220399046
- Publication date Dec 15, 2022
- International Business Machines Corporation
- Geoffrey Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY
- Publication number 20220350775
- Publication date Nov 3, 2022
- AMAZON TECHNOLOGIES, INC.
- Thomas A Volpe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER CELL AND INTEGRATED CIRCUIT INCLUDING THE SAME
- Publication number 20220253283
- Publication date Aug 11, 2022
- Samsung Electronics Co., Ltd.
- Jaewoo Seo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEASUREMENT BASED UNCOMPUTATION FOR QUANTUM CIRCUIT OPTIMIZATION
- Publication number 20220237493
- Publication date Jul 28, 2022
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR VECTOR HORIZONTAL ADD OF SIGNED/UNSIGNED W...
- Publication number 20220236991
- Publication date Jul 28, 2022
- Intel Corporation
- Venkateswara MADDURI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES BY ETCHING ACTIVE FI...
- Publication number 20220208616
- Publication date Jun 30, 2022
- Samsung Electronics Co., Ltd.
- Min-Chul SUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interlayer Exchange Coupled Adder
- Publication number 20220181545
- Publication date Jun 9, 2022
- Redpine Signals, Inc.
- Venkat MATTELA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device and Method of Handling a Modular Multiplication
- Publication number 20220121424
- Publication date Apr 21, 2022
- PUFsecurity Corporation
- Wen-Ching Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Measurement Based Uncomputation for Quantum Circuit Optimization
- Publication number 20210295197
- Publication date Sep 23, 2021
- Google LLC
- Craig Gidney
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...
- Publication number 20210295463
- Publication date Sep 23, 2021
- Intel Corporation
- Saikat MANDAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REAL TIME CONFIGURATION OF MULTIPLE TRUE RANDOM NUMBER GENERATOR SO...
- Publication number 20210232367
- Publication date Jul 29, 2021
- International Business Machines Corporation
- KIRK DAVID LAMB
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logarithmic Addition-Accumulator Circuitry, Processing Pipeline inc...
- Publication number 20210173617
- Publication date Jun 10, 2021
- Flex Logix Technologies, Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BINARY PARALLEL ADDER AND MULTIPLIER
- Publication number 20210141605
- Publication date May 13, 2021
- Micron Technology, Inc.
- Fabio Indelicato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONSTRUCTION METHOD of MSD PARALLEL ADDER BASED ON TERNARY LOGIC OP...
- Publication number 20210132906
- Publication date May 6, 2021
- SHANGHAI UNIVERSITY
- Yi JIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-MEMORY BIT-SERIAL ADDITION SYSTEM
- Publication number 20210117156
- Publication date Apr 22, 2021
- Purdue Research Foundation
- Mustafa Ali
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER CIRCUITRY FOR VERY LARGE INTEGERS
- Publication number 20210075425
- Publication date Mar 11, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST BINARY COUNTERS BASED ON SYMMETRIC STACKING AND METHODS FOR SAME
- Publication number 20200394017
- Publication date Dec 17, 2020
- The Research Foundation for The State University of New York
- Christopher FRITZ
- G06 - COMPUTING CALCULATING COUNTING

in bit-parallel fashion

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multiple accumulate busses in a systolic array

In-memory bit-serial addition system

Cross-layer reconfigurable static random access memory (SRAM) based...

Surface code computations using Auto-CCZ quantum states

Apparatus and method for performing a stable and short latency sort...

Sum address memory decoded dual-read select register file

Methods of manufacturing semiconductor devices by etching active fi...

Multiple accumulate busses in a systolic array

Binary parallel adder and multiplier

Determining sums using logic circuits

Oblivious carry runway registers for performing piecewise additions

Logarithmic addition-accumulator circuitry, processing pipeline inc...

In-memory bit-serial addition system

Adder circuitry for very large integers

In-memory arithmetic processors

Interlayer exchange coupled adder

Measurement based uncomputation for quantum circuit optimization

Parallel hybrid adder

Quantum circuit optimization using windowed quantum arithmetic

Surface code computations using auto-CCZ quantum states

Measurement based uncomputation for quantum circuit optimization

Oblivious carry runway registers for performing piecewise additions

Integer and characters prefix based methodologies combined with par...

Prefix network-directed addition

Fast binary counters based on symmetric stacking and methods for same

Multiple accumulate busses in a systolic array

Multiple busses interleaved in a systolic array

Real time configuration of multiple true random number generator so...

Methods of manufacturing semiconductor devices by etching active fi...

Adder-subtractor circuit and method of controlling adder-subtractor...

Patents Applicationslast 30 patents

OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS

APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...

CONSTANT MODULO VIA RECIRCULANT REDUCTION

METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES BY ETCHING ACTIVE FI...

OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS

MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY

IN-MEMORY BIT-SERIAL ADDITION SYSTEM

QUANTUM CIRCUIT OPTIMIZATION USING WINDOWED QUANTUM ARITHMETIC

MEASUREMENT BASED UNCOMPUTATION FOR QUANTUM CIRCUIT OPTIMIZATION

Embedded Arithmetic Blocks for Structured ASICs

PARALLEL COMPUTATION OF A LOGIC OPERATION, INCREMENT, AND DECREMENT...

SURFACE CODE COMPUTATIONS USING AUTO-CCZ QUANTUM STATES

OBLIVIOUS CARRY RUNWAY REGISTERS FOR PERFORMING PIECEWISE ADDITIONS

SUM ADDRESS MEMORY DECODED DUAL-READ SELECT REGISTER FILE

MULTIPLE ACCUMULATE BUSSES IN A SYSTOLIC ARRAY

ADDER CELL AND INTEGRATED CIRCUIT INCLUDING THE SAME

MEASUREMENT BASED UNCOMPUTATION FOR QUANTUM CIRCUIT OPTIMIZATION

APPARATUS AND METHOD FOR VECTOR HORIZONTAL ADD OF SIGNED/UNSIGNED W...

METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES BY ETCHING ACTIVE FI...

Interlayer Exchange Coupled Adder

Device and Method of Handling a Modular Multiplication

Measurement Based Uncomputation for Quantum Circuit Optimization

APPARATUS AND METHOD FOR PERFORMING A STABLE AND SHORT LATENCY SORT...

REAL TIME CONFIGURATION OF MULTIPLE TRUE RANDOM NUMBER GENERATOR SO...

Logarithmic Addition-Accumulator Circuitry, Processing Pipeline inc...

BINARY PARALLEL ADDER AND MULTIPLIER

CONSTRUCTION METHOD of MSD PARALLEL ADDER BASED ON TERNARY LOGIC OP...

IN-MEMORY BIT-SERIAL ADDITION SYSTEM

ADDER CIRCUITRY FOR VERY LARGE INTEGERS

FAST BINARY COUNTERS BASED ON SYMMETRIC STACKING AND METHODS FOR SAME