in I/O circuitry

Industry

CPC
G11C29/022

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C29/00Checking stores for correct operation; Subsequent repair Testing stores during standby or offline operation

Current Industry

G11C29/022in I/O circuitry

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Operating and testing semiconductor devices
- Patent number 12,334,170
- Issue date Jun 17, 2025
- Samsung Electronics Co., Ltd.
- Taewook Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Row access strobe (RAS) clobber and row hammer failure mitigation
- Patent number 12,333,022
- Issue date Jun 17, 2025
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage device for checking a defect of row lines and an opera...
- Patent number 12,322,464
- Issue date Jun 3, 2025
- Samsung Electronics Co., Ltd.
- Kyungduk Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller for a memory device
- Patent number 12,321,190
- Issue date Jun 3, 2025
- Samsung Electronics Co., Ltd.
- Choongeui Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vehicle memory system based on 3D memory and method operating thereof
- Patent number 12,322,463
- Issue date Jun 3, 2025
- Hyundai Motor Company
- Hong Yeol Lim
- G11 - INFORMATION STORAGE
Information Patent Grant
Built-in self-test circuitry
- Patent number 12,315,580
- Issue date May 27, 2025
- Micron Technology, Inc.
- William Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for determining an interface connection status
- Patent number 12,308,080
- Issue date May 20, 2025
- Micron Technology, Inc.
- Melissa I. Uribe
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory and operation method of memory
- Patent number 12,288,594
- Issue date Apr 29, 2025
- SK Hynix Inc.
- Jin Ho Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method of reading a semiconductor m...
- Patent number 12,288,593
- Issue date Apr 29, 2025
- Windbond Electronics Corp.
- Shinya Fujioka
- G11 - INFORMATION STORAGE
Information Patent Grant
Component die validation built-in self-test (VBIST) engine
- Patent number 12,282,064
- Issue date Apr 22, 2025
- Ampere Computing LLC
- Sandeep Brahmadathan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing method, data processing structure and memory
- Patent number 12,277,988
- Issue date Apr 15, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Runjin Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Row access strobe (RAS) clobber and row hammer failures using a det...
- Patent number 12,265,630
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
On-die termination of address and command signals
- Patent number 12,249,399
- Issue date Mar 11, 2025
- RAMBUS INC.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed test of functional memory interface logic in devices
- Patent number 12,243,603
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Devanathan Varadarajan
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system, and read operation method thereof
- Patent number 12,230,342
- Issue date Feb 18, 2025
- Yangtze Memory Technologies Co., Ltd.
- Hongtao Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory system, and operation method of memory device
- Patent number 12,211,581
- Issue date Jan 28, 2025
- Samsung Electronics Co., Ltd.
- Donghun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for testing inaccessible interface circuits i...
- Patent number 12,196,805
- Issue date Jan 14, 2025
- RAMBUS INC.
- Frederick A. Ware
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic random access memory built-in self-test power fail mitigation
- Patent number 12,190,979
- Issue date Jan 7, 2025
- Intel Corporation
- Bill Nale
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data storage apparatus comprising cell section operable as dosimete...
- Patent number 12,183,410
- Issue date Dec 31, 2024
- ams International AG
- Tommaso Vincenzi
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for identifying memory devices of a semicon...
- Patent number 12,184,280
- Issue date Dec 31, 2024
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Block family error avoidance bin scans after memory device power-on
- Patent number 12,183,413
- Issue date Dec 31, 2024
- Micron Technology, Inc.
- Guang Hu
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory timing
- Patent number 12,176,061
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit and operation method and inspection method thereof
- Patent number 12,119,073
- Issue date Oct 15, 2024
- Aspeed Technology Inc.
- Hung-Ming Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient soft decoding of error correction code via extrinsic bit...
- Patent number 12,119,075
- Issue date Oct 15, 2024
- Kioxia Corporation
- Avi Steiner
- G11 - INFORMATION STORAGE
Information Patent Grant
Low-power source-synchronous signaling
- Patent number 12,119,042
- Issue date Oct 15, 2024
- RAMBUS INC.
- Jared L. Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device including error correction device
- Patent number 12,100,466
- Issue date Sep 24, 2024
- SK Hynix Inc.
- Jin Ho Jeong
- G11 - INFORMATION STORAGE
Information Patent Grant
Mediating directed refresh management induced row hammer and row ac...
- Patent number 12,086,270
- Issue date Sep 10, 2024
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of error correction code (ECC) decoding and memory system pe...
- Patent number 12,080,366
- Issue date Sep 3, 2024
- Samsung Electronics Co., Ltd.
- Kangseok Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory including on-die-termination circuit and storage...
- Patent number 12,073,898
- Issue date Aug 27, 2024
- Samsung Electronics Co., Ltd.
- Eun-Ji Kim
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
ENHANCED ERROR CORRECTION CODE FOR ERROR DETECTION AND CORRECTION I...
- Publication number 20250210126
- Publication date Jun 26, 2025
- TetraMem Inc.
- Lei Liu
- G11 - INFORMATION STORAGE
Information Patent Application
FLASH MEMORY AND TESTING METHOD THEREOF
- Publication number 20250191672
- Publication date Jun 12, 2025
- WINBOND ELECTRONICS CORP.
- I-Hsien Tseng
- G11 - INFORMATION STORAGE
Information Patent Application
DETECTING EXTRINSIC BITLINE DEFECTS
- Publication number 20250166718
- Publication date May 22, 2025
- Micron Technology, Inc.
- Tingjun Hu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND OPERATION METHOD OF MEMORY DEVICE
- Publication number 20250157504
- Publication date May 15, 2025
- Samsung Electronics Co., Ltd.
- DONGHUN LEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250149076
- Publication date May 8, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...
- Publication number 20250150081
- Publication date May 8, 2025
- Lodestar Licensing Group LLC
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM, AND READ OPERATION METHOD THEREOF
- Publication number 20250140329
- Publication date May 1, 2025
- Yangtze Memory Technologies Co., Ltd.
- Hongtao Liu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READIN...
- Publication number 20250131969
- Publication date Apr 24, 2025
- SK HYNIX INC.
- Jae Yong SON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...
- Publication number 20250124959
- Publication date Apr 17, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR GRANULAR SINGLE-PASS METADATA ACCESS OP...
- Publication number 20250111887
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- G11 - INFORMATION STORAGE
Information Patent Application
BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON
- Publication number 20250087292
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Guang Hu
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...
- Publication number 20250070782
- Publication date Feb 27, 2025
- Lodestar Licensing Group LLC
- Dean Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW-POWER SOURCE-SYNCHRONOUS SIGNALING
- Publication number 20250069644
- Publication date Feb 27, 2025
- Rambus Inc.
- Jared L. ZERBE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME
- Publication number 20250054562
- Publication date Feb 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Yu-Wei LIN
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT SOFT DECODING OF ERROR CORRECTION CODE VIA EXTRINSIC BIT...
- Publication number 20250037784
- Publication date Jan 30, 2025
- KIOXIA Corporation
- Avi Steiner
- G11 - INFORMATION STORAGE
Information Patent Application
On-Die Termination of Address and Command Signals
- Publication number 20250037746
- Publication date Jan 30, 2025
- Rambus Inc.
- Ian Shaeffer
- G11 - INFORMATION STORAGE
Information Patent Application
EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY
- Publication number 20250006285
- Publication date Jan 2, 2025
- Western Digital Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM, METHOD OF OPERATING MEMORY SYSTEM, AND COMPUTER-READ...
- Publication number 20240428873
- Publication date Dec 26, 2024
- Yangtze Memory Technologies Co., Ltd.
- Lingling MA
- G11 - INFORMATION STORAGE
Information Patent Application
BUFFER CIRCUIT WITH ADAPTIVE REPAIR CAPABILITY
- Publication number 20240420793
- Publication date Dec 19, 2024
- Rambus Inc.
- Scott C. Best
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF ERROR CORRECTION CODE (ECC) DECODING AND MEMORY SYSTEM PE...
- Publication number 20240395352
- Publication date Nov 28, 2024
- Samsung Electronics Co., Ltd.
- Kangseok Lee
- G11 - INFORMATION STORAGE
Information Patent Application
ERROR HANDLING DURING A MEMORY COMPACTION PROCESS
- Publication number 20240386984
- Publication date Nov 21, 2024
- Western Digital Technologies, Inc.
- Ravi Dutt Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAME
- Publication number 20240379184
- Publication date Nov 14, 2024
- WINBOND ELECTRONICS CORP.
- Yoshihisa MICHIOKA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND READING METHOD THEREOF
- Publication number 20240371455
- Publication date Nov 7, 2024
- Macronix International Co., Ltd.
- You-Liang CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND READING METHOD THEREOF
- Publication number 20240371456
- Publication date Nov 7, 2024
- Macronix International Co., Ltd.
- You-Liang CHOU
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY INCLUDING ON-DIE-TERMINATION CIRCUIT AND STORAGE...
- Publication number 20240371457
- Publication date Nov 7, 2024
- Samsung Electronics Co., Ltd.
- Eun-Ji Kim
- G11 - INFORMATION STORAGE
Information Patent Application
DATA TRANSMISSION USING DELAYED TIMING SIGNALS
- Publication number 20240372542
- Publication date Nov 7, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN
- Publication number 20240363187
- Publication date Oct 31, 2024
- STMicroelectronics International N.V.
- Praveen Kumar VERMA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION
- Publication number 20240347128
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Kishore Kumar Muchherla
- G11 - INFORMATION STORAGE
Information Patent Application
FAILSAFE MEMORY CARD ARCHITECTURE USING VOLTAGE DRIVER OUTPUT ENABL...
- Publication number 20240347120
- Publication date Oct 17, 2024
- SANDISK TECHNOLOGIES LLC
- SHIV HARIT MATHUR
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
- Publication number 20240345971
- Publication date Oct 17, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING

in I/O circuitry

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Operating and testing semiconductor devices

Row access strobe (RAS) clobber and row hammer failure mitigation

Data storage device for checking a defect of row lines and an opera...

Memory controller for a memory device

Vehicle memory system based on 3D memory and method operating thereof

Built-in self-test circuitry

Techniques for determining an interface connection status

Memory and operation method of memory

Semiconductor memory device and method of reading a semiconductor m...

Component die validation built-in self-test (VBIST) engine

Data processing method, data processing structure and memory

Row access strobe (RAS) clobber and row hammer failures using a det...

On-die termination of address and command signals

At-speed test of functional memory interface logic in devices

Memory device, memory system, and read operation method thereof

Memory device for supporting command bus training mode and method o...

Memory device, memory system, and operation method of memory device

Methods and apparatus for testing inaccessible interface circuits i...

Dynamic random access memory built-in self-test power fail mitigation

Data storage apparatus comprising cell section operable as dosimete...

Apparatuses and methods for identifying memory devices of a semicon...

Block family error avoidance bin scans after memory device power-on

Programmable memory timing

Integrated circuit and operation method and inspection method thereof

Efficient soft decoding of error correction code via extrinsic bit...

Low-power source-synchronous signaling

Memory device including error correction device

Mediating directed refresh management induced row hammer and row ac...

Method of error correction code (ECC) decoding and memory system pe...

Nonvolatile memory including on-die-termination circuit and storage...

Patents Applicationslast 30 patents

ENHANCED ERROR CORRECTION CODE FOR ERROR DETECTION AND CORRECTION I...

FLASH MEMORY AND TESTING METHOD THEREOF

DETECTING EXTRINSIC BITLINE DEFECTS

MEMORY DEVICE, MEMORY SYSTEM, AND OPERATION METHOD OF MEMORY DEVICE

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...

MEMORY DEVICE, MEMORY SYSTEM, AND READ OPERATION METHOD THEREOF

APPARATUS AND METHOD FOR CHANGING A READ VOLTAGE APPLIED FOR READIN...

MEMORY DEVICE FOR SUPPORTING COMMAND BUS TRAINING MODE AND METHOD O...

APPARATUSES AND METHODS FOR GRANULAR SINGLE-PASS METADATA ACCESS OP...

BLOCK FAMILY ERROR AVOIDANCE BIN SCANS AFTER MEMORY DEVICE POWER-ON

APPARATUSES AND METHODS FOR IDENTIFYING MEMORY DEVICES OF A SEMICON...

LOW-POWER SOURCE-SYNCHRONOUS SIGNALING

INTEGRATED CIRCUIT AND METHOD OF OPERATING SAME

EFFICIENT SOFT DECODING OF ERROR CORRECTION CODE VIA EXTRINSIC BIT...

On-Die Termination of Address and Command Signals

EVOLVING BAD BLOCK DETECTION IN NON-VOLATILE MEMORY

MEMORY SYSTEM, METHOD OF OPERATING MEMORY SYSTEM, AND COMPUTER-READ...

BUFFER CIRCUIT WITH ADAPTIVE REPAIR CAPABILITY

METHOD OF ERROR CORRECTION CODE (ECC) DECODING AND MEMORY SYSTEM PE...

ERROR HANDLING DURING A MEMORY COMPACTION PROCESS

SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF THE SAME

MEMORY DEVICE AND READING METHOD THEREOF

MEMORY DEVICE AND READING METHOD THEREOF

NONVOLATILE MEMORY INCLUDING ON-DIE-TERMINATION CIRCUIT AND STORAGE...

DATA TRANSMISSION USING DELAYED TIMING SIGNALS

AREA SAVING HIGH COVERAGE FAST DIAGNOSIS MEMORY SCAN DESIGN

MEMORY BLOCK PROGRAMMING USING DEFECTIVITY INFORMATION

FAILSAFE MEMORY CARD ARCHITECTURE USING VOLTAGE DRIVER OUTPUT ENABL...

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING