Interleaved addressing

Industry

CPC
G06F12/0607

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F12/00Accessing, addressing or allocating within memory systems or architectures

Current Industry

G06F12/0607Interleaved addressing

Industries

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Multicore shared cache operation engine
- Patent number 12,159,030
- Issue date Dec 3, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data co-location using address hashing for high-performance process...
- Patent number 12,158,842
- Issue date Dec 3, 2024
- Advanced Micro Devices, Inc.
- Benjamin Youngjae Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-uniform memory interleaving processor
- Patent number 12,147,339
- Issue date Nov 19, 2024
- SambaNova Systems, Inc.
- Paul Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for sharing a cache line between non-contiguous m...
- Patent number 12,130,736
- Issue date Oct 29, 2024
- Next Silicon Ltd
- Dan Shechter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level partitioned snoop filter
- Patent number 12,093,177
- Issue date Sep 17, 2024
- ARTERIS, INC.
- Jean-Philippe Loison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating messages with priorities in a storage network
- Patent number 12,086,079
- Issue date Sep 10, 2024
- PURE STORAGE, INC.
- Greg R. Dhuse
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive credit-based replenishment threshold used for transaction...
- Patent number 12,079,471
- Issue date Sep 3, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-uniform memory interleave method
- Patent number 12,079,124
- Issue date Sep 3, 2024
- SambaNova Systems, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 12,007,935
- Issue date Jun 11, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable in memory computing engine, platform, bit cells and la...
- Patent number 12,007,890
- Issue date Jun 11, 2024
- The Trustees of Princeton University
- Naveen Verma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Runtime de-interleave and re-interleave of system memory
- Patent number 12,001,332
- Issue date Jun 4, 2024
- Dell Products L.P.
- Stuart Allen Berke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and SoC including linear address remapping logic
- Patent number 12,001,698
- Issue date Jun 4, 2024
- Samsung Electronics Co., Ltd.
- Dongsik Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined on-package and off-package memory system
- Patent number 12,001,725
- Issue date Jun 4, 2024
- NVIDIA Corporation
- Niladrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management mechanism
- Patent number 11,960,405
- Issue date Apr 16, 2024
- Intel Corporation
- Zack S. Waters
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 11,954,063
- Issue date Apr 9, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic memory reconfiguration
- Patent number 11,954,062
- Issue date Apr 9, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Assistance for hardware prefetch in cache access
- Patent number 11,934,342
- Issue date Mar 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory sub-system for decoding non-power-of-two addressable unit ad...
- Patent number 11,928,055
- Issue date Mar 12, 2024
- Micron Technology, Inc.
- Patrick A. La Fratta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and operating method thereof
- Patent number 11,921,630
- Issue date Mar 5, 2024
- SK Hynix Inc.
- Eu-Joon Byun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layer interleaving in multi-layered memory
- Patent number 11,914,510
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Mikai Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleaved data conversion to change data formats
- Patent number 11,907,118
- Issue date Feb 20, 2024
- Intel Corporation
- Yong Wu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE IN MEMORY COMPUTING ENGINE, PLATFORM, BIT CELLS AND LA...
- Publication number 20240330178
- Publication date Oct 3, 2024
- The Trustees of Princeton University
- Naveen VERMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING VIRTUAL BLOCKS USING PARTIAL GOOD BLOCKS
- Publication number 20240256444
- Publication date Aug 1, 2024
- Micron Technology, Inc.
- Zhongguang Xu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME DE-INTERLEAVE AND RE-INTERLEAVE OF SYSTEM MEMORY
- Publication number 20240211396
- Publication date Jun 27, 2024
- Dell Products L.P.
- Stuart Allen Berke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR DYNAMIC ACCELERATOR SELECTION
- Publication number 20240195605
- Publication date Jun 13, 2024
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage System and Method for Accessing Same
- Publication number 20240193084
- Publication date Jun 13, 2024
- FLC Global, Ltd.
- Sehat Sutardja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS
- Publication number 20240184446
- Publication date Jun 6, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURAL EXTENSIONS FOR MEMORY MIRRORING AT PAGE GRANULARITY O...
- Publication number 20240152281
- Publication date May 9, 2024
- Intel Corporation
- Qiuxu Zhuo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA CO-LOCATION USING ADDRESS HASHING FOR HIGH-PERFORMANCE PROCESS...
- Publication number 20240111672
- Publication date Apr 4, 2024
- Benjamin Youngjae Cho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM WITH THREADED TRANSACTION SUPPORT
- Publication number 20240111423
- Publication date Apr 4, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...
- Publication number 20240086065
- Publication date Mar 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...
- Publication number 20240086357
- Publication date Mar 14, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES
- Publication number 20240086356
- Publication date Mar 14, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERLEAVE CIRCUIT AND COMMUNICATION DEVICE
- Publication number 20240061773
- Publication date Feb 22, 2024
- Kabushiki Kaisha Toshiba
- Yutaro ISHIGAKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLIENT ALLOCATION OF MEMORY ACROSS MEMORY SERVERS
- Publication number 20240037029
- Publication date Feb 1, 2024
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
- Syed Ismail Faizan Barmawer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME DE-INTERLEAVE AND RE-INTERLEAVE OF SYSTEM MEMORY
- Publication number 20240037030
- Publication date Feb 1, 2024
- Dell Products L.P.
- Stuart Allen Berke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE SHARED CACHE OPERATION ENGINE
- Publication number 20230418469
- Publication date Dec 28, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR ALLOCATING RESOURCES ACROSS DATA CENTERS
- Publication number 20230421358
- Publication date Dec 28, 2023
- Intel Corporation
- Anjaneya Reddy CHAGAM REDDY
- B25 - HAND TOOLS PORTABLE POWER-DRIVEN TOOLS MANIPULATORS
Information Patent Application
TECHNOLOGIES FOR MANAGING A FLEXIBLE HOST INTERFACE OF A NETWORK IN...
- Publication number 20230412365
- Publication date Dec 21, 2023
- Intel Corporation
- Thomas E. Willis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MEMORY ACCESS IN A REDUCED POWER STATE
- Publication number 20230400908
- Publication date Dec 14, 2023
- Intel Corporation
- BINATA BHATTACHARYYA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED ON-PACKAGE AND OFF-PACKAGE MEMORY SYSTEM
- Publication number 20230393788
- Publication date Dec 7, 2023
- NVIDIA Corporation
- Nilandrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR SHARING A CACHE LINE BETWEEN NON-CONTIGUOUS M...
- Publication number 20230393979
- Publication date Dec 7, 2023
- Next Silicon Ltd
- Dan SHECHTER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE CACHE FOR COHERENT SYSTEM
- Publication number 20230384931
- Publication date Nov 30, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC REPARTITION OF MEMORY PHYSICAL ADDRESS MAPPING
- Publication number 20230384947
- Publication date Nov 30, 2023
- ADVANCED MICRO DEVICES, INC.
- Joseph L. Greathouse
- G06 - COMPUTING CALCULATING COUNTING

Interleaved addressing

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multicore shared cache operation engine

Data co-location using address hashing for high-performance process...

Cache structure and utilization

Non-uniform memory interleaving processor

Systolic disaggregation within a matrix accelerator architecture

Configurable cache for coherent system

System and method for sharing a cache line between non-contiguous m...

Multi-tile memory management

Compression techniques

Multi-level partitioned snoop filter

Generating messages with priorities in a storage network

Adaptive credit-based replenishment threshold used for transaction...

Graphics processor operation scheduling for deterministic latency

Non-uniform memory interleave method

Cache structure and utilization

Multi-tile architecture for graphics operations

Graphics processors and graphics processing units having dot produc...

Configurable in memory computing engine, platform, bit cells and la...

Runtime de-interleave and re-interleave of system memory

Memory system and SoC including linear address remapping logic

Combined on-package and off-package memory system

Multi-tile memory management for detecting cross tile access provid...

Multi-tile memory management mechanism

Graphics processors and graphics processing units having dot produc...

Dynamic memory reconfiguration

Assistance for hardware prefetch in cache access

Memory sub-system for decoding non-power-of-two addressable unit ad...

Memory system and operating method thereof

Layer interleaving in multi-layered memory

Interleaved data conversion to change data formats

Patents Applicationslast 30 patents

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

CONFIGURABLE IN MEMORY COMPUTING ENGINE, PLATFORM, BIT CELLS AND LA...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

GENERATING VIRTUAL BLOCKS USING PARTIAL GOOD BLOCKS

RUNTIME DE-INTERLEAVE AND RE-INTERLEAVE OF SYSTEM MEMORY

TECHNOLOGIES FOR DYNAMIC ACCELERATOR SELECTION

Storage System and Method for Accessing Same

DYNAMIC MEMORY RECONFIGURATION

MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS

ARCHITECTURAL EXTENSIONS FOR MEMORY MIRRORING AT PAGE GRANULARITY O...

DATA CO-LOCATION USING ADDRESS HASHING FOR HIGH-PERFORMANCE PROCESS...

MEMORY SYSTEM WITH THREADED TRANSACTION SUPPORT

DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...

SYSTEMS AND METHODS FOR UPDATING MEMORY SIDE CACHES IN A MULTI-GPU...

INSTRUCTION BASED CONTROL OF MEMORY ATTRIBUTES

INTERLEAVE CIRCUIT AND COMMUNICATION DEVICE

CLIENT ALLOCATION OF MEMORY ACROSS MEMORY SERVERS

RUNTIME DE-INTERLEAVE AND RE-INTERLEAVE OF SYSTEM MEMORY

MULTICORE SHARED CACHE OPERATION ENGINE

TECHNOLOGIES FOR ALLOCATING RESOURCES ACROSS DATA CENTERS

TECHNOLOGIES FOR MANAGING A FLEXIBLE HOST INTERFACE OF A NETWORK IN...

TECHNIQUES FOR MEMORY ACCESS IN A REDUCED POWER STATE

COMBINED ON-PACKAGE AND OFF-PACKAGE MEMORY SYSTEM

SYSTEM AND METHOD FOR SHARING A CACHE LINE BETWEEN NON-CONTIGUOUS M...

CONFIGURABLE CACHE FOR COHERENT SYSTEM

DYNAMIC REPARTITION OF MEMORY PHYSICAL ADDRESS MAPPING