Less usual number representations

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CPC
G06F2207/3832

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/3832Less usual number representations

Industries

Patents Grantslast 30 patents

Information Patent Grant
Acceleration circuitry
- Patent number 11,714,605
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Vijay S. Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-precision anchored-implicit processing
- Patent number 11,704,092
- Issue date Jul 18, 2023
- ARM Limited
- Neil Burgess
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Acceleration circuitry
- Patent number 11,137,982
- Issue date Oct 5, 2021
- Micron Technology, Inc.
- Vijay S. Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuring floating point operations in a programmable device
- Patent number 8,650,231
- Issue date Feb 11, 2014
- Altera Corporation
- Martin Langhammer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Carry bucket-aware multiplication having bits with most significant...
- Patent number 8,533,246
- Issue date Sep 10, 2013
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Negative two's complement processor for windowing in harmonic analysis
- Patent number 8,099,447
- Issue date Jan 17, 2012
- Earl Eugene Swartzlander, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One step binary summarizer
- Patent number 7,991,820
- Issue date Aug 2, 2011
- Leslie Imre Sohay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two's complement circuit
- Patent number 7,949,695
- Issue date May 24, 2011
- VIA Technologies Inc.
- Shawn Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuring floating point operations in a programmable logic device
- Patent number 7,865,541
- Issue date Jan 4, 2011
- Altera Corporation
- Martin Langhammer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for mapping mathematical finite floating-point nu...
- Patent number 7,860,910
- Issue date Dec 28, 2010
- Robert S. Howard
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Converter circuit for converting 1-redundant representation of an i...
- Patent number 7,461,107
- Issue date Dec 2, 2008
- LSI Corporation
- Mikhail I. Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessors with improved efficiency processing a variant signe...
- Patent number 7,302,597
- Issue date Nov 27, 2007
- AT&T Corp.
- Paul Webster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparce-redundant fixed point arithmetic modules
- Patent number 7,213,043
- Issue date May 1, 2007
- LSI Logic Corporation
- Mikhail I. Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encoding method, and encoding apparatus, and decoding method and de...
- Patent number 6,995,699
- Issue date Feb 7, 2006
- Sony Corporation
- Keisuke Toyama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous parallel arithmetic processor utilizing coefficient po...
- Patent number 6,618,741
- Issue date Sep 9, 2003
- The United States of America as represented by the Secretary of the Army
- Chester C. Carroll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point number data processing means
- Patent number 6,516,332
- Issue date Feb 4, 2003
- Siemens plc
- Robert Carter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous parallel arithmetic processor utilizing coefficient po...
- Patent number 6,513,054
- Issue date Jan 28, 2003
- The United States of America as represented by the Secretary of the Army
- Chester C. Carroll
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leading zero/one anticipator for floating point
- Patent number 6,499,044
- Issue date Dec 24, 2002
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Carry look-ahead for bi-endian adder
- Patent number 6,470,374
- Issue date Oct 22, 2002
- Hewlett-Packard Company
- Daming Jin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for interruption of carry propagation on parti...
- Patent number 6,272,514
- Issue date Aug 7, 2001
- Intrinsity, Inc.
- Anthony M. Petro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for 3-stage 32-bit adder/subtractor
- Patent number 6,269,387
- Issue date Jul 31, 2001
- Intrinsity, Inc.
- Anthony M. Petro
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
2's complement floating-point multiply accumulate unit
- Patent number 5,892,698
- Issue date Apr 6, 1999
- Hewlett-Packard Company
- Samuel D. Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packet processing method and apparatus
- Patent number 5,398,245
- Issue date Mar 14, 1995
- Bay Networks, Inc.
- Edward S. Harriman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system for generating symmetrical range of addresse...
- Patent number 5,386,534
- Issue date Jan 31, 1995
- Motorola, Inc.
- James M. Sibigtroth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer method and apparatus for storing a datum representing a ph...
- Patent number 5,253,193
- Issue date Oct 12, 1993
- Autodesk, Inc.
- John Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder capable of usual addition and reverse carry addition
- Patent number 4,897,808
- Issue date Jan 30, 1990
- Mitsubishi Denki Kabushiki Kaisha
- Shin-ichi Nakagawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed modular arithmetic apparatus having a mask generator and...
- Patent number 4,064,421
- Issue date Dec 20, 1977
- Burroughs Corporation
- Daniel Danko Gajski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3737638
- Patent number 3,737,638
- Issue date Jun 5, 1973
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ACCELERATION CIRCUITRY
- Publication number 20220027129
- Publication date Jan 27, 2022
- Micron Technology, Inc.
- Vijay S. Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATION CIRCUITRY
- Publication number 20200272416
- Publication date Aug 27, 2020
- Micron Technology, Inc.
- Vijay S. Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Negative two's complement processor for windowing in harmonic analysis
- Publication number 20110040816
- Publication date Feb 17, 2011
- Earl Eugene Swartzlander, JR.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CARRY BUCKET-AWARE MULTIPLICATION
- Publication number 20100153830
- Publication date Jun 17, 2010
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessors with improved power efficiency
- Publication number 20100138676
- Publication date Jun 3, 2010
- AT&T CORP.
- Paul Webster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Negative two's complement numbering system
- Publication number 20070214204
- Publication date Sep 13, 2007
- Earl Swartzlander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARCE-REDUNDANT FIXED POINT ARITHMETIC MODULES
- Publication number 20070180014
- Publication date Aug 2, 2007
- LSI Logic Corporation
- Mikhail I. Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for mapping mathematical finite floating-point nu...
- Publication number 20060106909
- Publication date May 18, 2006
- Robert S. Howard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO'S COMPLEMENT CIRCUIT
- Publication number 20060089955
- Publication date Apr 27, 2006
- Shawn Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JOINT ADAPTIVE FIXED-POINT REPRESENTATION AND RELATED ARITHMETIC AN...
- Publication number 20050160122
- Publication date Jul 21, 2005
- Chien-Hua Hsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Microprocessors with improved power efficiency
- Publication number 20050005180
- Publication date Jan 6, 2005
- Paul Webster
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unified multiplier triple-expansion scheme and extra regular compac...
- Publication number 20040172439
- Publication date Sep 2, 2004
- THE RESEARCH FOUNDATION OF STATE UNIVERSITY OF NEW YORK
- Rong Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sparce-redundant fixed point arithmetic modules
- Publication number 20040143619
- Publication date Jul 22, 2004
- Mikhail I. Grinchuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coding method, apparatus, decoding method and apparatus
- Publication number 20040039568
- Publication date Feb 26, 2004
- Keisuke Toyama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asynchronous parallel arithmetic processor utilizing coefficient po...
- Publication number 20030093449
- Publication date May 15, 2003
- Chester C. Carroll
- G06 - COMPUTING CALCULATING COUNTING

Less usual number representations

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Acceleration circuitry

High-precision anchored-implicit processing

Acceleration circuitry

Configuring floating point operations in a programmable device

Carry bucket-aware multiplication having bits with most significant...

Negative two's complement processor for windowing in harmonic analysis

One step binary summarizer

Two's complement circuit

Configuring floating point operations in a programmable logic device

System and method for mapping mathematical finite floating-point nu...

Converter circuit for converting 1-redundant representation of an i...

Microprocessors with improved efficiency processing a variant signe...

Sparce-redundant fixed point arithmetic modules

Encoding method, and encoding apparatus, and decoding method and de...

Asynchronous parallel arithmetic processor utilizing coefficient po...

Floating point number data processing means

Asynchronous parallel arithmetic processor utilizing coefficient po...

Leading zero/one anticipator for floating point

Carry look-ahead for bi-endian adder

Method and apparatus for interruption of carry propagation on parti...

Method and apparatus for 3-stage 32-bit adder/subtractor

2's complement floating-point multiply accumulate unit

Packet processing method and apparatus

Data processing system for generating symmetrical range of addresse...

Computer method and apparatus for storing a datum representing a ph...

Adder capable of usual addition and reverse carry addition

High speed modular arithmetic apparatus having a mask generator and...

3737638

Patents Applicationslast 30 patents

ACCELERATION CIRCUITRY

ACCELERATION CIRCUITRY

Negative two's complement processor for windowing in harmonic analysis

CARRY BUCKET-AWARE MULTIPLICATION

Microprocessors with improved power efficiency

Negative two's complement numbering system

SPARCE-REDUNDANT FIXED POINT ARITHMETIC MODULES

System and method for mapping mathematical finite floating-point nu...

TWO'S COMPLEMENT CIRCUIT

JOINT ADAPTIVE FIXED-POINT REPRESENTATION AND RELATED ARITHMETIC AN...

Microprocessors with improved power efficiency

Unified multiplier triple-expansion scheme and extra regular compac...

Sparce-redundant fixed point arithmetic modules

Coding method, apparatus, decoding method and apparatus

Asynchronous parallel arithmetic processor utilizing coefficient po...