Loop buffering

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G06F9/381

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

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G06F9/381Loop buffering

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Patents Grantslast 30 patents

Information Patent Grant
Systems, methods, and apparatuses for matrix add, subtract, and mul...
- Patent number 12,260,213
- Issue date Mar 25, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerating fetch target queue (FTQ) processing in a processor
- Patent number 12,260,220
- Issue date Mar 25, 2025
- Microsoft Technology Licensing, LLC
- Saransh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregated computing for distributed confidential computing envi...
- Patent number 12,260,263
- Issue date Mar 25, 2025
- Intel Corporation
- Reshma Lal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable toggle point control circuitry for a clustered decode pipe...
- Patent number 12,254,319
- Issue date Mar 18, 2025
- Intel Corporation
- Sundararajan Ramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture for data processing array control
- Patent number 12,248,786
- Issue date Mar 11, 2025
- Xilinx, Inc.
- Xiao Teng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor embedded streaming buffer
- Patent number 12,248,333
- Issue date Mar 11, 2025
- Intel Corporation
- Joseph Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting 8-bit floating point format operands in a computing arch...
- Patent number 12,242,846
- Issue date Mar 4, 2025
- Intel Corporation
- Naveen Mellempudi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessor operation bundling
- Patent number 12,242,855
- Issue date Mar 4, 2025
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-up table initialize
- Patent number 12,242,852
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two address translations from a single table look-aside buffer read
- Patent number 12,235,773
- Issue date Feb 25, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop driven region based frontend translation control for performan...
- Patent number 12,235,791
- Issue date Feb 25, 2025
- Intel Corporation
- Kameswar Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregated computing for distributed confidential computing envi...
- Patent number 12,229,605
- Issue date Feb 18, 2025
- Intel Corporation
- Reshma Lal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of data synchronization barrier instructions
- Patent number 12,229,561
- Issue date Feb 18, 2025
- Apple Inc.
- Madhu Sudan Hari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for dynamic control of a secure mode of operati...
- Patent number 12,223,098
- Issue date Feb 11, 2025
- International Business Machines Corporation
- Debapriya Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating masks from decoded instructions to apply to fetched inst...
- Patent number 12,217,052
- Issue date Feb 4, 2025
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Gaëtan Leplus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for improving cache efficiency and utilization
- Patent number 12,210,477
- Issue date Jan 28, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct swap caching with zero line optimizations
- Patent number 12,204,909
- Issue date Jan 21, 2025
- Microsoft Technology Licensing, LLC
- Ishwar Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor data access and sharing
- Patent number 12,204,487
- Issue date Jan 21, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thread forward progress and/or quality of service
- Patent number 12,204,935
- Issue date Jan 21, 2025
- Advanced Micro Devices, Inc.
- Michael Estlick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with time count based instruction execution and replay
- Patent number 12,190,116
- Issue date Jan 7, 2025
- Simplex Micro, Inc.
- Thang Minh Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,182,062
- Issue date Dec 31, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile load, multiplication and...
- Patent number 12,182,571
- Issue date Dec 31, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessors with bypass optimization, variable grid architecture,...
- Patent number 12,174,785
- Issue date Dec 24, 2024
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregated computing for distributed confidential computing envi...
- Patent number 12,164,973
- Issue date Dec 10, 2024
- Intel Corporation
- Reshma Lal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking streaming engine vector predicates to control processor ex...
- Patent number 12,164,438
- Issue date Dec 10, 2024
- Texas Instruments Incorporated
- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system and method to efficiently update a secure arbitratio...
- Patent number 12,153,665
- Issue date Nov 26, 2024
- Intel Corporation
- Vedvyas Shanbhogue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,153,541
- Issue date Nov 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for tile matrix multiplication an...
- Patent number 12,147,804
- Issue date Nov 19, 2024
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20250103548
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR EMBEDDED STREAMING BUFFER
- Publication number 20250103331
- Publication date Mar 27, 2025
- Intel Corporation
- Joseph Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT SWAP CACHING WITH ZERO LINE OPTIMIZATIONS
- Publication number 20250103339
- Publication date Mar 27, 2025
- Microsoft Technology Licensing, LLC
- Ishwar AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20250103546
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...
- Publication number 20250103510
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20250103547
- Publication date Mar 27, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coprocessors with Bypass Optimization, Variable Grid Architecture,...
- Publication number 20250094381
- Publication date Mar 20, 2025
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING SYSTEM PAGESIZE COMPATIBILITY WORKAROUNDS
- Publication number 20250060966
- Publication date Feb 20, 2025
- ARM Limited
- Dániel Kristóf Kiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO SEQUENCE BRANCH OPERATIONS
- Publication number 20250045052
- Publication date Feb 6, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS BRIDGE, AND ASYNCHRONOUS PROCESSING METHOD
- Publication number 20250028669
- Publication date Jan 23, 2025
- NUVOTON TECHNOLOGY CORPORATION
- Szu-Wei YEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SILENT CACHE LINE EVICTION
- Publication number 20250013575
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRANCH PREDICTION CIRCUITRY
- Publication number 20250013470
- Publication date Jan 9, 2025
- ARM Limited
- Rami Mohammad AL SHEIKH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTO-PREDICATION FOR LOOPS WITH DYNAMICALLY VARYING INTERATION COUNTS
- Publication number 20250004775
- Publication date Jan 2, 2025
- Intel Corporation
- Zeshan Chishti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR REMEDIATING MISALIGNMENT OF A DATA PIPELINE
- Publication number 20250004774
- Publication date Jan 2, 2025
- Dell Products L.P.
- OFIR EZRIELEV
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250004981
- Publication date Jan 2, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD
- Publication number 20250004716
- Publication date Jan 2, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR ADDITION OF PARTIAL PRODUCTS
- Publication number 20250004763
- Publication date Jan 2, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR VECTOR PERMUTATION
- Publication number 20240419606
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT
- Publication number 20240411703
- Publication date Dec 12, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy D. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20240411717
- Publication date Dec 12, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSION TECHNIQUES
- Publication number 20240403259
- Publication date Dec 5, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOK-UP TABLE READ
- Publication number 20240403054
- Publication date Dec 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FETCHING BEYOND PREDICTED-TAKEN BRANCH INSTRUCTIONS IN FETCH BUNDLE...
- Publication number 20240385841
- Publication date Nov 21, 2024
- QUALCOMM Incorporated
- Conrado Blasco
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS
- Publication number 20240378158
- Publication date Nov 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Soujanya Narnur
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RUNTIME CONFIGURABLE MODULAR PROCESSING TILE
- Publication number 20240370267
- Publication date Nov 7, 2024
- ARM Limited
- Nicholas John Cook
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Based Matrix Multiplication
- Publication number 20240354259
- Publication date Oct 24, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SORTING VECTOR ELEMENTS USING A COUNT VALUE
- Publication number 20240354260
- Publication date Oct 24, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Timothy David Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING

Loop buffering

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Systems, methods, and apparatuses for matrix add, subtract, and mul...

Accelerating fetch target queue (FTQ) processing in a processor

Disaggregated computing for distributed confidential computing envi...

Scalable toggle point control circuitry for a clustered decode pipe...

Instruction set architecture for data processing array control

Processor embedded streaming buffer

Supporting 8-bit floating point format operands in a computing arch...

Coprocessor operation bundling

Data initialization techniques

Look-up table initialize

Two address translations from a single table look-aside buffer read

Loop driven region based frontend translation control for performan...

Disaggregated computing for distributed confidential computing envi...

Processing of data synchronization barrier instructions

Systems and methods for dynamic control of a secure mode of operati...

Generating masks from decoded instructions to apply to fetched inst...

Systems and methods for improving cache efficiency and utilization

Direct swap caching with zero line optimizations

Graphics processor data access and sharing

Thread forward progress and/or quality of service

Microprocessor with time count based instruction execution and replay

Multi-tile memory management

Systems, methods, and apparatuses for tile load, multiplication and...

Coprocessors with bypass optimization, variable grid architecture,...

Disaggregated computing for distributed confidential computing envi...

Tracking streaming engine vector predicates to control processor ex...

Device, system and method to efficiently update a secure arbitratio...

Cache structure and utilization

Systems, methods, and apparatuses for tile matrix multiplication an...

Systolic disaggregation within a matrix accelerator architecture

Patents Applicationslast 30 patents

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

PROCESSOR EMBEDDED STREAMING BUFFER

DIRECT SWAP CACHING WITH ZERO LINE OPTIMIZATIONS

CACHE STRUCTURE AND UTILIZATION

TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

Coprocessors with Bypass Optimization, Variable Grid Architecture,...

OPERATING SYSTEM PAGESIZE COMPATIBILITY WORKAROUNDS

METHODS AND APPARATUS TO SEQUENCE BRANCH OPERATIONS

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

ASYNCHRONOUS BRIDGE, AND ASYNCHRONOUS PROCESSING METHOD

SILENT CACHE LINE EVICTION

BRANCH PREDICTION CIRCUITRY

AUTO-PREDICATION FOR LOOPS WITH DYNAMICALLY VARYING INTERATION COUNTS

SYSTEM AND METHOD FOR REMEDIATING MISALIGNMENT OF A DATA PIPELINE

MULTI-TILE MEMORY MANAGEMENT

SYSTEMS, METHODS, AND APPARATUSES FOR TILE LOAD

SYSTEMS, APPARATUSES, AND METHODS FOR ADDITION OF PARTIAL PRODUCTS

METHOD AND APPARATUS FOR VECTOR PERMUTATION

PROCESSOR ARCHITECTURE WITH MEMORY ACCESS CIRCUIT

CACHE STRUCTURE AND UTILIZATION

COMPRESSION TECHNIQUES

LOOK-UP TABLE READ

FETCHING BEYOND PREDICTED-TAKEN BRANCH INSTRUCTIONS IN FETCH BUNDLE...

METHOD AND APPARATUS FOR PERMUTING STREAMED DATA ELEMENTS

RUNTIME CONFIGURABLE MODULAR PROCESSING TILE

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Vector Based Matrix Multiplication

SORTING VECTOR ELEMENTS USING A COUNT VALUE

Multi-tile Memory Management for Detecting Cross Tile Access Provid...