Loop buffering

Industry

CPC
G06F9/381

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F9/00Arrangements for programme control

Current Industry

G06F9/381Loop buffering

Industries

Patents Grantslast 30 patents

Information Patent Grant
Multi-port queueing cache and data processing system including the...
- Patent number 12,321,279
- Issue date Jun 3, 2025
- Samsung Electronics Co., Ltd.
- Heonsoo Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implicit fence for write messages
- Patent number 12,321,310
- Issue date Jun 3, 2025
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit, system, and method for matrix decimation
- Patent number 12,321,747
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Asheesh Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for dot production operations
- Patent number 12,314,717
- Issue date May 27, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-up table write
- Patent number 12,314,720
- Issue date May 27, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stalling issue queue entries until consecutive allocated entries ar...
- Patent number 12,314,718
- Issue date May 27, 2025
- SiFive, Inc.
- Josh Smith
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance and power efficient processor when switching between fe...
- Patent number 12,299,449
- Issue date May 13, 2025
- Ventana Micro Systems Inc.
- John G Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for configuring a reduced instruction set comp...
- Patent number 12,293,188
- Issue date May 6, 2025
- Cornami, Inc.
- Morris Jacob Creeger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for context switching
- Patent number 12,288,091
- Issue date Apr 29, 2025
- ARM Limited
- Eric Kunze
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating and providing proposed digital actions in high-dimension...
- Patent number 12,288,074
- Issue date Apr 29, 2025
- Adobe Inc.
- Yash Chandak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prediction of number of iterations of a fetching process
- Patent number 12,288,067
- Issue date Apr 29, 2025
- ARM Limited
- Houdhaifa Bouzguarrou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction simulation device and method thereof
- Patent number 12,288,068
- Issue date Apr 29, 2025
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- Weilin Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Schedule-aware tensor distribution module
- Patent number 12,288,153
- Issue date Apr 29, 2025
- Intel Corporation
- Gautham Chinya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processor with vector data buffer
- Patent number 12,282,772
- Issue date Apr 22, 2025
- Simplex Micro, Inc.
- Thang Minh Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatus for tile configuration
- Patent number 12,282,773
- Issue date Apr 22, 2025
- Intel Corporation
- Menachem Adelman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable control of micro-operations cache resources of a proce...
- Patent number 12,282,777
- Issue date Apr 22, 2025
- Nokia Technologies Oy
- Pranjal Kumar Dutta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for matrix add, subtract, and mul...
- Patent number 12,260,213
- Issue date Mar 25, 2025
- Intel Corporation
- Robert Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerating fetch target queue (FTQ) processing in a processor
- Patent number 12,260,220
- Issue date Mar 25, 2025
- Microsoft Technology Licensing, LLC
- Saransh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregated computing for distributed confidential computing envi...
- Patent number 12,260,263
- Issue date Mar 25, 2025
- Intel Corporation
- Reshma Lal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable toggle point control circuitry for a clustered decode pipe...
- Patent number 12,254,319
- Issue date Mar 18, 2025
- Intel Corporation
- Sundararajan Ramakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture for data processing array control
- Patent number 12,248,786
- Issue date Mar 11, 2025
- Xilinx, Inc.
- Xiao Teng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor embedded streaming buffer
- Patent number 12,248,333
- Issue date Mar 11, 2025
- Intel Corporation
- Joseph Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Supporting 8-bit floating point format operands in a computing arch...
- Patent number 12,242,846
- Issue date Mar 4, 2025
- Intel Corporation
- Naveen Mellempudi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coprocessor operation bundling
- Patent number 12,242,855
- Issue date Mar 4, 2025
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data initialization techniques
- Patent number 12,242,414
- Issue date Mar 4, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Look-up table initialize
- Patent number 12,242,852
- Issue date Mar 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two address translations from a single table look-aside buffer read
- Patent number 12,235,773
- Issue date Feb 25, 2025
- Texas Instruments Incorporated
- Joseph Zbiciak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop driven region based frontend translation control for performan...
- Patent number 12,235,791
- Issue date Feb 25, 2025
- Intel Corporation
- Kameswar Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disaggregated computing for distributed confidential computing envi...
- Patent number 12,229,605
- Issue date Feb 18, 2025
- Intel Corporation
- Reshma Lal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing of data synchronization barrier instructions
- Patent number 12,229,561
- Issue date Feb 18, 2025
- Apple Inc.
- Madhu Sudan Hari
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20250173308
- Publication date May 29, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR RECONCILING CONFLICTING CACHELINE MODIFICA...
- Publication number 20250173149
- Publication date May 29, 2025
- Intel Corporation
- Vincent CAVE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INITIALIZATION TECHNIQUES
- Publication number 20250156371
- Publication date May 15, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILER ALGORITHM FOR GPU PREFETCHING
- Publication number 20250147766
- Publication date May 8, 2025
- QUALCOMM Incorporated
- Suryanarayana Murthy DURBHAKULA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER-EXECUTED METHOD, SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM
- Publication number 20250147783
- Publication date May 8, 2025
- Yangtze Memory Technologies Co., Ltd.
- Dan Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processing of Data Synchronization Barrier Instructions
- Publication number 20250147767
- Publication date May 8, 2025
- Apple Inc.
- Madhu Sudan Hari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA SYSTEM AND DATA READING METHOD
- Publication number 20250147768
- Publication date May 8, 2025
- VIA Technologies, Inc.
- Yaote WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISM FOR INSTRUCTION FUSION
- Publication number 20250130809
- Publication date Apr 24, 2025
- Ampere Computing LLC
- Benjamin Crawford CHAFFIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DECODING METHOD OF SIMULTANEOUSLY MULTI-THREADING PROCESSOR, PROCES...
- Publication number 20250123845
- Publication date Apr 17, 2025
- HYGON INFORMATION TECHNOLOGY CO., LTD.
- Zehan Cui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE MEMORY MANAGEMENT
- Publication number 20250117356
- Publication date Apr 10, 2025
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO CONVERT TO 16-BI...
- Publication number 20250117217
- Publication date Apr 10, 2025
- Intel Corporation
- Alexander F. HEINECKE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, CIRCUITS, METHODS, AND ARTICLES OF MANUFACTURER FOR DRAM-B...
- Publication number 20250117223
- Publication date Apr 10, 2025
- University of Virginia Patent Foundation
- Kevin Skadron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE
- Publication number 20250117221
- Publication date Apr 10, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...
- Publication number 20250117222
- Publication date Apr 10, 2025
- Intel Corporation
- Robert VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND METHOD FOR CONTROLLING PROCESSOR
- Publication number 20250110738
- Publication date Apr 3, 2025
- Preferred Networks, Inc.
- Ryosuke KURAMOCHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION
- Publication number 20250103548
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE STRUCTURE AND UTILIZATION
- Publication number 20250103546
- Publication date Mar 27, 2025
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR EMBEDDED STREAMING BUFFER
- Publication number 20250103331
- Publication date Mar 27, 2025
- Intel Corporation
- Joseph Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT SWAP CACHING WITH ZERO LINE OPTIMIZATIONS
- Publication number 20250103339
- Publication date Mar 27, 2025
- Microsoft Technology Licensing, LLC
- Ishwar AGARWAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...
- Publication number 20250103510
- Publication date Mar 27, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Duc Quang Bui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE
- Publication number 20250103547
- Publication date Mar 27, 2025
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coprocessors with Bypass Optimization, Variable Grid Architecture,...
- Publication number 20250094381
- Publication date Mar 20, 2025
- Apple Inc.
- Aditya Kesiraju
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATING SYSTEM PAGESIZE COMPATIBILITY WORKAROUNDS
- Publication number 20250060966
- Publication date Feb 20, 2025
- ARM Limited
- Dániel Kristóf Kiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO SEQUENCE BRANCH OPERATIONS
- Publication number 20250045052
- Publication date Feb 6, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Venkatesh Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY
- Publication number 20250028675
- Publication date Jan 23, 2025
- Intel Corporation
- JOYDEEP RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS BRIDGE, AND ASYNCHRONOUS PROCESSING METHOD
- Publication number 20250028669
- Publication date Jan 23, 2025
- NUVOTON TECHNOLOGY CORPORATION
- Szu-Wei YEH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SILENT CACHE LINE EVICTION
- Publication number 20250013575
- Publication date Jan 9, 2025
- Micron Technology, Inc.
- Tony M. Brewer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRANCH PREDICTION CIRCUITRY
- Publication number 20250013470
- Publication date Jan 9, 2025
- ARM Limited
- Rami Mohammad AL SHEIKH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTO-PREDICATION FOR LOOPS WITH DYNAMICALLY VARYING INTERATION COUNTS
- Publication number 20250004775
- Publication date Jan 2, 2025
- Intel Corporation
- Zeshan Chishti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR REMEDIATING MISALIGNMENT OF A DATA PIPELINE
- Publication number 20250004774
- Publication date Jan 2, 2025
- Dell Products L.P.
- OFIR EZRIELEV
- G06 - COMPUTING CALCULATING COUNTING

Loop buffering

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multi-port queueing cache and data processing system including the...

Implicit fence for write messages

Circuit, system, and method for matrix decimation

Systems, methods, and apparatuses for dot production operations

Look-up table write

Stalling issue queue entries until consecutive allocated entries ar...

Performance and power efficient processor when switching between fe...

Method and apparatus for configuring a reduced instruction set comp...

Methods and apparatus for context switching

Generating and providing proposed digital actions in high-dimension...

Prediction of number of iterations of a fetching process

Instruction simulation device and method thereof

Schedule-aware tensor distribution module

Vector processor with vector data buffer

Systems, methods, and apparatus for tile configuration

Programmable control of micro-operations cache resources of a proce...

Systems, methods, and apparatuses for matrix add, subtract, and mul...

Accelerating fetch target queue (FTQ) processing in a processor

Disaggregated computing for distributed confidential computing envi...

Scalable toggle point control circuitry for a clustered decode pipe...

Instruction set architecture for data processing array control

Processor embedded streaming buffer

Supporting 8-bit floating point format operands in a computing arch...

Coprocessor operation bundling

Data initialization techniques

Look-up table initialize

Two address translations from a single table look-aside buffer read

Loop driven region based frontend translation control for performan...

Disaggregated computing for distributed confidential computing envi...

Processing of data synchronization barrier instructions

Patents Applicationslast 30 patents

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

APPARATUS AND METHOD FOR RECONCILING CONFLICTING CACHELINE MODIFICA...

DATA INITIALIZATION TECHNIQUES

COMPILER ALGORITHM FOR GPU PREFETCHING

COMPUTER-EXECUTED METHOD, SYSTEM, AND COMPUTER-READABLE STORAGE MEDIUM

Processing of Data Synchronization Barrier Instructions

DATA SYSTEM AND DATA READING METHOD

MECHANISM FOR INSTRUCTION FUSION

DECODING METHOD OF SIMULTANEOUSLY MULTI-THREADING PROCESSOR, PROCES...

MULTI-TILE MEMORY MANAGEMENT

SYSTEMS AND METHODS FOR PERFORMING INSTRUCTIONS TO CONVERT TO 16-BI...

SYSTEMS, CIRCUITS, METHODS, AND ARTICLES OF MANUFACTURER FOR DRAM-B...

SYSTEMS, METHODS, AND APPARATUSES FOR TILE TRANSPOSE

SYSTEMS, METHODS, AND APPARATUSES FOR TILE MATRIX MULTIPLICATION AN...

PROCESSOR AND METHOD FOR CONTROLLING PROCESSOR

SYSTEMS AND METHODS FOR IMPROVING CACHE EFFICIENCY AND UTILIZATION

CACHE STRUCTURE AND UTILIZATION

PROCESSOR EMBEDDED STREAMING BUFFER

DIRECT SWAP CACHING WITH ZERO LINE OPTIMIZATIONS

TRACKING STREAMING ENGINE VECTOR PREDICATES TO CONTROL PROCESSOR EX...

SYSTOLIC DISAGGREGATION WITHIN A MATRIX ACCELERATOR ARCHITECTURE

Coprocessors with Bypass Optimization, Variable Grid Architecture,...

OPERATING SYSTEM PAGESIZE COMPATIBILITY WORKAROUNDS

METHODS AND APPARATUS TO SEQUENCE BRANCH OPERATIONS

GRAPHICS PROCESSOR OPERATION SCHEDULING FOR DETERMINISTIC LATENCY

ASYNCHRONOUS BRIDGE, AND ASYNCHRONOUS PROCESSING METHOD

SILENT CACHE LINE EVICTION

BRANCH PREDICTION CIRCUITRY

AUTO-PREDICATION FOR LOOPS WITH DYNAMICALLY VARYING INTERATION COUNTS

SYSTEM AND METHOD FOR REMEDIATING MISALIGNMENT OF A DATA PIPELINE