TREA

Multilevel memory with bit inversion arrangement

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Industry

  • CPC
  • G11C2211/5647
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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C2211/5647Multilevel memory with bit inversion arrangement
Industries