Multilevel reading using successive approximation

Industry

CPC
G11C2211/5632

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements Storage elements therefor

Current Industry

G11C2211/5632Multilevel reading using successive approximation

Industries

Patents Grantslast 30 patents

Information Patent Grant
Adjustable read retry order based on decoding success trend
- Patent number 11,557,352
- Issue date Jan 17, 2023
- Western Digital Technologies, Inc.
- Niang-Chu Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adjustable read retry order based on decoding success trend
- Patent number 11,017,867
- Issue date May 25, 2021
- Western Digital Technologies, Inc.
- Niang-Chu Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system and method of operating the same
- Patent number 10,930,358
- Issue date Feb 23, 2021
- SK hynix Inc.
- Dae Sung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive read threshold voltage tracking with gap estimation betwee...
- Patent number 10,755,776
- Issue date Aug 25, 2020
- Seagate Technology LLC
- Sundararajan Sankaranarayanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Adjustable read retry order based on decoding success trend
- Patent number 10,636,495
- Issue date Apr 28, 2020
- Western Digital Technologies, Inc.
- Niang-Chu Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system
- Patent number 10,310,942
- Issue date Jun 4, 2019
- TOSHIBA MEMORY CORPORATION
- Marie Takada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive read threshold voltage tracking with gap estimation betwee...
- Patent number 10,192,614
- Issue date Jan 29, 2019
- Seagate Technology LLC
- Sundararajan Sankaranarayanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for writing into and reading a multi-levels EEPROM and corre...
- Patent number 9,899,090
- Issue date Feb 20, 2018
- STMicroelectronics (Rousset) SAS
- Francois Tailliet
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for writing into and reading a multi-levels EEPROM and corre...
- Patent number 9,711,230
- Issue date Jul 18, 2017
- STMicroelectronics (Rousset) SAS
- Francois Tailliet
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of operating memory controller and devices including memory...
- Patent number 9,460,782
- Issue date Oct 4, 2016
- Samsung Electronics Co., Ltd.
- Chang Kyu Seol
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 8,331,153
- Issue date Dec 11, 2012
- Renesas Electronics Corporation
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
State machine sensing of memory cells
- Patent number 8,223,537
- Issue date Jul 17, 2012
- Micron Technology, Inc.
- Yantao Ma
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 8,134,869
- Issue date Mar 13, 2012
- Renesas Electronics Corporation
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 8,023,325
- Issue date Sep 20, 2011
- Renesas Technology Corporation
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change memory structure with multiple resistance states and m...
- Patent number 7,952,919
- Issue date May 31, 2011
- Micron Technology, Inc.
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
State machine sensing of memory cells
- Patent number 7,881,100
- Issue date Feb 1, 2011
- Micron Technology, Inc.
- Yantao Ma
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 7,881,111
- Issue date Feb 1, 2011
- Renesas Technology Corporation
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Phase change memory structure with multiple resistance states and m...
- Patent number 7,859,893
- Issue date Dec 28, 2010
- Micron Technology, Inc.
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Grant
Division-based sensing and partitioning of electronic memory
- Patent number 7,852,669
- Issue date Dec 14, 2010
- Spansion LLC
- Michael Achter
- G11 - INFORMATION STORAGE
Information Patent Grant
Compensating for variations in memory cell programmed state distrib...
- Patent number 7,830,708
- Issue date Nov 9, 2010
- Seagate Technology LLC
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 7,570,515
- Issue date Aug 4, 2009
- Renesas Technology Corporation
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory having shunted memory cells
- Patent number 7,551,476
- Issue date Jun 23, 2009
- Qimonda North America Corp.
- Thomas Nirschl
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 7,295,467
- Issue date Nov 13, 2007
- Renesas Technology Corp.
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrically alterable non-volatile multi-level memory device and m...
- Patent number 7,002,847
- Issue date Feb 21, 2006
- Renesas Technology Corp.
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 6,891,759
- Issue date May 10, 2005
- Renesas Technology Corp.
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 6,771,542
- Issue date Aug 3, 2004
- Renesas Technology Corp.
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 6,683,812
- Issue date Jan 27, 2004
- Hitachi, Ltd.
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Reading circuit and method for a multilevel non-volatile memory
- Patent number 6,657,895
- Issue date Dec 2, 2003
- STMicroelectronics S.r.l.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory having electrically erasable and programmable...
- Patent number 6,493,273
- Issue date Dec 10, 2002
- Hitachi, Ltd.
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Grant
Bit map addressing schemes for flash memory
- Patent number 6,483,742
- Issue date Nov 19, 2002
- Intel Corporation
- Sherif Sweha
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Adjustable Read Retry Order Based on Decoding Success Trend
- Publication number 20210249088
- Publication date Aug 12, 2021
- Western Digital Technologies, Inc.
- Niang-Chu CHEN
- G11 - INFORMATION STORAGE
Information Patent Application
ADAPTIVE READ THRESHOLD VOLTAGE TRACKING WITH GAP ESTIMATION BETWEE...
- Publication number 20190122726
- Publication date Apr 25, 2019
- SEAGATE TECHNOLOGY LLC
- Sundararajan Sankaranarayanan
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH MULTIPLE MEMORY ARRAYS TO FACILITATE IN-MEMORY C...
- Publication number 20190080731
- Publication date Mar 14, 2019
- Jack KAVALIEROS
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR WRITING INTO AND READING A MULTI-LEVELS EEPROM AND CORRE...
- Publication number 20170263320
- Publication date Sep 14, 2017
- STMicroelectronics (Rousset) SAS
- Francois Tailliet
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF OPERATING MEMORY CONTROLLER AND DEVICES INCLUDING MEMORY...
- Publication number 20140281293
- Publication date Sep 18, 2014
- Samsung Electronics Co., Ltd.
- CHANG KYU SEOL
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING
- Publication number 20140071761
- Publication date Mar 13, 2014
- SANDISK TECHNOLOGIES INC.
- Eran Sharon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...
- Publication number 20120127792
- Publication date May 24, 2012
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...
- Publication number 20110292727
- Publication date Dec 1, 2011
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...
- Publication number 20110122701
- Publication date May 26, 2011
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
STATE MACHINE SENSING OF MEMORY CELLS
- Publication number 20110116301
- Publication date May 19, 2011
- Micron Technology, Inc.
- Yantao Ma
- G11 - INFORMATION STORAGE
Information Patent Application
PHASE CHANGE MEMORY STRUCTURE WITH MULTIPLE RESISTANCE STATES AND M...
- Publication number 20110062409
- Publication date Mar 17, 2011
- Jun Liu
- G11 - INFORMATION STORAGE
Information Patent Application
Compensating for Variations in Memory Cell Programmed State Distrib...
- Publication number 20100271875
- Publication date Oct 28, 2010
- Seagate Technology LLC
- Chulmin Jung
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...
- Publication number 20100014351
- Publication date Jan 21, 2010
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
STATE MACHINE SENSING OF MEMORY CELLS
- Publication number 20090251952
- Publication date Oct 8, 2009
- Micron Technology, Inc.
- Yantao Ma
- G11 - INFORMATION STORAGE
Information Patent Application
Phase change memory structure with multiple resistance states and m...
- Publication number 20080298114
- Publication date Dec 4, 2008
- Micron Technology, Inc.
- Jin Liu
- G11 - INFORMATION STORAGE
Information Patent Application
DIVISION-BASED SENSING AND PARTITIONING OF ELECTRONIC MEMORY
- Publication number 20080225607
- Publication date Sep 18, 2008
- SPANSION LLC
- Michael Achter
- G11 - INFORMATION STORAGE
Information Patent Application
Resistive memory having shunted memory cells
- Publication number 20080080228
- Publication date Apr 3, 2008
- Thomas Nirschl
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...
- Publication number 20080037322
- Publication date Feb 14, 2008
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory having electrically erasable and programmable...
- Publication number 20060062045
- Publication date Mar 23, 2006
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
Electrically alterable non-volatile multi-level memory device and m...
- Publication number 20050128819
- Publication date Jun 16, 2005
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory having electrically erasable and programmable...
- Publication number 20040228202
- Publication date Nov 18, 2004
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory having electrically erasable and programmable...
- Publication number 20040081001
- Publication date Apr 29, 2004
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory having electrically erasable and programmable...
- Publication number 20030072203
- Publication date Apr 17, 2003
- Kunihiro Katayama
- G11 - INFORMATION STORAGE
Information Patent Application
Reading circuit and method for a multilevel non-volatile memory
- Publication number 20020186592
- Publication date Dec 12, 2002
- STMicroelectronics S.r. I.
- Mauro Pagliato
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT FOR STORAGE AND RETRIEVAL OF MULTIPLE DIGITAL BI...
- Publication number 20020101778
- Publication date Aug 1, 2002
- SAKHAWAT M. KHAN
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory having electrically erasable and programmable...
- Publication number 20020024845
- Publication date Feb 28, 2002
- Kunihiro Katayama
- G11 - INFORMATION STORAGE

Multilevel reading using successive approximation

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Adjustable read retry order based on decoding success trend

Adjustable read retry order based on decoding success trend

Memory system and method of operating the same

Adaptive read threshold voltage tracking with gap estimation betwee...

Adjustable read retry order based on decoding success trend

Memory system

Adaptive read threshold voltage tracking with gap estimation betwee...

Method for writing into and reading a multi-levels EEPROM and corre...

Method for writing into and reading a multi-levels EEPROM and corre...

Method of operating memory controller and devices including memory...

Semiconductor memory having electrically erasable and programmable...

State machine sensing of memory cells

Semiconductor memory having electrically erasable and programmable...

Semiconductor memory having electrically erasable and programmable...

Phase change memory structure with multiple resistance states and m...

State machine sensing of memory cells

Semiconductor memory having electrically erasable and programmable...

Phase change memory structure with multiple resistance states and m...

Division-based sensing and partitioning of electronic memory

Compensating for variations in memory cell programmed state distrib...

Semiconductor memory having electrically erasable and programmable...

Resistive memory having shunted memory cells

Semiconductor memory having electrically erasable and programmable...

Electrically alterable non-volatile multi-level memory device and m...

Semiconductor memory having electrically erasable and programmable...

Semiconductor memory having electrically erasable and programmable...

Semiconductor memory having electrically erasable and programmable...

Reading circuit and method for a multilevel non-volatile memory

Semiconductor memory having electrically erasable and programmable...

Bit map addressing schemes for flash memory

Patents Applicationslast 30 patents

Adjustable Read Retry Order Based on Decoding Success Trend

ADAPTIVE READ THRESHOLD VOLTAGE TRACKING WITH GAP ESTIMATION BETWEE...

MEMORY DEVICE WITH MULTIPLE MEMORY ARRAYS TO FACILITATE IN-MEMORY C...

METHOD FOR WRITING INTO AND READING A MULTI-LEVELS EEPROM AND CORRE...

METHOD OF OPERATING MEMORY CONTROLLER AND DEVICES INCLUDING MEMORY...

NON-VOLATILE STORAGE WITH JOINT HARD BIT AND SOFT BIT READING

SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...

SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...

SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...

STATE MACHINE SENSING OF MEMORY CELLS

PHASE CHANGE MEMORY STRUCTURE WITH MULTIPLE RESISTANCE STATES AND M...

Compensating for Variations in Memory Cell Programmed State Distrib...

SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...

STATE MACHINE SENSING OF MEMORY CELLS

Phase change memory structure with multiple resistance states and m...

DIVISION-BASED SENSING AND PARTITIONING OF ELECTRONIC MEMORY

Resistive memory having shunted memory cells

SEMICONDUCTOR MEMORY HAVING ELECTRICALLY ERASABLE AND PROGRAMMABLE...

Semiconductor memory having electrically erasable and programmable...

Electrically alterable non-volatile multi-level memory device and m...

Semiconductor memory having electrically erasable and programmable...

Semiconductor memory having electrically erasable and programmable...

Semiconductor memory having electrically erasable and programmable...

Reading circuit and method for a multilevel non-volatile memory

INTEGRATED CIRCUIT FOR STORAGE AND RETRIEVAL OF MULTIPLE DIGITAL BI...

Semiconductor memory having electrically erasable and programmable...