Output synchronization

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CPC
G11C7/1066

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

Current Industry

G11C7/1066Output synchronization

Industries

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Patents Grantslast 30 patents

Information Patent Grant
High-speed multiplexer for reducing glitch power
- Patent number 12,254,955
- Issue date Mar 18, 2025
- Meta Platforms Technologies, LLC
- Sri Harsha Manjunath
- G11 - INFORMATION STORAGE
Information Patent Grant
Superconducting distributed bidirectional current driver system
- Patent number 12,249,393
- Issue date Mar 11, 2025
- William Robert Reohr
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of reading data from self-selecting memory, self-selecting m...
- Patent number 12,237,047
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Hwan Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device, controller for controlling the same, sto...
- Patent number 12,237,045
- Issue date Feb 25, 2025
- Samsung Electronics Co., Ltd.
- Youngmin Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Hierarchical bank group timing
- Patent number 12,230,355
- Issue date Feb 18, 2025
- RAMBUS INC.
- John Eric Linstadt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system using asymmetric source-synchronous clocking
- Patent number 12,228,961
- Issue date Feb 18, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device with synchronous output
- Patent number 12,230,357
- Issue date Feb 18, 2025
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory component with input/output data rate alignment
- Patent number 12,229,435
- Issue date Feb 18, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device for supporting command bus training mode and method o...
- Patent number 12,217,823
- Issue date Feb 4, 2025
- Samsung Electronics Co., Ltd.
- Young-hun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device with adjustment of phase of data signal and cl...
- Patent number 12,205,668
- Issue date Jan 21, 2025
- Samsung Electronics Co., Ltd.
- Jaemin Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory and memory system
- Patent number 12,198,779
- Issue date Jan 14, 2025
- Kioxia Corporation
- Mitsuaki Honma
- G11 - INFORMATION STORAGE
Information Patent Grant
Off-chip driving device and driving capability enhancement method t...
- Patent number 12,190,991
- Issue date Jan 7, 2025
- NANYA TECHNOLOGY CORPORATION
- Chang-Ting Wu
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for write clock double data rate duty cycle corre...
- Patent number 12,183,427
- Issue date Dec 31, 2024
- Cadence Design Systems, Inc.
- Sachin Ramesh Gugwad
- G11 - INFORMATION STORAGE
Information Patent Grant
Internal and external data transfer for stacked memory dies
- Patent number 12,176,059
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Kang-Yong Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for synchronization for an interconnection protocol, contro...
- Patent number 12,170,128
- Issue date Dec 17, 2024
- SK hynix Inc.
- Fu Hsiung Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic random access memory speed bin compatibility
- Patent number 12,154,654
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Erik V. Pohlmann
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system and method of controlling a memory chip
- Patent number 12,154,659
- Issue date Nov 26, 2024
- Kioxia Corporation
- Shinya Koizumi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module with local synchronization and method of operation
- Patent number 12,135,644
- Issue date Nov 5, 2024
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device
- Patent number 12,136,469
- Issue date Nov 5, 2024
- Kioxia Corporation
- Shintaro Hayashi
- G11 - INFORMATION STORAGE
Information Patent Grant
Extended-burst write training
- Patent number 12,119,080
- Issue date Oct 15, 2024
- Cadence Design Systems, Inc.
- Sreeja Menon
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller performing data training, system-on-chip includin...
- Patent number 12,119,049
- Issue date Oct 15, 2024
- Samsung Electronics Co., Ltd.
- Daero Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory row-hammer mitigation
- Patent number 12,112,831
- Issue date Oct 8, 2024
- Micron Technology, Inc.
- Bryan David Kerstetter
- G11 - INFORMATION STORAGE
Information Patent Grant
Data transmission circuit, method of making it, and storage device
- Patent number 12,106,821
- Issue date Oct 1, 2024
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Enpeng Gao
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock qualifier enhancement for external double data rate memory in...
- Patent number 12,100,474
- Issue date Sep 24, 2024
- QUALCOMM Incorporated
- Yong Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Computer memory arrays employing memory banks and integrated serial...
- Patent number 12,100,473
- Issue date Sep 24, 2024
- Microsoft Technology Licensing, LLC
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device
- Patent number 12,100,459
- Issue date Sep 24, 2024
- Kioxia Corporation
- Shinya Okuno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory component with adjustable core-to-interface data rate ratio
- Patent number 12,094,565
- Issue date Sep 17, 2024
- RAMBUS INC.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, host device and method of operating the memory device
- Patent number 12,093,569
- Issue date Sep 17, 2024
- Samsung Electronics Co., Ltd.
- Joo Hwan Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for managing read operation of memory device wi...
- Patent number 12,087,387
- Issue date Sep 10, 2024
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for command decoding
- Patent number 12,073,911
- Issue date Aug 27, 2024
- Micron Technology, Inc.
- Yutaka Uemura
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP
- Publication number 20250095703
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Shinya KOIZUMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-VOLATILE MEMORY AND MEMORY SYSTEM
- Publication number 20250095767
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Mitsuaki HONMA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR OPERATING IN-MEMORY COMPUTING ARCHITECTURE...
- Publication number 20250078881
- Publication date Mar 6, 2025
- PEKING UNIVERSITY
- Peng HUANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN SITU DELAY MEASUREMENTS ON INTEGRATED CIRCUITS USING LIVE DATA A...
- Publication number 20250078882
- Publication date Mar 6, 2025
- Synopsys, Inc.
- Karen Darbinyan
- G11 - INFORMATION STORAGE
Information Patent Application
DATA ALIGNMENT FOR MEMORY
- Publication number 20250069631
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Martin Bach
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIO
- Publication number 20250054525
- Publication date Feb 13, 2025
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE
- Publication number 20250054526
- Publication date Feb 13, 2025
- SK HYNIX INC.
- Chan Keun KWON
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY
- Publication number 20250046353
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Erik V. Pohlmann
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING
- Publication number 20250028660
- Publication date Jan 23, 2025
- Netlist, Inc.
- Hyun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANCEIVER FOR DATA OR SIGNAL TRANSMISSION AND A MEMORY SYSTEM INCL...
- Publication number 20250006231
- Publication date Jan 2, 2025
- SK HYNIX INC.
- Jun Seo JANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ROW-HAMMER MITIGATION
- Publication number 20250006236
- Publication date Jan 2, 2025
- Micron Technology, Inc.
- Bryan David Kerstetter
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING
- Publication number 20240428835
- Publication date Dec 26, 2024
- Rambus Inc.
- Andrew M. Fuller
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES
- Publication number 20240402788
- Publication date Dec 5, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTENTION-FREE DUAL-VOLTAGE LOGIC CELL
- Publication number 20240395293
- Publication date Nov 28, 2024
- NVIDIA Corp.
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS
- Publication number 20240395296
- Publication date Nov 28, 2024
- SK HYNIX INC.
- Hyun Seung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE
- Publication number 20240371448
- Publication date Nov 7, 2024
- KIOXIA Corporation
- Shinya OKUNO
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA RECEIVING CIRCUIT FOR CHIPLET BASED STORAGE ARCHITECTURES
- Publication number 20240371422
- Publication date Nov 7, 2024
- SK HYNIX INC.
- Tae Ho LIM
- G11 - INFORMATION STORAGE
Information Patent Application
DATA TRANSMISSION USING DELAYED TIMING SIGNALS
- Publication number 20240372542
- Publication date Nov 7, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIGNAL TRANSMISSION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20240347086
- Publication date Oct 17, 2024
- SK HYNIX INC.
- Chan Keun KWON
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM USING ASYMMETRIC SOURCE-SYNCHRONOUS CLOCKING
- Publication number 20240345618
- Publication date Oct 17, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PULSE BASED MULTI-LEVEL CELL PROGRAMMING
- Publication number 20240347081
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING
- Publication number 20240345971
- Publication date Oct 17, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING POWER IN A MEMORY DEVICE
- Publication number 20240345646
- Publication date Oct 17, 2024
- Rambus Inc.
- Dinesh Patil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPEDANCE ADJUSTING CIRCUIT AND IMPEDANCE ADJUSTING METHOD FOR ZERO...
- Publication number 20240339166
- Publication date Oct 10, 2024
- NANYA TECHNOLOGY CORPORATION
- Yu-Wei Chen
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM INTERFACE MODE WITH IMPROVED CHANNEL INTEGRITY AND EFFICIENCY...
- Publication number 20240339137
- Publication date Oct 10, 2024
- Rambus Inc.
- Frederick A. Ware
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEMS AND METHODS FOR FLEXIBLE BANK ADDRESSING IN DIGITAL COMPUTI...
- Publication number 20240331745
- Publication date Oct 3, 2024
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Haruki Mori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE ACCESS FOR GROUPED MEMORY DIES
- Publication number 20240321329
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Yang Lu
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT
- Publication number 20240289047
- Publication date Aug 29, 2024
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-SPEED MULTIPLEXER FOR REDUCING GLITCH POWER
- Publication number 20240290362
- Publication date Aug 29, 2024
- Meta Platforms Technologies, LLC
- Sri Harsha Manjunath
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE AND METHOD FOR IN-MEMORY COMPUTING
- Publication number 20240290364
- Publication date Aug 29, 2024
- STMicroelectronics International N.V.
- Leonardo VALENCIA RISSETTO
- G11 - INFORMATION STORAGE

Output synchronization

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

High-speed multiplexer for reducing glitch power

Superconducting distributed bidirectional current driver system

Method of reading data from self-selecting memory, self-selecting m...

Nonvolatile memory device, controller for controlling the same, sto...

Hierarchical bank group timing

Memory system using asymmetric source-synchronous clocking

Device with synchronous output

Memory component with input/output data rate alignment

Memory device for supporting command bus training mode and method o...

Semiconductor device with adjustment of phase of data signal and cl...

Non-volatile memory and memory system

Off-chip driving device and driving capability enhancement method t...

System and method for write clock double data rate duty cycle corre...

Internal and external data transfer for stacked memory dies

Circuit for synchronization for an interconnection protocol, contro...

Dynamic random access memory speed bin compatibility

Memory system and method of controlling a memory chip

Memory module with local synchronization and method of operation

Semiconductor memory device

Extended-burst write training

Memory controller performing data training, system-on-chip includin...

Memory row-hammer mitigation

Data transmission circuit, method of making it, and storage device

Clock qualifier enhancement for external double data rate memory in...

Computer memory arrays employing memory banks and integrated serial...

Semiconductor device

Memory component with adjustable core-to-interface data rate ratio

Memory device, host device and method of operating the memory device

Methods and systems for managing read operation of memory device wi...

Apparatuses and methods for command decoding

Patents Applicationslast 30 patents

MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP

NON-VOLATILE MEMORY AND MEMORY SYSTEM

METHOD AND APPARATUS FOR OPERATING IN-MEMORY COMPUTING ARCHITECTURE...

IN SITU DELAY MEASUREMENTS ON INTEGRATED CIRCUITS USING LIVE DATA A...

DATA ALIGNMENT FOR MEMORY

MEMORY COMPONENT WITH ADJUSTABLE CORE-TO-INTERFACE DATA RATE RATIO

MEMORY DEVICE AND OPERATING METHOD OF THE MEMORY DEVICE

DYNAMIC RANDOM ACCESS MEMORY SPEED BIN COMPATIBILITY

MEMORY MODULE WITH TIMING-CONTROLLED DATA BUFFERING

TRANCEIVER FOR DATA OR SIGNAL TRANSMISSION AND A MEMORY SYSTEM INCL...

MEMORY ROW-HAMMER MITIGATION

SIGNAL RECEIVER WITH SKEW-TOLERANT STROBE GATING

MEMORY CONTROLLER WITH TRANSACTION-QUEUE-DEPENDENT POWER MODES

CONTENTION-FREE DUAL-VOLTAGE LOGIC CELL

SEMICONDUCTOR DEVICES RELATED TO DATA INPUT AND OUTPUT OPERATIONS

SEMICONDUCTOR DEVICE

DATA RECEIVING CIRCUIT FOR CHIPLET BASED STORAGE ARCHITECTURES

DATA TRANSMISSION USING DELAYED TIMING SIGNALS

SIGNAL TRANSMISSION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

MEMORY SYSTEM USING ASYMMETRIC SOURCE-SYNCHRONOUS CLOCKING

PULSE BASED MULTI-LEVEL CELL PROGRAMMING

SEMICONDUCTOR MEMORY SYSTEMS WITH ON-DIE DATA BUFFERING

OPTIMIZING POWER IN A MEMORY DEVICE

IMPEDANCE ADJUSTING CIRCUIT AND IMPEDANCE ADJUSTING METHOD FOR ZERO...

DRAM INTERFACE MODE WITH IMPROVED CHANNEL INTEGRITY AND EFFICIENCY...

SYSTEMS AND METHODS FOR FLEXIBLE BANK ADDRESSING IN DIGITAL COMPUTI...

SELECTIVE ACCESS FOR GROUPED MEMORY DIES

MEMORY COMPONENT WITH INPUT/OUTPUT DATA RATE ALIGNMENT

HIGH-SPEED MULTIPLEXER FOR REDUCING GLITCH POWER

DEVICE AND METHOD FOR IN-MEMORY COMPUTING