TREA

PN junction isolated integrated circuit with isolation walls having minimum dopant concentration at intermediate depth in epitaxial layer

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Industry

  • CPC
  • Y10S257/929
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Parent Industries

YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10USPC classification Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS Y10S257/00Active solid-state devices

Current Industry

Y10S257/929PN junction isolated integrated circuit with isolation walls having minimum dopant concentration at intermediate depth in epitaxial layer
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