Programming or data input circuits

Industry

CPC
G11C16/10

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Parent Industries

GPHYSICS G11Information storage G11CSTATIC STORES G11C16/00Erasable programmable read-only memories

Current Industry

G11C16/10Programming or data input circuits

Industries

Patents Grantslast 30 patents

Information Patent Grant
Memory device in which latch is coupled to source line and method o...
- Patent number 12,367,932
- Issue date Jul 22, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Yu-Der Chih
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory with different threshold voltages of memory cells
- Patent number 12,367,938
- Issue date Jul 22, 2025
- Kioxia Corporation
- Noboru Shibata
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous lower tail verify with upper tail verify
- Patent number 12,367,940
- Issue date Jul 22, 2025
- SanDisk Technologies, Inc.
- Yingying Zhu
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile memory device, read method for nonvolatile memory devic...
- Patent number RE50501
- Issue date Jul 22, 2025
- Samsung Electronics Co., Ltd.
- Chul Bum Kim
Information Patent Grant
Non-destructive mode cache programming in NAND flash memory devices
- Patent number 12,367,941
- Issue date Jul 22, 2025
- Yangtze Memory Technologies Co., Ltd.
- Jason Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing one data value by programming a first memory cell and a sec...
- Patent number 12,367,934
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Umberto Di Vincenzo
- G11 - INFORMATION STORAGE
Information Patent Grant
Unipolar programming of memory cells
- Patent number 12,367,933
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Trim setting determination for a memory device
- Patent number 12,367,942
- Issue date Jul 22, 2025
- Micron Technology, Inc.
- Aswin Thiruvengadam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device performing program operation and method of operating...
- Patent number 12,362,024
- Issue date Jul 15, 2025
- SK HYNIX INC.
- Dong Hun Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Mixed bitline lockout for QLC/TLC die
- Patent number 12,362,012
- Issue date Jul 15, 2025
- SanDisk Technologies, Inc.
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming memory
- Patent number 12,362,018
- Issue date Jul 15, 2025
- Macronix International Co., Ltd.
- Ya-Jui Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device that varies voltages applied to bit lines
- Patent number 12,362,019
- Issue date Jul 15, 2025
- Kioxia Corporation
- Yoichi Minemura
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device having a control circuit for changing a...
- Patent number 12,362,020
- Issue date Jul 15, 2025
- Kioxia Corporation
- Shouichi Ozaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with loop dependant ramp-up rate
- Patent number 12,354,664
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Abu Naser Zainuddin
- G11 - INFORMATION STORAGE
Information Patent Grant
Data receiver design in DDR memory interfaces
- Patent number 12,354,665
- Issue date Jul 8, 2025
- Western Digital Technologies, Inc.
- Mohammad Reza Mahmoodi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Channel pre-charge process in a memory device
- Patent number 12,354,681
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Jiacen Guo
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing an adaptive data path selection threshold for a memory sub...
- Patent number 12,354,684
- Issue date Jul 8, 2025
- Micron Technology, Inc.
- Jian Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device and programming method capable of programming...
- Patent number 12,354,667
- Issue date Jul 8, 2025
- Winbond Electronics Corp.
- Masaru Yano
- G11 - INFORMATION STORAGE
Information Patent Grant
High performance verify techniques in a memory device
- Patent number 12,354,680
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Xiang Yang
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with erase depth detection and adaptive adjustm...
- Patent number 12,354,683
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Huiwen Xu
- G11 - INFORMATION STORAGE
Information Patent Grant
Embedded flash memory and write operation method thereof
- Patent number 12,354,663
- Issue date Jul 8, 2025
- SK keyfoundry Inc.
- Youngchul Seo
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 12,354,671
- Issue date Jul 8, 2025
- Kioxia Corporation
- Koji Kato
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory power cycle protection mechanism
- Patent number 12,354,674
- Issue date Jul 8, 2025
- Apple Inc.
- John J. Sullivan
- G11 - INFORMATION STORAGE
Information Patent Grant
Intermediate re-verify for achieving tighter threshold voltage dist...
- Patent number 12,354,682
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Abhijith Prakash
- G11 - INFORMATION STORAGE
Information Patent Grant
Neural network classifier using array of three-gate non-volatile me...
- Patent number 12,354,651
- Issue date Jul 8, 2025
- Silicon Storage Technology, Inc.
- Hieu Van Tran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor storage device and controller
- Patent number 12,354,666
- Issue date Jul 8, 2025
- Kioxia Corporation
- Hiroshi Maejima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programming method for semiconductor device and semiconductor device
- Patent number 12,354,668
- Issue date Jul 8, 2025
- Yangtze Memory Technologies Co., Ltd.
- Kaiwei Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory with efficient testing
- Patent number 12,354,678
- Issue date Jul 8, 2025
- SanDisk Technologies, Inc.
- Jayavel Pachamuthu
- G11 - INFORMATION STORAGE
Information Patent Grant
Machine learning assisted read verify in a memory sub-system
- Patent number 12,347,503
- Issue date Jul 1, 2025
- Micron Technology, Inc.
- Amit Bhardwaj
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page buffer, memory device including page buffer and memory system...
- Patent number 12,347,502
- Issue date Jul 1, 2025
- SK hynix Inc.
- Kang Woo Park
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
PARTIAL-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES
- Publication number 20250239307
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF IMPROVING PROGRAM OPERATION SPEED IN 3D NAND SYSTEMS
- Publication number 20250239309
- Publication date Jul 24, 2025
- Yangtze Memory Technologies Co., Ltd.
- Ying HUANG
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM AND METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY
- Publication number 20250239312
- Publication date Jul 24, 2025
- KIOXIA Corporation
- Masahiro SAITO
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE CAPABLE OF SHORTENING ERASE TIME
- Publication number 20250239314
- Publication date Jul 24, 2025
- KIOXIA Corporation
- Noboru SHIBATA
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES, AND OPERATION METHOD THEREOF, MEMORY SYSTEMS
- Publication number 20250239308
- Publication date Jul 24, 2025
- Yangtze Memory Technologies Co., Ltd.
- JiaLiang DENG
- G11 - INFORMATION STORAGE
Information Patent Application
NON-VOLATILE MEMORY DEVICE, STORAGE DEVICE, AND OPERATION METHOD TH...
- Publication number 20250232815
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- Hyungseok YU
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE TYPES OF WRITE OPERATIONS
- Publication number 20250232744
- Publication date Jul 17, 2025
- Micron Technology, Inc.
- Giuseppe Cariello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND MEMORY DEVICE
- Publication number 20250232808
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Naomi TAKEDA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE REDUCING A NUMBER OF PROGRAM BIT LINES AN...
- Publication number 20250232813
- Publication date Jul 17, 2025
- Samsung Electronics Co., Ltd.
- Sangwon Kim
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES AND OPERATION METHODS THEREOF
- Publication number 20250232816
- Publication date Jul 17, 2025
- Yangtze Memory Technologies Co., Ltd.
- Jie YUAN
- G11 - INFORMATION STORAGE
Information Patent Application
HIDDEN MAJORITY VOTE PROGRAM VERIFY SCHEME FOR A MEMORY DEVICE
- Publication number 20250232823
- Publication date Jul 17, 2025
- Micro Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACK...
- Publication number 20250232822
- Publication date Jul 17, 2025
- Sunrise Memory Corporation
- Eli Harari
- G11 - INFORMATION STORAGE
Information Patent Application
THREE DIMENSIONAL MEMORY AND METHODS OF FORMING THE SAME
- Publication number 20250234547
- Publication date Jul 17, 2025
- Micron Technology, Inc.
- Sanh D. Tang
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY SYSTEM
- Publication number 20250232807
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Tokumasa HARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250232814
- Publication date Jul 17, 2025
- KIOXIA Corporation
- Yuki INUZUKA
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS WITH CIRCUIT MANAGEMENT MECHANISM AND METHODS FOR OPERATI...
- Publication number 20250232824
- Publication date Jul 17, 2025
- Micron Technology, Inc.
- Meng WEI
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMING MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING
- Publication number 20250226034
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Shyam Sunder Raghunathan
- G11 - INFORMATION STORAGE
Information Patent Application
ERASE DISTRIBUTION TIGHTENING TO IMPROVE READ BUDGET WINDOW IN A ME...
- Publication number 20250226035
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Murong Lang
- G11 - INFORMATION STORAGE
Information Patent Application
NAND DATA PLACEMENT SCHEMA
- Publication number 20250226041
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Carminantonio Manganelli
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250226031
- Publication date Jul 10, 2025
- KIOXIA Corporation
- Yosuke MURAKAMI
- G11 - INFORMATION STORAGE
Information Patent Application
MANAGING DEFECTIVE BLOCKS DURING MULTI-PLANE PROGRAMMING OPERATIONS...
- Publication number 20250226040
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Robert W. Mason
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
3D NAND FLASH AND OPERATION METHOD THEREOF
- Publication number 20250226033
- Publication date Jul 10, 2025
- Yangtze Memory Technologies Co., Ltd.
- Hongtao Liu
- G11 - INFORMATION STORAGE
Information Patent Application
COMPACT SENSE AMPLIFIER DATA LATCH DESIGN WITH VERY LOW VOLTAGE TRA...
- Publication number 20250226038
- Publication date Jul 10, 2025
- Western Digital Technologies, Inc.
- Anirudh Amarnath
- G11 - INFORMATION STORAGE
Information Patent Application
SELECTIVE SLOW PROGRAMMING CONVERGENCE PROGRAM OPERATION WITH PROGR...
- Publication number 20250226039
- Publication date Jul 10, 2025
- Micron Technology, Inc.
- Yu-Chung Lien
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND OPERATING METH...
- Publication number 20250218516
- Publication date Jul 3, 2025
- Samsung Electronics Co., Ltd.
- Heechan Lee
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE, CONTROL METHOD OF SEMICONDUCTOR STORA...
- Publication number 20250218519
- Publication date Jul 3, 2025
- KIOXIA Corporation
- Yoichi MINEMURA
- G11 - INFORMATION STORAGE
Information Patent Application
SOURCE LINE CONFIGURATIONS FOR A MEMORY DEVICE
- Publication number 20250218512
- Publication date Jul 3, 2025
- Micron Technology, Inc.
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND PROGRAM OPERATION THEREOF
- Publication number 20250218520
- Publication date Jul 3, 2025
- Yangtze Memory Technologies Co., Ltd.
- Ying Huang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250218518
- Publication date Jul 3, 2025
- KIOXIA Corporation
- Naoya TOKIWA
- G11 - INFORMATION STORAGE
Information Patent Application
ONON Sidewall Structure for Memory Device and Method for Making the...
- Publication number 20250210111
- Publication date Jun 26, 2025
- Taiwan Semiconductor Manufacturing Company Limited
- Chen-Ming HUANG
- G11 - INFORMATION STORAGE

Programming or data input circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory device in which latch is coupled to source line and method o...

Semiconductor memory with different threshold voltages of memory cells

Simultaneous lower tail verify with upper tail verify

Nonvolatile memory device, read method for nonvolatile memory devic...

Non-destructive mode cache programming in NAND flash memory devices

Storing one data value by programming a first memory cell and a sec...

Unipolar programming of memory cells

Trim setting determination for a memory device

Memory device performing program operation and method of operating...

Mixed bitline lockout for QLC/TLC die

Method of programming memory

Semiconductor storage device that varies voltages applied to bit lines

Semiconductor memory device having a control circuit for changing a...

Non-volatile memory with loop dependant ramp-up rate

Data receiver design in DDR memory interfaces

Channel pre-charge process in a memory device

Managing an adaptive data path selection threshold for a memory sub...

Semiconductor device and programming method capable of programming...

High performance verify techniques in a memory device

Non-volatile memory with erase depth detection and adaptive adjustm...

Embedded flash memory and write operation method thereof

Semiconductor memory device

Non-volatile memory power cycle protection mechanism

Intermediate re-verify for achieving tighter threshold voltage dist...

Neural network classifier using array of three-gate non-volatile me...

Semiconductor storage device and controller

Programming method for semiconductor device and semiconductor device

Non-volatile memory with efficient testing

Machine learning assisted read verify in a memory sub-system

Page buffer, memory device including page buffer and memory system...

Patents Applicationslast 30 patents

PARTIAL-FINE PROGRAM SCHEME FOR RELIABILITY RISK WORD LINES

METHOD OF IMPROVING PROGRAM OPERATION SPEED IN 3D NAND SYSTEMS

MEMORY SYSTEM AND METHOD FOR CONTROLLING SEMICONDUCTOR MEMORY

SEMICONDUCTOR MEMORY DEVICE CAPABLE OF SHORTENING ERASE TIME

MEMORY DEVICES, AND OPERATION METHOD THEREOF, MEMORY SYSTEMS

NON-VOLATILE MEMORY DEVICE, STORAGE DEVICE, AND OPERATION METHOD TH...

CONFIGURABLE TYPES OF WRITE OPERATIONS

MEMORY SYSTEM AND MEMORY DEVICE

NONVOLATILE MEMORY DEVICE REDUCING A NUMBER OF PROGRAM BIT LINES AN...

MEMORY DEVICES AND OPERATION METHODS THEREOF

HIDDEN MAJORITY VOTE PROGRAM VERIFY SCHEME FOR A MEMORY DEVICE

MULTI-GATE NOR FLASH THIN-FILM TRANSISTOR STRINGS ARRANGED IN STACK...

THREE DIMENSIONAL MEMORY AND METHODS OF FORMING THE SAME

MEMORY SYSTEM

SEMICONDUCTOR MEMORY DEVICE

APPARATUS WITH CIRCUIT MANAGEMENT MECHANISM AND METHODS FOR OPERATI...

PROGRAMMING MULTIPLE ERASE BLOCKS COUPLED TO A SAME STRING

ERASE DISTRIBUTION TIGHTENING TO IMPROVE READ BUDGET WINDOW IN A ME...

NAND DATA PLACEMENT SCHEMA

SEMICONDUCTOR MEMORY DEVICE

MANAGING DEFECTIVE BLOCKS DURING MULTI-PLANE PROGRAMMING OPERATIONS...

3D NAND FLASH AND OPERATION METHOD THEREOF

COMPACT SENSE AMPLIFIER DATA LATCH DESIGN WITH VERY LOW VOLTAGE TRA...

SELECTIVE SLOW PROGRAMMING CONVERGENCE PROGRAM OPERATION WITH PROGR...

MEMORY DEVICE, MEMORY SYSTEM INCLUDING THE SAME, AND OPERATING METH...

SEMICONDUCTOR STORAGE DEVICE, CONTROL METHOD OF SEMICONDUCTOR STORA...

SOURCE LINE CONFIGURATIONS FOR A MEMORY DEVICE

MEMORY DEVICE AND PROGRAM OPERATION THEREOF

SEMICONDUCTOR MEMORY DEVICE

ONON Sidewall Structure for Memory Device and Method for Making the...