Providing cache or TLB in specific location of a processing system

Industry

CPC
G06F2212/30

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures

Current Industry

G06F2212/30Providing cache or TLB in specific location of a processing system

Industries

Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus for read-modify-write support in multi-banked...
- Patent number 12,147,353
- Issue date Nov 19, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for shared virtual memory to manage data coher...
- Patent number 12,147,346
- Issue date Nov 19, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with dynamic allocation of entries
- Patent number 12,141,078
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic disaggregation within a matrix accelerator architecture
- Patent number 12,141,094
- Issue date Nov 12, 2024
- Intel Corporation
- Prasoonkumar Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic operations and histogram operations in a cache pipeline
- Patent number 12,141,079
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable cache for coherent system
- Patent number 12,141,435
- Issue date Nov 12, 2024
- Texas Instruments Incorporated
- Kai Chirca
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Machine learning sparse computation mechanism
- Patent number 12,141,891
- Issue date Nov 12, 2024
- Intel Corporation
- Eriko Nurvitadhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,124,383
- Issue date Oct 22, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data aggregation processing apparatus and method, and storage medium
- Patent number 12,118,004
- Issue date Oct 15, 2024
- YUSUR TECHNOLOGY CO., LTD.
- Guihai Yan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for eviction in dual datapath victim cache sy...
- Patent number 12,105,640
- Issue date Oct 1, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quasi-volatile system-level memory
- Patent number 12,105,650
- Issue date Oct 1, 2024
- SUNRISE MEMORY CORPORATION
- Robert D. Norman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management
- Patent number 12,099,461
- Issue date Sep 24, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression techniques
- Patent number 12,093,210
- Issue date Sep 17, 2024
- Intel Corporation
- Abhishek R. Appu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-side page activity recorder
- Patent number 12,093,189
- Issue date Sep 17, 2024
- Amazon Technologies, Inc.
- Ali Ghassan Saidi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive credit-based replenishment threshold used for transaction...
- Patent number 12,079,471
- Issue date Sep 3, 2024
- Texas Instruments Incorporated
- Daniel Brad Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processor operation scheduling for deterministic latency
- Patent number 12,079,155
- Issue date Sep 3, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to facilitate read-modify-write support in a...
- Patent number 12,072,814
- Issue date Aug 27, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache structure and utilization
- Patent number 12,066,975
- Issue date Aug 20, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Telemetry-capable memory sub-system
- Patent number 12,061,551
- Issue date Aug 13, 2024
- Micron Technology, Inc.
- David Andrew Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for cache optimization
- Patent number 12,056,059
- Issue date Aug 6, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compression of machine learning models utilizing pseudo-labeled dat...
- Patent number 12,056,906
- Issue date Aug 6, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile architecture for graphics operations
- Patent number 12,013,808
- Issue date Jun 18, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically foldable and unfoldable instruction fetch pipeline
- Patent number 12,014,180
- Issue date Jun 18, 2024
- Ventana Micro Systems Inc.
- John G. Favor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,007,907
- Issue date Jun 11, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable system on a chip
- Patent number 12,007,895
- Issue date Jun 11, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics processors and graphics processing units having dot produc...
- Patent number 12,007,935
- Issue date Jun 11, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache that supports draining write-miss entries
- Patent number 12,001,345
- Issue date Jun 4, 2024
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-tile memory management for detecting cross tile access provid...
- Patent number 11,995,029
- Issue date May 28, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device for packet processing acceleration
- Patent number 11,989,130
- Issue date May 21, 2024
- Realtek Semiconductor Corporation
- Kuo-Cheng Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch kill and revival in an instruction cache
- Patent number 11,977,491
- Issue date May 7, 2024
- Texas Instruments Incorporated
- Bipin Prasad Heremagalur Ramaprasad
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...
- Publication number 20240370380
- Publication date Nov 7, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable System on a Chip
- Publication number 20240370371
- Publication date Nov 7, 2024
- Apple Inc.
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...
- Publication number 20240362180
- Publication date Oct 31, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-tile Memory Management for Detecting Cross Tile Access Provid...
- Publication number 20240345990
- Publication date Oct 17, 2024
- Intel Corporation
- Lakshminarayanan Striramassarma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS
- Publication number 20240320184
- Publication date Sep 26, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION INDEPENDENT SURFACE LAYOUT FOR DATA PROCESSING
- Publication number 20240311298
- Publication date Sep 19, 2024
- Intel Corporation
- Guadalupe J. Garcia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH WRITE MISS MERGING
- Publication number 20240296129
- Publication date Sep 5, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELEC...
- Publication number 20240289275
- Publication date Aug 29, 2024
- HYGON INFORMATION TECHNOLOGY CO., LTD.
- Haifeng ZHAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHOTOGRAPHING METHOD AND RELATED APPARATUS
- Publication number 20240273029
- Publication date Aug 15, 2024
- Honor Device Co., Ltd.
- Jirun XU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES
- Publication number 20240264952
- Publication date Aug 8, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS PROCESSOR DATA ACCESS AND SHARING
- Publication number 20240256483
- Publication date Aug 1, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-MODE TIERED MEMORY CACHE CONTROLLER
- Publication number 20240256446
- Publication date Aug 1, 2024
- VMware LLC
- Andreas Georg Nowatzyk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH KILL AND REVIVAL IN AN INSTRUCTION CACHE
- Publication number 20240256464
- Publication date Aug 1, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Bipin Prasad Heremagalur Ramaprasad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TILE-BASED GRAPHICS
- Publication number 20240249377
- Publication date Jul 25, 2024
- Imagination Technologies Limited
- Steven Fishwick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE HAVING CACHE STORING CACHE DATA AND SCRUB DATA
- Publication number 20240232095
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...
- Publication number 20240232100
- Publication date Jul 11, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE
- Publication number 20240193098
- Publication date Jun 13, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Storage System and Method for Accessing Same
- Publication number 20240193084
- Publication date Jun 13, 2024
- FLC Global, Ltd.
- Sehat Sutardja
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC MEMORY UPDATE UNIT AND METHODS
- Publication number 20240185501
- Publication date Jun 6, 2024
- Imagination Technologies Limited
- Steven J. Clohset
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY RECONFIGURATION
- Publication number 20240184739
- Publication date Jun 6, 2024
- Intel Corporation
- Joydeep RAY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS
- Publication number 20240184446
- Publication date Jun 6, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TENSOR MAP CACHE STORAGE
- Publication number 20240176663
- Publication date May 30, 2024
- NVIDIA Corporation
- Gokul Ramaswamy HIRISAVE CHANDRA SHEKHARA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR MANAGING DATA BIAS IN A GRAPHICS PROCESSIN...
- Publication number 20240177264
- Publication date May 30, 2024
- Intel Corporation
- Joydeep Ray
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...
- Publication number 20240152457
- Publication date May 9, 2024
- Intel Corporation
- Altug Koker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20240143516
- Publication date May 2, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE HAVING CACHE STORING CACHE DATA AND SCRUB DATA
- Publication number 20240134802
- Publication date Apr 25, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION
- Publication number 20240104026
- Publication date Mar 28, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE SYSTEM AND METHOD PROVIDING CACHE AREA IN MEMORY INCLUDED I...
- Publication number 20240095166
- Publication date Mar 21, 2024
- Samsung Electronics Co., Ltd.
- Youngmin Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...
- Publication number 20240086065
- Publication date Mar 14, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Kai CHIRCA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRAM Cache with Stacked, Heterogenous Tag and Data Dies
- Publication number 20240086325
- Publication date Mar 14, 2024
- Rambus Inc.
- Taeksang Song
- G06 - COMPUTING CALCULATING COUNTING

Providing cache or TLB in specific location of a processing system

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus for read-modify-write support in multi-banked...

Method and apparatus for shared virtual memory to manage data coher...

Victim cache with dynamic allocation of entries

Systolic disaggregation within a matrix accelerator architecture

Atomic operations and histogram operations in a cache pipeline

Configurable cache for coherent system

Machine learning sparse computation mechanism

Systems and methods for cache optimization

Data aggregation processing apparatus and method, and storage medium

Methods and apparatus for eviction in dual datapath victim cache sy...

Quasi-volatile system-level memory

Multi-tile memory management

Compression techniques

Memory-side page activity recorder

Adaptive credit-based replenishment threshold used for transaction...

Graphics processor operation scheduling for deterministic latency

Methods and apparatus to facilitate read-modify-write support in a...

Cache structure and utilization

Telemetry-capable memory sub-system

Systems and methods for cache optimization

Compression of machine learning models utilizing pseudo-labeled dat...

Multi-tile architecture for graphics operations

Dynamically foldable and unfoldable instruction fetch pipeline

Victim cache with write miss merging

Scalable system on a chip

Graphics processors and graphics processing units having dot produc...

Victim cache that supports draining write-miss entries

Multi-tile memory management for detecting cross tile access provid...

Device for packet processing acceleration

Prefetch kill and revival in an instruction cache

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO FACILITATE READ-MODIFY-WRITE SUPPORT IN A...

Scalable System on a Chip

GRAPHICS PROCESSORS AND GRAPHICS PROCESSING UNITS HAVING DOT PRODUC...

Multi-tile Memory Management for Detecting Cross Tile Access Provid...

MULTI-TILE ARCHITECTURE FOR GRAPHICS OPERATIONS

CONFIGURATION INDEPENDENT SURFACE LAYOUT FOR DATA PROCESSING

VICTIM CACHE WITH WRITE MISS MERGING

DATA PROCESSING METHOD AND APPARATUS, AND CACHE, PROCESSOR AND ELEC...

PHOTOGRAPHING METHOD AND RELATED APPARATUS

VICTIM CACHE THAT SUPPORTS DRAINING WRITE-MISS ENTRIES

GRAPHICS PROCESSOR DATA ACCESS AND SHARING

MULTI-MODE TIERED MEMORY CACHE CONTROLLER

PREFETCH KILL AND REVIVAL IN AN INSTRUCTION CACHE

TILE-BASED GRAPHICS

MEMORY DEVICE HAVING CACHE STORING CACHE DATA AND SCRUB DATA

METHODS AND APPARATUS TO REDUCE READ-MODIFY-WRITE CYCLES FOR NON-AL...

METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE

Storage System and Method for Accessing Same

ATOMIC MEMORY UPDATE UNIT AND METHODS

DYNAMIC MEMORY RECONFIGURATION

MULTI-PROCESSOR BRIDGE WITH CACHE ALLOCATE AWARENESS

TENSOR MAP CACHE STORAGE

APPARATUS AND METHOD FOR MANAGING DATA BIAS IN A GRAPHICS PROCESSIN...

METHOD AND APPARATUS FOR SHARED VIRTUAL MEMORY TO MANAGE DATA COHER...

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

MEMORY DEVICE HAVING CACHE STORING CACHE DATA AND SCRUB DATA

HYBRID VICTIM CACHE AND WRITE MISS BUFFER WITH FENCE OPERATION

STORAGE SYSTEM AND METHOD PROVIDING CACHE AREA IN MEMORY INCLUDED I...

DELAYED SNOOP FOR IMPROVED MULTI-PROCESS FALSE SHARING PARALLEL THR...

DRAM Cache with Stacked, Heterogenous Tag and Data Dies