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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

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Patents Grantslast 30 patents

Information Patent Grant
Process for performing floating point multiply-accumulate operation...
- Patent number 12,175,209
- Issue date Dec 24, 2024
- Ceremorphic, Inc.
- Dylan Finch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power saving floating point multiplier-accumulator with precision-a...
- Patent number 12,106,069
- Issue date Oct 1, 2024
- Ceremorphic, Inc.
- Dylan Finch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selectively dispatching waves based on accumulators holding behavio...
- Patent number 11,397,578
- Issue date Jul 26, 2022
- Advanced Micro Devices, Inc.
- Randy Ramsey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point number operation circuit and method
- Patent number 10,761,807
- Issue date Sep 1, 2020
- Realtek Semiconductor Corporation
- Chia-I Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing logarithmic and antilogarithmic operations based on pi...
- Patent number 10,445,064
- Issue date Oct 15, 2019
- Intel Corporation
- Kamlesh R. Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 10,417,004
- Issue date Sep 17, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic apparatus and control method of the same using cordic al...
- Patent number 9,959,094
- Issue date May 1, 2018
- Canon Kabushiki Kaisha
- Tadayoshi Nakayama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 9,747,110
- Issue date Aug 29, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for calibration of a memory interface
- Patent number 9,436,387
- Issue date Sep 6, 2016
- Apple Inc.
- Robert E. Jeter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Math processing by detection of elementary valued operands
- Patent number 9,383,968
- Issue date Jul 5, 2016
- NVIDIA Corporation
- Daniel Finchelstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing power consumption in a fused multiply-add (FMA) unit respo...
- Patent number 9,323,500
- Issue date Apr 26, 2016
- Intel Corporation
- Brian Hickmann
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Dual-path fused floating-point add-subtract
- Patent number 9,317,478
- Issue date Apr 19, 2016
- Crossfield Technology LLC
- Earl E. Swartzlander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible accumulator in digital signal processing circuitry
- Patent number 9,170,775
- Issue date Oct 27, 2015
- Altera Corporation
- Leon Zheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing power consumption in a fused multiply-add (FMA) unit respo...
- Patent number 9,152,382
- Issue date Oct 6, 2015
- Intel Corporation
- Brian J. Hickmann
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Pipelined vectoring-mode CORDIC
- Patent number 9,047,148
- Issue date Jun 2, 2015
- LSI Corporation
- Zhibin Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for the on-line testing of pipeline stages temporarily not i...
- Patent number 9,015,528
- Issue date Apr 21, 2015
- Commissariat a l'Energie Atomique et Aux Energies Alternatives
- Valentin Gherman
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for multiply instructions in data processors
- Patent number 8,996,601
- Issue date Mar 31, 2015
- Advanced Micro Devices, Inc.
- Scott A. Hilker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor pipeline which implements fused and unfused multiply-add...
- Patent number 8,977,670
- Issue date Mar 10, 2015
- Oracle International Corporation
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined divide circuit for small operand sizes
- Patent number 8,892,622
- Issue date Nov 18, 2014
- Oracle International Corporation
- Christopher H. Olson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of bypassing unrounded results in a multiply-add...
- Patent number 8,671,129
- Issue date Mar 11, 2014
- Oracle International Corporation
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing multiplication for a multi-channel notch rejection filter
- Patent number 8,560,592
- Issue date Oct 15, 2013
- National Instruments Corporation
- Hector Rubio
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mode-based multiply-add recoding for denormal operands
- Patent number 8,447,800
- Issue date May 21, 2013
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-phased computational reconfiguration
- Patent number 8,397,054
- Issue date Mar 12, 2013
- L-3 Communications Integrated Systems L.P.
- Antone L. Kusmanoff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Specialized processing block for programmable logic device
- Patent number 8,301,681
- Issue date Oct 30, 2012
- Altera Corporation
- Kwan Yee Martin Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Processor which implements fused and unfused multiply-add instructi...
- Patent number 8,239,440
- Issue date Aug 7, 2012
- Oracle America, Inc.
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wave pipeline with selectively opaque register stages
- Patent number 8,176,354
- Issue date May 8, 2012
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for implementing montgomery modular multiplication and devic...
- Patent number 8,073,891
- Issue date Dec 6, 2011
- Thales
- Florent Bernard
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Math coprocessor
- Patent number 7,974,996
- Issue date Jul 5, 2011
- Cirrus Logic, Inc.
- Gregory Allen North
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mode-based multiply-add recoding for denormal operands
- Patent number 7,912,887
- Issue date Mar 22, 2011
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serially connected processing elements having forward and reverse p...
- Patent number 7,895,460
- Issue date Feb 22, 2011
- SAtech Group, A.B. Limited Liability Company
- Terence Neil Thomas
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTIPLY-ACCUMULATE WITH VARIABLE FLOATING POINT PRECISION
- Publication number 20230131459
- Publication date Apr 27, 2023
- Flex Logix Technologies, Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Saving Floating Point Multiplier-Accumulator with Precision-A...
- Publication number 20220405051
- Publication date Dec 22, 2022
- Redpine Signals, Inc.
- Dylan FINCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Process for Dual Mode Floating Point Multiplier-Accumulator with Hi...
- Publication number 20220405054
- Publication date Dec 22, 2022
- Redpine Signals, Inc.
- Dylan FINCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Process for Performing Floating Point Multiply-Accumulate Operation...
- Publication number 20220405052
- Publication date Dec 22, 2022
- Redpine Signals, Inc.
- Dylan FINCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCUMULATORS FOR BEHAVIORAL CHARACTERISTICS OF WAVES
- Publication number 20210064366
- Publication date Mar 4, 2021
- ADVANCED MICRO DEVICES, INC.
- Randy RAMSEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplier-Accumulator Circuitry and Pipeline using Floating Point...
- Publication number 20200401414
- Publication date Dec 24, 2020
- Flex Logix Technologies, Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating-point number operation circuit and method
- Publication number 20190138274
- Publication date May 9, 2019
- REALTEK SEMICONDUCTOR CORPORATION
- CHIA-I CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMPLEMENTING LOGARITHMIC AND ANTILOGARITHMIC OPERATIONS BASED ON PI...
- Publication number 20180225093
- Publication date Aug 9, 2018
- Intel Corporation
- Kamlesh R. Pillai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS
- Publication number 20170322813
- Publication date Nov 9, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for the On-Line Testing of Pipeline Stages Temporarily Not I...
- Publication number 20140149725
- Publication date May 29, 2014
- Valentin Gherman
- G01 - MEASURING TESTING
Information Patent Application
REDUCING POWER CONSUMPTION IN A FUSED MULTIPLY-ADD (FMA) UNIT RESPO...
- Publication number 20140122555
- Publication date May 1, 2014
- BRIAN HICKMANN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reducing Power Consumption In A Fused Multiply-Add (FMA) Unit Respo...
- Publication number 20140122554
- Publication date May 1, 2014
- Brian J. Hickmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual-Path Fused Floating-Point Add-Subtract
- Publication number 20140074903
- Publication date Mar 13, 2014
- Crossfield Technology LLC
- Earl E. Swartzlander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MULTIPLY INSTRUCTIONS IN DATA PROCESSORS
- Publication number 20130346463
- Publication date Dec 26, 2013
- Advanced Micro Devices, Inc.
- Scott A. Hilker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pipelined Vectoring-Mode CORDIC
- Publication number 20130335853
- Publication date Dec 19, 2013
- LSI CORPORATION
- Zhibin Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINED DIVIDE CIRCUIT FOR SMALL OPERAND SIZES
- Publication number 20120259907
- Publication date Oct 11, 2012
- Christopher H. Olson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD OF BYPASSING UNROUNDED RESULTS IN A MULTIPLY-ADD...
- Publication number 20120233234
- Publication date Sep 13, 2012
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor Pipeline which Implements Fused and Unfused Multiply-Add...
- Publication number 20120221614
- Publication date Aug 30, 2012
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING POWER CONSUMPTION IN MULTI-PRECISION FLOATING POINT MULTIP...
- Publication number 20120151191
- Publication date Jun 14, 2012
- Brent R. Boswell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Multiplication for a Multi-Channel Notch Rejection Filter
- Publication number 20120030267
- Publication date Feb 2, 2012
- Hector Rubio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAVE PIPELINE WITH SELECTIVELY OPAQUE REGISTER STAGES
- Publication number 20110239036
- Publication date Sep 29, 2011
- International Business Machines Corporation
- Hans M. Jacobson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADDER CIRCUIT AND XIU-ACCUMULATOR CIRCUIT USING THE SAME
- Publication number 20110238721
- Publication date Sep 29, 2011
- NOVATEK MICROELECTRONICS CORP.
- Liming XIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-phased computational reconfiguration
- Publication number 20110154012
- Publication date Jun 23, 2011
- Antone L. Kusmanoff
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODE-BASED MULTIPLY-ADD RECODING FOR DENORMAL OPERANDS
- Publication number 20110137970
- Publication date Jun 9, 2011
- QUALCOMM Incorporated
- Kenneth Alan Dockser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware Function Generator Support in a DSP
- Publication number 20110119520
- Publication date May 19, 2011
- Avaz Networks
- Shoab A. Khan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIALLY CONNECTED PROCESSING ELEMENTS HAVING FORWARD AND REVERSE P...
- Publication number 20110010564
- Publication date Jan 13, 2011
- SAtech Group, A.B. Limited Liability Company
- Terence Neil Thomas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE ACCUMULATOR IN DIGITAL SIGNAL PROCESSING CIRCUITRY
- Publication number 20100169404
- Publication date Jul 1, 2010
- Leon Zheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor which Implements Fused and Unfused Multiply-Add Instructi...
- Publication number 20090248779
- Publication date Oct 1, 2009
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODULAR REDUCTION OPERATOR
- Publication number 20090089350
- Publication date Apr 2, 2009
- THALES
- Alain SAUZET
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR IMPLEMENTING MONTGOMERY MODULAR MULTIPLICATION AND DEVIC...
- Publication number 20090037508
- Publication date Feb 5, 2009
- Florent Bernard
- G06 - COMPUTING CALCULATING COUNTING

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Process for performing floating point multiply-accumulate operation...

Power saving floating point multiplier-accumulator with precision-a...

Selectively dispatching waves based on accumulators holding behavio...

Floating-point number operation circuit and method

Implementing logarithmic and antilogarithmic operations based on pi...

Pipelined cascaded digital signal processing structures and methods

Arithmetic apparatus and control method of the same using cordic al...

Pipelined cascaded digital signal processing structures and methods

System and method for calibration of a memory interface

Math processing by detection of elementary valued operands

Reducing power consumption in a fused multiply-add (FMA) unit respo...

Dual-path fused floating-point add-subtract

Flexible accumulator in digital signal processing circuitry

Reducing power consumption in a fused multiply-add (FMA) unit respo...

Pipelined vectoring-mode CORDIC

Method for the on-line testing of pipeline stages temporarily not i...

Method and apparatus for multiply instructions in data processors

Processor pipeline which implements fused and unfused multiply-add...

Pipelined divide circuit for small operand sizes

System and method of bypassing unrounded results in a multiply-add...

Performing multiplication for a multi-channel notch rejection filter

Mode-based multiply-add recoding for denormal operands

Multi-phased computational reconfiguration

Specialized processing block for programmable logic device

Processor which implements fused and unfused multiply-add instructi...

Wave pipeline with selectively opaque register stages

Method for implementing montgomery modular multiplication and devic...

Math coprocessor

Mode-based multiply-add recoding for denormal operands

Serially connected processing elements having forward and reverse p...

Patents Applicationslast 30 patents

MULTIPLY-ACCUMULATE WITH VARIABLE FLOATING POINT PRECISION

Power Saving Floating Point Multiplier-Accumulator with Precision-A...

Process for Dual Mode Floating Point Multiplier-Accumulator with Hi...

Process for Performing Floating Point Multiply-Accumulate Operation...

ACCUMULATORS FOR BEHAVIORAL CHARACTERISTICS OF WAVES

Multiplier-Accumulator Circuitry and Pipeline using Floating Point...

Floating-point number operation circuit and method

IMPLEMENTING LOGARITHMIC AND ANTILOGARITHMIC OPERATIONS BASED ON PI...

PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS

Method for the On-Line Testing of Pipeline Stages Temporarily Not I...

REDUCING POWER CONSUMPTION IN A FUSED MULTIPLY-ADD (FMA) UNIT RESPO...

Reducing Power Consumption In A Fused Multiply-Add (FMA) Unit Respo...

Dual-Path Fused Floating-Point Add-Subtract

METHOD AND APPARATUS FOR MULTIPLY INSTRUCTIONS IN DATA PROCESSORS

Pipelined Vectoring-Mode CORDIC

PIPELINED DIVIDE CIRCUIT FOR SMALL OPERAND SIZES

SYSTEM AND METHOD OF BYPASSING UNROUNDED RESULTS IN A MULTIPLY-ADD...

Processor Pipeline which Implements Fused and Unfused Multiply-Add...

REDUCING POWER CONSUMPTION IN MULTI-PRECISION FLOATING POINT MULTIP...

Performing Multiplication for a Multi-Channel Notch Rejection Filter

WAVE PIPELINE WITH SELECTIVELY OPAQUE REGISTER STAGES

ADDER CIRCUIT AND XIU-ACCUMULATOR CIRCUIT USING THE SAME

Multi-phased computational reconfiguration

MODE-BASED MULTIPLY-ADD RECODING FOR DENORMAL OPERANDS

Hardware Function Generator Support in a DSP

SERIALLY CONNECTED PROCESSING ELEMENTS HAVING FORWARD AND REVERSE P...

FLEXIBLE ACCUMULATOR IN DIGITAL SIGNAL PROCESSING CIRCUITRY

Processor which Implements Fused and Unfused Multiply-Add Instructi...

MODULAR REDUCTION OPERATOR

METHOD FOR IMPLEMENTING MONTGOMERY MODULAR MULTIPLICATION AND DEVIC...