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G06F2207/386

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/386Special constructional features

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Chopper stabilized bias unit element with binary weighted charge tr...
- Patent number 11,687,738
- Issue date Jun 27, 2023
- Ceremorphic, Inc.
- Martin Kraemer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layout structure for shared analog bus in unit element multiplier
- Patent number 11,567,730
- Issue date Jan 31, 2023
- Ceremorphic, Inc.
- Martin Kraemer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for sequencing multiply-accumulate operations
- Patent number 10,572,224
- Issue date Feb 25, 2020
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 10,417,004
- Issue date Sep 17, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing method, processor, and data processing device
- Patent number 10,025,752
- Issue date Jul 17, 2018
- Huawei Technologies Co., Ltd.
- Nan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for sequencing multiply-accumulate operations
- Patent number 10,019,234
- Issue date Jul 10, 2018
- Altera Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 9,747,110
- Issue date Aug 29, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for adaptive power management
- Patent number 9,548,735
- Issue date Jan 17, 2017
- Maxim Intergrated Products, Inc.
- Edward Tangkwai Ma
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Operand-optimized asynchronous floating-point units and method of u...
- Patent number 9,524,270
- Issue date Dec 20, 2016
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC's with large carry chains
- Patent number 9,489,175
- Issue date Nov 8, 2016
- Altera Corporation
- Herman Schmit
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems, pipeline stages, and computer readable media for advanced...
- Patent number 8,872,544
- Issue date Oct 28, 2014
- The University of North Carolina at Chapel Hill
- Gennette Delaine Gill
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable IC's with large carry chains
- Patent number 8,797,062
- Issue date Aug 5, 2014
- Tabula, Inc.
- Herman Schmit
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous pipelined data path with data transition
- Patent number 8,677,103
- Issue date Mar 18, 2014
- Marvell Isreal (M.I.S.L.) Ltd.
- Dror Barash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, pipeline stages, and computer readable media for advanced...
- Patent number 8,669,779
- Issue date Mar 11, 2014
- The University of North Carolina at Chapel Hill
- Gennette Delaine Gill
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiplier architecture utilizing a uniform array of logic blocks,...
- Patent number 8,527,572
- Issue date Sep 3, 2013
- Xilinx, Inc.
- Steven P. Young
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC'S with large carry chains
- Patent number 8,248,102
- Issue date Aug 21, 2012
- Tabula, Inc.
- Jason Redgrave
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low latency request dispatcher
- Patent number 8,131,950
- Issue date Mar 6, 2012
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier and arithmetic unit
- Patent number 8,041,758
- Issue date Oct 18, 2011
- NEC Computer Techno, Ltd.
- Takashi Osada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency request dispatcher
- Patent number 8,001,335
- Issue date Aug 16, 2011
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically fusing instructions at executi...
- Patent number 7,818,550
- Issue date Oct 19, 2010
- International Business Machines Corporation
- Michael Thomas Vaden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency request dispatcher
- Patent number 7,814,283
- Issue date Oct 12, 2010
- Juniper Networks, Inc.
- Devereaux C. Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing calculation operations and a device
- Patent number 7,774,400
- Issue date Aug 10, 2010
- Nokia Corporation
- David Guevorkian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-mode circuit in a self-timed integrated circuit
- Patent number 7,746,103
- Issue date Jun 29, 2010
- Xilinx, Inc.
- Brian C. Gaide
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC with large carry chains
- Patent number 7,743,085
- Issue date Jun 22, 2010
- Tabula, Inc.
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous full adder, asynchronous microprocessor and electronic...
- Patent number 7,693,930
- Issue date Apr 6, 2010
- Seiko Epson Corporation
- Nobuo Karaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable IC with configurable routing resources that have asymm...
- Patent number 7,573,296
- Issue date Aug 11, 2009
- Tabula Inc.
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power array multiplier
- Patent number 7,546,331
- Issue date Jun 9, 2009
- QUALCOMM Incorporated
- Farhad Fuad Islam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-synchronous FIFO memory device
- Patent number 7,463,640
- Issue date Dec 9, 2008
- Sharp Kabushiki Kaisha
- Tsuyoshi Muramatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power saving in a floating point unit using a multiplier and aligne...
- Patent number 7,058,830
- Issue date Jun 6, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for early evaluation in micropipeline processors
- Patent number 7,043,710
- Issue date May 9, 2006
- Mississippi State University
- Robert B. Reese
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Layout Structure for Shared Analog Bus in Unit Element Multiplier
- Publication number 20220244913
- Publication date Aug 4, 2022
- Redpine Signals, Inc.
- Martin KRAEMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS
- Publication number 20180349098
- Publication date Dec 6, 2018
- Intel Corporation
- Valavan Manohararajah
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS
- Publication number 20170322813
- Publication date Nov 9, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, PIPELINE STAGES, AND COMPUTER READABLE MEDIA FOR ADVANCED...
- Publication number 20140247069
- Publication date Sep 4, 2014
- The University of North Carolina at Chapel Hill
- Gennette Delaine Gill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERAND-OPTIMIZED ASYNCHRONOUS FLOATING-POINT UNITS AND METHOD OF U...
- Publication number 20130124592
- Publication date May 16, 2013
- Cornell University
- Rajit Manohar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE IC'S WITH LARGE CARRY CHAINS
- Publication number 20130038347
- Publication date Feb 14, 2013
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY REQUEST DISPATCHER
- Publication number 20110208926
- Publication date Aug 25, 2011
- Juniper Networks, Inc.
- Devereaux C. CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, PIPELINE STAGES, AND COMPUTER READABLE MEDIA FOR ADVANCED...
- Publication number 20110169525
- Publication date Jul 14, 2011
- Gennette Delaine Gill
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURABLE IC'S WITH LARGE CARRY CHAINS
- Publication number 20110031998
- Publication date Feb 10, 2011
- Jason Redgrave
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY REQUEST DISPATCHER
- Publication number 20110010474
- Publication date Jan 13, 2011
- Juniper Networks, Inc.
- Devereaux C. CHEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Dynamically Fusing Instructions at Executi...
- Publication number 20090031120
- Publication date Jan 29, 2009
- IBM Corporation
- Michael Thomas Vaden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic device and arithmetic method
- Publication number 20080307029
- Publication date Dec 11, 2008
- FUJITSU LIMITED
- Ryuji Kan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC's with large carry chains
- Publication number 20070244960
- Publication date Oct 18, 2007
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC with configurable routing resources that have asymm...
- Publication number 20070244961
- Publication date Oct 18, 2007
- Herman Schmit
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC's with dual carry chains
- Publication number 20070244959
- Publication date Oct 18, 2007
- Steven Teig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable IC's with carry bypass circuitry
- Publication number 20070244958
- Publication date Oct 18, 2007
- Jason Redgrave
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplier and arithmetic unit
- Publication number 20070203964
- Publication date Aug 30, 2007
- NEC Corporation
- Takashi Osada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asynchronous signed multiplier and algorithm thereof
- Publication number 20070100924
- Publication date May 3, 2007
- Chin-Yung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asynchronous multiplier
- Publication number 20060242219
- Publication date Oct 26, 2006
- Chin-Yung Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Power array multiplier
- Publication number 20060212505
- Publication date Sep 21, 2006
- Farhad Fuad Islam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Addressing type of asynchronous divider
- Publication number 20050278407
- Publication date Dec 15, 2005
- Tatung Co., Ltd.
- Di Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asynchronous full adder, asynchronous microprocessor and electronic...
- Publication number 20050216546
- Publication date Sep 29, 2005
- SEIKO EPSON CORPORATION
- Nobuo Karaki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for early evaluation in micropipeline processors
- Publication number 20040225699
- Publication date Nov 11, 2004
- Robert B. Reese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Noise invariant circuits, systems and methods
- Publication number 20040199563
- Publication date Oct 7, 2004
- Edwin De Angel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power saving in a floating point unit using a multiplier and aligne...
- Publication number 20040186870
- Publication date Sep 23, 2004
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for performing calculation operations and a device
- Publication number 20040148321
- Publication date Jul 29, 2004
- Nokia Corporation
- David Guevorkian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Self-synchronous FIFO memory device
- Publication number 20040027909
- Publication date Feb 12, 2004
- Tsuyoshi Muramatsu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Elimination of rounding step in the short path of a floating point...
- Publication number 20030115236
- Publication date Jun 19, 2003
- Ajay Naini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating point adder
- Publication number 20020184285
- Publication date Dec 5, 2002
- Intel Corporation
- Amaresh Pangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Asynchronous pipeline control interface
- Publication number 20020083298
- Publication date Jun 27, 2002
- Peter William Cook
- G06 - COMPUTING CALCULATING COUNTING

Special constructional features

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Chopper stabilized bias unit element with binary weighted charge tr...

Layout structure for shared analog bus in unit element multiplier

Methods and apparatus for sequencing multiply-accumulate operations

Pipelined cascaded digital signal processing structures and methods

Data processing method, processor, and data processing device

Methods and apparatus for sequencing multiply-accumulate operations

Pipelined cascaded digital signal processing structures and methods

System and method for adaptive power management

Operand-optimized asynchronous floating-point units and method of u...

Configurable IC's with large carry chains

Systems, pipeline stages, and computer readable media for advanced...

Configurable IC's with large carry chains

Asynchronous pipelined data path with data transition

Systems, pipeline stages, and computer readable media for advanced...

Multiplier architecture utilizing a uniform array of logic blocks,...

Configurable IC'S with large carry chains

Low latency request dispatcher

Multiplier and arithmetic unit

Low latency request dispatcher

Method and apparatus for dynamically fusing instructions at executi...

Low latency request dispatcher

Method and system for performing calculation operations and a device

Multi-mode circuit in a self-timed integrated circuit

Configurable IC with large carry chains

Asynchronous full adder, asynchronous microprocessor and electronic...

Configurable IC with configurable routing resources that have asymm...

Low power array multiplier

Self-synchronous FIFO memory device

Power saving in a floating point unit using a multiplier and aligne...

Method for early evaluation in micropipeline processors

Patents Applicationslast 30 patents

Layout Structure for Shared Analog Bus in Unit Element Multiplier

METHODS AND APPARATUS FOR SEQUENCING MULTIPLY-ACCUMULATE OPERATIONS

PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS

SYSTEMS, PIPELINE STAGES, AND COMPUTER READABLE MEDIA FOR ADVANCED...

OPERAND-OPTIMIZED ASYNCHRONOUS FLOATING-POINT UNITS AND METHOD OF U...

CONFIGURABLE IC'S WITH LARGE CARRY CHAINS

LOW LATENCY REQUEST DISPATCHER

SYSTEMS, PIPELINE STAGES, AND COMPUTER READABLE MEDIA FOR ADVANCED...

CONFIGURABLE IC'S WITH LARGE CARRY CHAINS

LOW LATENCY REQUEST DISPATCHER

Method and Apparatus for Dynamically Fusing Instructions at Executi...

Arithmetic device and arithmetic method

Configurable IC's with large carry chains

Configurable IC with configurable routing resources that have asymm...

Configurable IC's with dual carry chains

Configurable IC's with carry bypass circuitry

Multiplier and arithmetic unit

Asynchronous signed multiplier and algorithm thereof

Asynchronous multiplier

Low Power array multiplier

Addressing type of asynchronous divider

Asynchronous full adder, asynchronous microprocessor and electronic...

Method for early evaluation in micropipeline processors

Noise invariant circuits, systems and methods

Power saving in a floating point unit using a multiplier and aligne...

Method and system for performing calculation operations and a device

Self-synchronous FIFO memory device

Elimination of rounding step in the short path of a floating point...

Floating point adder

Asynchronous pipeline control interface