Sticky bit

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CPC
G06F7/49952

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/49952Sticky bit

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Patents Grantslast 30 patents

Information Patent Grant
Multi-input floating-point adder
- Patent number 10,514,891
- Issue date Dec 24, 2019
- Google LLC
- Hsin-Jung Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for subtracting significand values of floating...
- Patent number 10,275,218
- Issue date Apr 30, 2019
- ARM Limited
- David Raymond Lutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processing denormal numbers in FMA hardware
- Patent number 10,078,512
- Issue date Sep 18, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Thomas Elmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic circuit and arithmetic method
- Patent number 9,632,751
- Issue date Apr 25, 2017
- Kabushiki Kaisha Toshiba
- Koichiro Ban
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing apparatus and method for multiplying floating point...
- Patent number 9,483,232
- Issue date Nov 1, 2016
- ARM Limited
- David Raymond Lutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-path fused floating-point two-term dot product unit
- Patent number 8,626,813
- Issue date Jan 7, 2014
- Board of Regents, The University of Texas System
- Earl E. Swartzlander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for computing alignment sticky bit in floating-po...
- Patent number 8,543,632
- Issue date Sep 24, 2013
- STMicroelectronics, Inc.
- Alexander Driker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rounding floating point division results
- Patent number 7,752,250
- Issue date Jul 6, 2010
- International Business Machines Corporation
- Charles David Wait
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic operation unit, information processing apparatus and ari...
- Patent number 7,720,899
- Issue date May 18, 2010
- Fujitsu Limited
- Kunihiko Tajiri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Elimination of end-around-carry critical path in floating point add...
- Patent number 7,054,898
- Issue date May 30, 2006
- Sun Microsystems, Inc.
- Allan Tzungren Tzeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rounding mechanisms in processors
- Patent number 7,047,272
- Issue date May 16, 2006
- Texas Instruments Incorporated
- Jean-Pierre Giacalone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rounding denormalized numbers in a pipelined floating point unit wi...
- Patent number 6,721,772
- Issue date Apr 13, 2004
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for acquiring FMAC rounding parameters
- Patent number 6,571,266
- Issue date May 27, 2003
- Hewlett-Packard Development Company, L.P.
- Stephen L Bass
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sticky bit value predicting circuit
- Patent number 6,516,333
- Issue date Feb 4, 2003
- Fujitsu Limited
- Masayuki Tsuji
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rounding denormalized numbers in a pipelined floating point unit wi...
- Patent number 6,490,606
- Issue date Dec 3, 2002
- National Semicondcutor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for handling tiny numbers using a super sticky...
- Patent number 6,374,345
- Issue date Apr 16, 2002
- Advanced Micro Devices, Inc.
- Norbert Juffa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioned shift right logic circuit having rounding support
- Patent number 6,243,728
- Issue date Jun 5, 2001
- Sony Corporation of Japan
- Aamir Alam Farooqui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for compressing signals in a fixed point forma...
- Patent number 6,148,317
- Issue date Nov 14, 2000
- QUALCOMM Incorporated
- Christopher C. Riddle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Normalization shift prediction independent of operand subtraction
- Patent number 6,101,516
- Issue date Aug 8, 2000
- Digital Equipment Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed sticky signal generator
- Patent number 6,057,720
- Issue date May 2, 2000
- Hyundai Electronics Industries Co., Ltd.
- Min Hwahn Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing rounding in a data processor
- Patent number 6,044,392
- Issue date Mar 28, 2000
- Motorola, Inc.
- William Carroll Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of generating the sticky-bit from the input operands
- Patent number 6,044,391
- Issue date Mar 28, 2000
- Sun Microsystems, Inc.
- Chin-Chieh Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Quotient digit selection logic for floating point division/square root
- Patent number 5,954,789
- Issue date Sep 21, 1999
- Sun Microsystems, Inc.
- Robert K. Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point multiplier circuit for generating the sticky-bit fro...
- Patent number 5,944,773
- Issue date Aug 31, 1999
- Sun Microsystems, Inc.
- Chin-Chieh Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating point addition and subtraction arithmetic circuit performi...
- Patent number 5,931,896
- Issue date Aug 3, 1999
- NEC Corporation
- Tadaharu Kawaguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-add unit and data processing apparatus using it
- Patent number 5,889,690
- Issue date Mar 30, 1999
- Hitachi, Ltd.
- Fumio Arakawa
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing high-precision multiply-add cal...
- Patent number 5,880,984
- Issue date Mar 9, 1999
- International Business Machines Corporation
- Steven Michael Burchfiel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Normalization shift prediction independent of operand substraction
- Patent number 5,867,407
- Issue date Feb 2, 1999
- Digital Equipment Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sticky bit detector for a floating-point processor
- Patent number 5,867,722
- Issue date Feb 2, 1999
- United Microelectronics Corporation
- Graham B. Whitted
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic shifter that performs multiply/divide by two to the nth...
- Patent number 5,844,827
- Issue date Dec 1, 1998
- Samsung Electronics Co., Ltd.
- Roney S. Wong
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MULTI-INPUT FLOATING-POINT ADDER
- Publication number 20200371748
- Publication date Nov 26, 2020
- Google LLC
- Hsin-Jung Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR SUBTRACTING SIGNIFICAND VALUES OF FLOATING...
- Publication number 20190121615
- Publication date Apr 25, 2019
- ARM Limited
- David Raymond LUTZ
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING DENORMAL NUMBERS IN FMA HARDWARE
- Publication number 20180095749
- Publication date Apr 5, 2018
- VIA Alliance Semiconductor Co., Ltd.
- THOMAS ELMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC CIRCUIT AND ARITHMETIC METHOD
- Publication number 20140181170
- Publication date Jun 26, 2014
- Kabushiki Kaisha Toshiba
- Koichiro BAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rounding floating point division results
- Publication number 20070162535
- Publication date Jul 12, 2007
- International Business Machines Corporation
- Charles David Wait
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Arithmetic operation unit, information processing apparatus and ari...
- Publication number 20070130242
- Publication date Jun 7, 2007
- FUJITSU LIMITED
- Kunihiko Tajiri
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Using a leading-sign anticipator circuit for detecting sticky-bit i...
- Publication number 20060101108
- Publication date May 11, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for computing alignment sticky bit in floating-po...
- Publication number 20040254971
- Publication date Dec 16, 2004
- STMicroelectronics, Inc.
- Alexander Driker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROUNDING MECHANISMS IN PROCESSORS
- Publication number 20030055860
- Publication date Mar 20, 2003
- JEAN-PIERRE GIACALONE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Shift and detecting circuit and floating-point calculating circuit...
- Publication number 20020078109
- Publication date Jun 20, 2002
- NEC Corporation
- Shoichiro Sato
- G06 - COMPUTING CALCULATING COUNTING

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Multi-input floating-point adder

Apparatus and method for subtracting significand values of floating...

Processing denormal numbers in FMA hardware

Arithmetic circuit and arithmetic method

Data processing apparatus and method for multiplying floating point...

Dual-path fused floating-point two-term dot product unit

Method and system for computing alignment sticky bit in floating-po...

Rounding floating point division results

Arithmetic operation unit, information processing apparatus and ari...

Elimination of end-around-carry critical path in floating point add...

Rounding mechanisms in processors

Rounding denormalized numbers in a pipelined floating point unit wi...

Method for acquiring FMAC rounding parameters

Sticky bit value predicting circuit

Rounding denormalized numbers in a pipelined floating point unit wi...

Apparatus and method for handling tiny numbers using a super sticky...

Partitioned shift right logic circuit having rounding support

Method and apparatus for compressing signals in a fixed point forma...

Normalization shift prediction independent of operand subtraction

High speed sticky signal generator

Method and apparatus for performing rounding in a data processor

Method of generating the sticky-bit from the input operands

Quotient digit selection logic for floating point division/square root

Floating-point multiplier circuit for generating the sticky-bit fro...

Floating point addition and subtraction arithmetic circuit performi...

Multiply-add unit and data processing apparatus using it

Method and apparatus for performing high-precision multiply-add cal...

Normalization shift prediction independent of operand substraction

Sticky bit detector for a floating-point processor

Arithmetic shifter that performs multiply/divide by two to the nth...

Patents Applicationslast 30 patents

MULTI-INPUT FLOATING-POINT ADDER

APPARATUS AND METHOD FOR SUBTRACTING SIGNIFICAND VALUES OF FLOATING...

PROCESSING DENORMAL NUMBERS IN FMA HARDWARE

ARITHMETIC CIRCUIT AND ARITHMETIC METHOD

Rounding floating point division results

Arithmetic operation unit, information processing apparatus and ari...

Using a leading-sign anticipator circuit for detecting sticky-bit i...

Method and system for computing alignment sticky bit in floating-po...

ROUNDING MECHANISMS IN PROCESSORS

Shift and detecting circuit and floating-point calculating circuit...