Synchronisation and timing concerns

Industry

CPC
G06F13/1689

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Current Industry

G06F13/1689Synchronisation and timing concerns

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for facilitating data-driven intelligent network...
- Patent number 12,267,229
- Issue date Apr 1, 2025
- Hewlett Packard Enterprise Development LP
- Abdulla M. Bataineh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating data with stacked memory dies
- Patent number 12,265,489
- Issue date Apr 1, 2025
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test circuit, test method and memory
- Patent number 12,254,941
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jianyong Qin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ticket locks with enhanced waiting
- Patent number 12,254,317
- Issue date Mar 18, 2025
- Oracle International Corporation
- David Dice
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal memory interface utilizing die-to-die (D2D) interfaces be...
- Patent number 12,248,413
- Issue date Mar 11, 2025
- Eliyan Corporation
- Ramin Farjadrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with staggered request signal output
- Patent number 12,249,392
- Issue date Mar 11, 2025
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing on-the-fly reduction in a network
- Patent number 12,244,489
- Issue date Mar 4, 2025
- Hewlett Packard Enterprise Development LP
- Robert Alverson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maintenance operations in a DRAM
- Patent number 12,236,111
- Issue date Feb 25, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of storing instructions in program memory and associated system
- Patent number 12,229,063
- Issue date Feb 18, 2025
- STMicroelectronics (Grenoble 2) SAS
- Jean-Louis Labyre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Erroneous select die access (SDA) detection
- Patent number 12,229,062
- Issue date Feb 18, 2025
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electric device including branched signal lines, and electric devic...
- Patent number 12,229,061
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Kwangsoo Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for input receiver circuits and receiver ma...
- Patent number 12,223,998
- Issue date Feb 11, 2025
- Dean D. Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High capacity, high performance memory system
- Patent number 12,223,209
- Issue date Feb 11, 2025
- RAMBUS INC.
- Frederick Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, system and method to detect and improve an input clock p...
- Patent number 12,217,787
- Issue date Feb 4, 2025
- Intel Corporation
- Arvind A. Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for facilitating efficient packet forwarding in a...
- Patent number 12,218,828
- Issue date Feb 4, 2025
- Hewlett Packard Enterprise Development LP
- Robert Alverson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for facilitating data-driven intelligent network...
- Patent number 12,218,829
- Issue date Feb 4, 2025
- Hewlett Packard Enterprise Development LP
- Jonathan P. Beecroft
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Atomic compare and swap in a coherent cache system
- Patent number 12,216,591
- Issue date Feb 4, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Read arbiter circuit with dual memory rank support
- Patent number 12,216,594
- Issue date Feb 4, 2025
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggressive write flush scheme for a victim cache
- Patent number 12,210,463
- Issue date Jan 28, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory modules and systems with variable-width data ranks and confi...
- Patent number 12,210,467
- Issue date Jan 28, 2025
- RAMBUS INC.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronous electronic circuit devices
- Patent number 12,204,473
- Issue date Jan 21, 2025
- Melexis Technologies SA
- Nicolas Tribie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device related to calibrating a termination resistance
- Patent number 12,198,784
- Issue date Jan 14, 2025
- SK hynix Inc.
- Jung Taek You
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to reduce bank pressure using aggressive writ...
- Patent number 12,197,347
- Issue date Jan 14, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods including memory commands for semiconductor...
- Patent number 12,197,355
- Issue date Jan 14, 2025
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test, development and deployment infrastructure for spacecube high-...
- Patent number 12,197,373
- Issue date Jan 14, 2025
- UNITED STATES OF AMERICA AS REPRESENTED BY THE ADMINISTRATOR OF NASA.
- Alessandro Geist
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Collection of runtime information for debug and analysis, including...
- Patent number 12,197,356
- Issue date Jan 14, 2025
- Beijing Tenafe Electronic Technology Co., Ltd.
- Meng Kun Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Page-based remote memory access using system memory interface netwo...
- Patent number 12,192,023
- Issue date Jan 7, 2025
- Intel Corporation
- Sujoy Sen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple register clock driver loaded memory subsystem
- Patent number 12,189,996
- Issue date Jan 7, 2025
- Micron Technology, Inc.
- Matthew B. Leslie
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20250111873
- Publication date Apr 3, 2025
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-ON-CHIP DRIVEN BY CLOCK SIGNALS HAVING DIFFERENT FREQUENCIES
- Publication number 20250103521
- Publication date Mar 27, 2025
- SK HYNIX INC.
- Jae Min HYUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...
- Publication number 20250103523
- Publication date Mar 27, 2025
- Lodestar Licensing Group LLP
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THERMAL MITIGATION FOR SOC USING MEMORY ACCESS LATENCY
- Publication number 20250103522
- Publication date Mar 27, 2025
- QUALCOMM Incorporated
- Hithesh Hassan LEPAKSHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-BANK MEMORY THAT SUPPORTS MULTIPLE READS AND MULTIPLE WRITES...
- Publication number 20250094367
- Publication date Mar 20, 2025
- MARVELL ISRAEL (M.I.S.L) LTD.
- Noam ESHEL-GOLDMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP
- Publication number 20250095703
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Shinya KOIZUMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Page Status Management Method and Related Device
- Publication number 20250094366
- Publication date Mar 20, 2025
- Huawei Technologies Co., Ltd
- Zhenjun Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK ACCELERATOR WITH MEMORY HAVING BANK-SPECIFIC CLOCK D...
- Publication number 20250086125
- Publication date Mar 13, 2025
- Intel Corporation
- Robert Cezary Zaglewski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR EXTENDING SDXI TO INCLUDE IP ADDRESSES
- Publication number 20250086129
- Publication date Mar 13, 2025
- Dell Products L.P.
- Shyamkumar T Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ACCESS STATISTICS MONITORING
- Publication number 20250077411
- Publication date Mar 6, 2025
- Micron Technology, Inc.
- David A. Roberts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MEMORY SIGNAL TIMING CALIBRATION
- Publication number 20250077448
- Publication date Mar 6, 2025
- Samsung Electronics Co., Ltd.
- Joung Won PARK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR BALANCING MEMORY SPEEDS
- Publication number 20250077447
- Publication date Mar 6, 2025
- SMART Modular Technologies, Inc.
- Torry Steed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENCY MODE IN A MEMORY SYSTEM
- Publication number 20250068574
- Publication date Feb 27, 2025
- QUALCOMM Incorporated
- Jungwon Suh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INITIALIZING MEMORY SYSTEMS
- Publication number 20250068346
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Erik V. Pohlmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER WITH PSEUDO-CHANNEL SUPPORT
- Publication number 20250061071
- Publication date Feb 20, 2025
- ADVANCED MICRO DEVICES, INC.
- Hideki Kanayama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TIMING-DRIFT CALIBRATION
- Publication number 20250054561
- Publication date Feb 13, 2025
- Rambus Inc.
- Yohan U. Frans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Generation for Timing Communications with Ranks of Memory Dev...
- Publication number 20250053524
- Publication date Feb 13, 2025
- Rambus Inc.
- Jared L. Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR CONTROLLING A TARGET MEMORY BY PROGRAMMABLY SELECTING AN...
- Publication number 20250045220
- Publication date Feb 6, 2025
- Beijing Tenafe Electronic Technology Co., Ltd.
- Zhikai Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...
- Publication number 20250036573
- Publication date Jan 30, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE-CONFIGURABLE PROCESSOR DEVICE
- Publication number 20250036578
- Publication date Jan 30, 2025
- Daniel Christian Biederman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
USING DYNAMIC BURSTS TO SUPPORT FREQUENCY-AGILE MEMORY INTERFACES
- Publication number 20250036187
- Publication date Jan 30, 2025
- Rambus Inc.
- Jared L. Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, METHOD, DEVICE, PROCESSOR, AND STORAGE MEDIUM THEREOF FOR I...
- Publication number 20250028663
- Publication date Jan 23, 2025
- Transcom (Shanghai) Technology Co., Ltd.
- Guangxing LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR FACILITATING EFFICIENT LOAD BALANCING IN A NE...
- Publication number 20250030627
- Publication date Jan 23, 2025
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- David Charles Hewson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES
- Publication number 20250028652
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE
- Publication number 20250028651
- Publication date Jan 23, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AREA EFFICIENT ASYNCHRONOUS FIRST-IN-FIRST-OUT (FIFO) BUFFER FOR HI...
- Publication number 20250021498
- Publication date Jan 16, 2025
- QUALCOMM Incorporated
- Eric Wayne MAHURIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...
- Publication number 20240419607
- Publication date Dec 19, 2024
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND MEMORY COMMUNICATION IN A STACKED MEMORY SYSTEM
- Publication number 20240411709
- Publication date Dec 12, 2024
- NVIDIA Corporation
- William James Dally
- G06 - COMPUTING CALCULATING COUNTING

Synchronisation and timing concerns

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Hybrid victim cache and write miss buffer with fence operation

System and method for facilitating data-driven intelligent network...

Communicating data with stacked memory dies

Methods and apparatus for multi-banked victim cache with dual datapath

Test circuit, test method and memory

Ticket locks with enhanced waiting

Universal memory interface utilizing die-to-die (D2D) interfaces be...

Memory controller with staggered request signal output

System and method for performing on-the-fly reduction in a network

Maintenance operations in a DRAM

Method of storing instructions in program memory and associated system

Erroneous select die access (SDA) detection

Electric device including branched signal lines, and electric devic...

Apparatuses and methods for input receiver circuits and receiver ma...

High capacity, high performance memory system

Apparatus, system and method to detect and improve an input clock p...

System and method for facilitating efficient packet forwarding in a...

System and method for facilitating data-driven intelligent network...

Atomic compare and swap in a coherent cache system

Read arbiter circuit with dual memory rank support

Aggressive write flush scheme for a victim cache

Memory modules and systems with variable-width data ranks and confi...

Synchronous electronic circuit devices

Semiconductor device related to calibrating a termination resistance

Methods and apparatus to reduce bank pressure using aggressive writ...

Apparatuses and methods including memory commands for semiconductor...

Test, development and deployment infrastructure for spacecube high-...

Collection of runtime information for debug and analysis, including...

Page-based remote memory access using system memory interface netwo...

Multiple register clock driver loaded memory subsystem

Patents Applicationslast 30 patents

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

SYSTEM-ON-CHIP DRIVEN BY CLOCK SIGNALS HAVING DIFFERENT FREQUENCIES

APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...

THERMAL MITIGATION FOR SOC USING MEMORY ACCESS LATENCY

MULTI-BANK MEMORY THAT SUPPORTS MULTIPLE READS AND MULTIPLE WRITES...

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP

Page Status Management Method and Related Device

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

NEURAL NETWORK ACCELERATOR WITH MEMORY HAVING BANK-SPECIFIC CLOCK D...

METHOD AND SYSTEM FOR EXTENDING SDXI TO INCLUDE IP ADDRESSES

MEMORY ACCESS STATISTICS MONITORING

SYSTEM AND METHOD FOR MEMORY SIGNAL TIMING CALIBRATION

SYSTEMS AND METHODS FOR BALANCING MEMORY SPEEDS

EFFICIENCY MODE IN A MEMORY SYSTEM

INITIALIZING MEMORY SYSTEMS

MEMORY CONTROLLER WITH PSEUDO-CHANNEL SUPPORT

TIMING-DRIFT CALIBRATION

Clock Generation for Timing Communications with Ranks of Memory Dev...

METHOD FOR CONTROLLING A TARGET MEMORY BY PROGRAMMABLY SELECTING AN...

METHODS AND APPARATUS FOR READ-MODIFY-WRITE SUPPORT IN MULTI-BANKED...

SOFTWARE-CONFIGURABLE PROCESSOR DEVICE

USING DYNAMIC BURSTS TO SUPPORT FREQUENCY-AGILE MEMORY INTERFACES

SYSTEM, METHOD, DEVICE, PROCESSOR, AND STORAGE MEDIUM THEREOF FOR I...

SYSTEM AND METHOD FOR FACILITATING EFFICIENT LOAD BALANCING IN A NE...

VICTIM CACHE WITH DYNAMIC ALLOCATION OF ENTRIES

ATOMIC OPERATIONS AND HISTOGRAM OPERATIONS IN A CACHE PIPELINE

AREA EFFICIENT ASYNCHRONOUS FIRST-IN-FIRST-OUT (FIFO) BUFFER FOR HI...

METHODS AND APPARATUS FOR EVICTION IN DUAL DATAPATH VICTIM CACHE SY...

PROCESSOR AND MEMORY COMMUNICATION IN A STACKED MEMORY SYSTEM