Synchronisation and timing concerns

Industry

CPC
G06F13/1689

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Current Industry

G06F13/1689Synchronisation and timing concerns

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Methods and apparatus to facilitate atomic operations in victim cache
- Patent number 12,321,284
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller for a memory device
- Patent number 12,321,190
- Issue date Jun 3, 2025
- Samsung Electronics Co., Ltd.
- Choongeui Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric read-write sequence for interconnected dies
- Patent number 12,321,288
- Issue date Jun 3, 2025
- Micron Technology, Inc.
- Hyun Yoo Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller, system, and method of scheduling memory access e...
- Patent number 12,321,291
- Issue date Jun 3, 2025
- Samsung Electronics Co., Ltd.
- Jaehwan Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Victim cache with write miss merging
- Patent number 12,321,285
- Issue date Jun 3, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FIFO memory system and FIFO memory control method
- Patent number 12,314,197
- Issue date May 27, 2025
- BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.
- Xiangye Wei
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller operable in data loop-back mode
- Patent number 12,314,113
- Issue date May 27, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electronic system and method for controlling burst length to access...
- Patent number 12,307,095
- Issue date May 20, 2025
- Mediatek Inc.
- Bo-Wei Hsieh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for extending SDXI to include IP addresses
- Patent number 12,306,778
- Issue date May 20, 2025
- Dell Products L.P.
- Shyamkumar T Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for facilitating self-managing reduction engines
- Patent number 12,301,450
- Issue date May 13, 2025
- Hewlett Packard Enterprise Development LP
- Jonathan P. Beecroft
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device and memory system
- Patent number 12,300,353
- Issue date May 13, 2025
- Samsung Electronics Co., Ltd.
- Seung-Jun Shin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write merging on stores with different privilege levels
- Patent number 12,292,839
- Issue date May 6, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for facilitating operation management in a networ...
- Patent number 12,294,514
- Issue date May 6, 2025
- Hewlett Packard Enterprise Development LP
- Duncan Roweth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternative protocol over physical layer
- Patent number 12,287,753
- Issue date Apr 29, 2025
- ATI Technologies ULC
- Gordon Caruk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Setting module and setting method thereof for synchronous dynamic r...
- Patent number 12,288,597
- Issue date Apr 29, 2025
- Realtek Semiconductor Corporation
- Ya-Min Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid victim cache and write miss buffer with fence operation
- Patent number 12,265,477
- Issue date Apr 1, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for facilitating data-driven intelligent network...
- Patent number 12,267,229
- Issue date Apr 1, 2025
- Hewlett Packard Enterprise Development LP
- Abdulla M. Bataineh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating data with stacked memory dies
- Patent number 12,265,489
- Issue date Apr 1, 2025
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for multi-banked victim cache with dual datapath
- Patent number 12,259,826
- Issue date Mar 25, 2025
- Texas Instruments Incorporated
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Test circuit, test method and memory
- Patent number 12,254,941
- Issue date Mar 18, 2025
- CHANGXIN MEMORY TECHNOLOGIES, INC.
- Jianyong Qin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ticket locks with enhanced waiting
- Patent number 12,254,317
- Issue date Mar 18, 2025
- Oracle International Corporation
- David Dice
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller with staggered request signal output
- Patent number 12,249,392
- Issue date Mar 11, 2025
- RAMBUS INC.
- Ian P. Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal memory interface utilizing die-to-die (D2D) interfaces be...
- Patent number 12,248,413
- Issue date Mar 11, 2025
- Eliyan Corporation
- Ramin Farjadrad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing on-the-fly reduction in a network
- Patent number 12,244,489
- Issue date Mar 4, 2025
- Hewlett Packard Enterprise Development LP
- Robert Alverson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Maintenance operations in a DRAM
- Patent number 12,236,111
- Issue date Feb 25, 2025
- RAMBUS INC.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of storing instructions in program memory and associated system
- Patent number 12,229,063
- Issue date Feb 18, 2025
- STMicroelectronics (Grenoble 2) SAS
- Jean-Louis Labyre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Erroneous select die access (SDA) detection
- Patent number 12,229,062
- Issue date Feb 18, 2025
- Micron Technology, Inc.
- Yang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electric device including branched signal lines, and electric devic...
- Patent number 12,229,061
- Issue date Feb 18, 2025
- Samsung Electronics Co., Ltd.
- Kwangsoo Park
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for input receiver circuits and receiver ma...
- Patent number 12,223,998
- Issue date Feb 11, 2025
- Dean D. Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High capacity, high performance memory system
- Patent number 12,223,209
- Issue date Feb 11, 2025
- RAMBUS INC.
- Frederick Ware
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory Modules and Systems with Variable-Width Data Ranks and Confi...
- Publication number 20250181531
- Publication date Jun 5, 2025
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CORE INCLUDING INTEGRATED HIGH CAPACITY HIGH BANDWIDTH S...
- Publication number 20250173297
- Publication date May 29, 2025
- Western Digital Technologies, Inc.
- Nagesh Vodrahalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATING DATA WITH STACKED MEMORY DIES
- Publication number 20250165413
- Publication date May 22, 2025
- Lodestar Licensing Group LLC
- Robert Nasry Hasbun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS FIFO READ/WRITE CONTROL METHOD AND SYSTEM, AND ELECTRO...
- Publication number 20250165412
- Publication date May 22, 2025
- IEIT SYSTEMS CO., LTD.
- Wei LIU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM
- Publication number 20250156349
- Publication date May 15, 2025
- INVENTEC (PUDONG) TECHNOLOGY CORPORATION
- Liang-Hsi CHIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROTOCOL INCLUDING TIMING CALIBRATION BETWEEN MEMORY REQUEST AND DA...
- Publication number 20250156350
- Publication date May 15, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOSED-LOOP TIMING CONTROL USING ACTIVE RE-TRAINING ENGINES IN MEMO...
- Publication number 20250147906
- Publication date May 8, 2025
- SK Hynix NAND Product Solutions Corp. (dba Solidingm)
- Jorge MARTINEZ ARAIZA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Read Arbiter Circuit with Dual Memory Rank Support
- Publication number 20250147901
- Publication date May 8, 2025
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PAGE DETECTION USING RECENCY SCORE FILTERS
- Publication number 20250147904
- Publication date May 8, 2025
- Rambus Inc.
- Taeksang Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLEXED BUS STREAK MANAGEMENT
- Publication number 20250139022
- Publication date May 1, 2025
- ADVANCED MICRO DEVICES, INC.
- Kedarnath Balakrishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOST MULTI-PATH LAYER WITH CONGESTION MITIGATION THROUGH INTERACTIO...
- Publication number 20250139028
- Publication date May 1, 2025
- Dell Products L.P.
- James R. Salvadore
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE
- Publication number 20250139019
- Publication date May 1, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen BHORIA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OFF-MODULE DATA BUFFER
- Publication number 20250139029
- Publication date May 1, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINISTIC OPERATION OF STORAGE CLASS MEMORY
- Publication number 20250139030
- Publication date May 1, 2025
- Rambus Inc.
- Frederick A. Ware
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR INPUT RECEIVER CIRCUITS AND RECEIVER MA...
- Publication number 20250140305
- Publication date May 1, 2025
- Lodestar Licensing Group LLC
- Dean D. Gans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR FACILITATING DATA-DRIVEN INTELLIGENT NETWORK...
- Publication number 20250126056
- Publication date Apr 17, 2025
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- Jonathan P. Beecroft
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR FACILITATING EFFICIENT PACKET FORWARDING IN A...
- Publication number 20250126055
- Publication date Apr 17, 2025
- HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP.
- Robert Alverson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM
- Publication number 20250117340
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM
- Publication number 20250117341
- Publication date Apr 10, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH SIGNALED COMMAND/ADDRESS INVERSION
- Publication number 20250117344
- Publication date Apr 10, 2025
- Micron Technology, Inc.
- Keun-Soo Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM
- Publication number 20250111873
- Publication date Apr 3, 2025
- Rambus Inc.
- Thomas J. Giovannini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM-ON-CHIP DRIVEN BY CLOCK SIGNALS HAVING DIFFERENT FREQUENCIES
- Publication number 20250103521
- Publication date Mar 27, 2025
- SK HYNIX INC.
- Jae Min HYUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...
- Publication number 20250103523
- Publication date Mar 27, 2025
- Lodestar Licensing Group LLP
- Kang-Yong Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THERMAL MITIGATION FOR SOC USING MEMORY ACCESS LATENCY
- Publication number 20250103522
- Publication date Mar 27, 2025
- QUALCOMM Incorporated
- Hithesh Hassan LEPAKSHA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-BANK MEMORY THAT SUPPORTS MULTIPLE READS AND MULTIPLE WRITES...
- Publication number 20250094367
- Publication date Mar 20, 2025
- MARVELL ISRAEL (M.I.S.L) LTD.
- Noam ESHEL-GOLDMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY PIPELINED READ-MODIFY-WRITE SUPPORT
- Publication number 20250094359
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP
- Publication number 20250095703
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Shinya KOIZUMI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Page Status Management Method and Related Device
- Publication number 20250094366
- Publication date Mar 20, 2025
- Huawei Technologies Co., Ltd
- Zhenjun Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...
- Publication number 20250094358
- Publication date Mar 20, 2025
- TEXAS INSTRUMENTS INCORPORATED
- Naveen Bhoria
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK ACCELERATOR WITH MEMORY HAVING BANK-SPECIFIC CLOCK D...
- Publication number 20250086125
- Publication date Mar 13, 2025
- Intel Corporation
- Robert Cezary Zaglewski
- G06 - COMPUTING CALCULATING COUNTING

Synchronisation and timing concerns

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Methods and apparatus to facilitate atomic operations in victim cache

Memory controller for a memory device

Asymmetric read-write sequence for interconnected dies

Memory controller, system, and method of scheduling memory access e...

Victim cache with write miss merging

FIFO memory system and FIFO memory control method

Memory controller operable in data loop-back mode

Electronic system and method for controlling burst length to access...

Method and system for extending SDXI to include IP addresses

System and method for facilitating self-managing reduction engines

Memory device and memory system

Write merging on stores with different privilege levels

System and method for facilitating operation management in a networ...

Alternative protocol over physical layer

Setting module and setting method thereof for synchronous dynamic r...

Hybrid victim cache and write miss buffer with fence operation

System and method for facilitating data-driven intelligent network...

Communicating data with stacked memory dies

Methods and apparatus for multi-banked victim cache with dual datapath

Test circuit, test method and memory

Ticket locks with enhanced waiting

Memory controller with staggered request signal output

Universal memory interface utilizing die-to-die (D2D) interfaces be...

System and method for performing on-the-fly reduction in a network

Maintenance operations in a DRAM

Method of storing instructions in program memory and associated system

Erroneous select die access (SDA) detection

Electric device including branched signal lines, and electric devic...

Apparatuses and methods for input receiver circuits and receiver ma...

High capacity, high performance memory system

Patents Applicationslast 30 patents

Memory Modules and Systems with Variable-Width Data Ranks and Confi...

PROCESSING CORE INCLUDING INTEGRATED HIGH CAPACITY HIGH BANDWIDTH S...

COMMUNICATING DATA WITH STACKED MEMORY DIES

ASYNCHRONOUS FIFO READ/WRITE CONTROL METHOD AND SYSTEM, AND ELECTRO...

MEMORY SYSTEM

PROTOCOL INCLUDING TIMING CALIBRATION BETWEEN MEMORY REQUEST AND DA...

CLOSED-LOOP TIMING CONTROL USING ACTIVE RE-TRAINING ENGINES IN MEMO...

Read Arbiter Circuit with Dual Memory Rank Support

PAGE DETECTION USING RECENCY SCORE FILTERS

MULTIPLEXED BUS STREAK MANAGEMENT

HOST MULTI-PATH LAYER WITH CONGESTION MITIGATION THROUGH INTERACTIO...

AGGRESSIVE WRITE FLUSH SCHEME FOR A VICTIM CACHE

OFF-MODULE DATA BUFFER

DETERMINISTIC OPERATION OF STORAGE CLASS MEMORY

APPARATUSES AND METHODS FOR INPUT RECEIVER CIRCUITS AND RECEIVER MA...

SYSTEM AND METHOD FOR FACILITATING DATA-DRIVEN INTELLIGENT NETWORK...

SYSTEM AND METHOD FOR FACILITATING EFFICIENT PACKET FORWARDING IN A...

ATOMIC COMPARE AND SWAP IN A COHERENT CACHE SYSTEM

METHODS AND APPARATUS FOR ALLOCATION IN A VICTIM CACHE SYSTEM

SEMICONDUCTOR MEMORY DEVICE WITH SIGNALED COMMAND/ADDRESS INVERSION

METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM

SYSTEM-ON-CHIP DRIVEN BY CLOCK SIGNALS HAVING DIFFERENT FREQUENCIES

APPARATUSES AND METHODS INCLUDING MEMORY COMMANDS FOR SEMICONDUCTOR...

THERMAL MITIGATION FOR SOC USING MEMORY ACCESS LATENCY

MULTI-BANK MEMORY THAT SUPPORTS MULTIPLE READS AND MULTIPLE WRITES...

FULLY PIPELINED READ-MODIFY-WRITE SUPPORT

MEMORY SYSTEM AND METHOD OF CONTROLLING A MEMORY CHIP

Page Status Management Method and Related Device

METHODS AND APPARATUS TO REDUCE BANK PRESSURE USING AGGRESSIVE WRIT...

NEURAL NETWORK ACCELERATOR WITH MEMORY HAVING BANK-SPECIFIC CLOCK D...