Systolic array

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CPC
G06F2207/3892

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/3892Systolic array

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Patents Grantslast 30 patents

Information Patent Grant
Calculation circuit and deep learning system including the same
- Patent number 12,141,545
- Issue date Nov 12, 2024
- SK Hynix Inc.
- Ji Hoon Nam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse matrix multiplication acceleration mechanism
- Patent number 12,008,067
- Issue date Jun 11, 2024
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-size- and bandwidth-efficient method for feeding systolic ar...
- Patent number 11,328,037
- Issue date May 10, 2022
- Intel Corporation
- Jack Z. Yinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sparse matrix multiplication acceleration mechanism
- Patent number 11,188,618
- Issue date Nov 30, 2021
- Intel Corporation
- Subramaniam Maiyuran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware accelerator for systolic matrix multiplication
- Patent number 10,915,297
- Issue date Feb 9, 2021
- Habana Labs Ltd.
- Ran Halutz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 10,417,004
- Issue date Sep 17, 2019
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cascaded digital signal processing structures and methods
- Patent number 9,747,110
- Issue date Aug 29, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication of matrices using systolic arrays
- Patent number 8,924,455
- Issue date Dec 30, 2014
- Xilinx, Inc.
- Kaushik Barman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for performing arithmetic operations with single...
- Patent number 5,787,025
- Issue date Jul 28, 1998
- Atmel Corporation
- Jumana A. Muwafi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for multiplying long integers
- Patent number 5,524,090
- Issue date Jun 4, 1996
- Canon Kabushiki Kaisha
- Keiichi Iwamura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital processor for two's complement computations
- Patent number 5,235,537
- Issue date Aug 10, 1993
- The Secretary of State for Defence in Her Britannic Majesty's Government of t...
- John G. McWhirter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic array processing apparatus
- Patent number 4,962,381
- Issue date Oct 9, 1990
- General Electric Company
- Walter A. Helbig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Floating-point systolic array including serial processors
- Patent number 4,872,133
- Issue date Oct 3, 1989
- Motorola, Inc.
- Steven B. Leeland
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systolic super summation device
- Patent number 4,751,665
- Issue date Jun 14, 1988
- International Business Machines Corporation
- Peter R. Cappello
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital data processor incorporating an orthogonally connected logi...
- Patent number 4,639,857
- Issue date Jan 27, 1987
- The Secretary of State for Defence in Her Britannic Majesty's Government of t...
- John V. McCanny
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple processing cell digital data processor
- Patent number 4,533,993
- Issue date Aug 6, 1985
- National Research Development Corp.
- John V. McCanny
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Ar...
- Publication number 20230359695
- Publication date Nov 9, 2023
- Intel Corporation
- Jack Z. Yinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Ar...
- Publication number 20230064381
- Publication date Mar 2, 2023
- Intel Corporation
- Jack Z. Yinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE MATRIX MULTIPLICATION ACCELERATION MECHANISM
- Publication number 20220171827
- Publication date Jun 2, 2022
- Intel Corporation
- SUBRAMANIAM MAIYURAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTOLIC ARRAY CELLS WITH MULTIPLE ACCUMULATORS
- Publication number 20220171605
- Publication date Jun 2, 2022
- Google LLC
- Jeremiah Willcock
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE MATRIX MULTIPLICATION ACCELERATION MECHANISM
- Publication number 20210073318
- Publication date Mar 11, 2021
- Intel Corporation
- SUBRAMANIAM MAIYURAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Ar...
- Publication number 20190012295
- Publication date Jan 10, 2019
- Intel Corporation
- Jack Z. Yinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS
- Publication number 20170322813
- Publication date Nov 9, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low complexity bit-parallel systolic architecture for computing C+A...
- Publication number 20060106908
- Publication date May 18, 2006
- Chang Gung University
- Yeun-Renn Ting
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systolic high radix modular multiplier
- Publication number 20040010530
- Publication date Jan 15, 2004
- William L. Freking
- G06 - COMPUTING CALCULATING COUNTING

Systolic array

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Calculation circuit and deep learning system including the same

Sparse matrix multiplication acceleration mechanism

Memory-size- and bandwidth-efficient method for feeding systolic ar...

Sparse matrix multiplication acceleration mechanism

Hardware accelerator for systolic matrix multiplication

Pipelined cascaded digital signal processing structures and methods

Pipelined cascaded digital signal processing structures and methods

Multiplication of matrices using systolic arrays

Method and system for performing arithmetic operations with single...

Apparatus for multiplying long integers

Digital processor for two's complement computations

Systolic array processing apparatus

Floating-point systolic array including serial processors

Systolic super summation device

Digital data processor incorporating an orthogonally connected logi...

Multiple processing cell digital data processor

Patents Applicationslast 30 patents

Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Ar...

Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Ar...

SPARSE MATRIX MULTIPLICATION ACCELERATION MECHANISM

SYSTOLIC ARRAY CELLS WITH MULTIPLE ACCUMULATORS

SPARSE MATRIX MULTIPLICATION ACCELERATION MECHANISM

Memory-Size- and Bandwidth-Efficient Method for Feeding Systolic Ar...

PIPELINED CASCADED DIGITAL SIGNAL PROCESSING STRUCTURES AND METHODS

Low complexity bit-parallel systolic architecture for computing C+A...

Systolic high radix modular multiplier