Three dimensional array

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G11C2213/71

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GPHYSICS G11Information storage G11CSTATIC STORES G11C2213/00Indexing scheme relating to G11C13/00 for features not covered by this group

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G11C2213/71Three dimensional array

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Crossbar array with reduced disturbance
- Patent number 12,198,761
- Issue date Jan 14, 2025
- TetraMem Inc.
- Ning Ge
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with a three-dimensional stacked memory...
- Patent number 12,185,538
- Issue date Dec 31, 2024
- Kioxia Corporation
- Tomoo Hishida
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Split pillar architectures for memory devices
- Patent number 12,178,054
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device with a split pillar architecture
- Patent number 12,171,105
- Issue date Dec 17, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 12,159,666
- Issue date Dec 3, 2024
- Samsung Electronics Co., Ltd.
- Sungkyu Jo
- G11 - INFORMATION STORAGE
Information Patent Grant
Technologies for controlling current through memory cells
- Patent number 12,154,623
- Issue date Nov 26, 2024
- Intel Corporation
- Noble Narku-Tetteh
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array having air gaps
- Patent number 12,156,411
- Issue date Nov 26, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional stacked semiconductor memory
- Patent number 12,144,189
- Issue date Nov 12, 2024
- Kioxia Corporation
- Hidehiro Shiga
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple transistor architecture for three-dimensional memory arrays
- Patent number 12,119,056
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Grant
NAND flash memory with vertical cell stack structure and method for...
- Patent number 12,119,411
- Issue date Oct 15, 2024
- Mosaid Technologies Incorporated
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device architecture
- Patent number 12,119,055
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-selecting memory array with horizontal access lines
- Patent number 12,100,447
- Issue date Sep 24, 2024
- Micron Technology, Inc.
- Lorenzo Fratin
- G11 - INFORMATION STORAGE
Information Patent Grant
3D semiconductor device and structure with metal layers and memory...
- Patent number 12,094,965
- Issue date Sep 17, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device and operating method thereof
- Patent number 12,087,361
- Issue date Sep 10, 2024
- Samsung Electronics Co., Ltd.
- Bilal Ahmad Janjua
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device including a plurality of stacked memory cells
- Patent number 12,080,345
- Issue date Sep 3, 2024
- SK hynix Inc.
- Dong Keun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable resistivity for lines in a memory device
- Patent number 12,040,014
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Koushik Banerjee
- G11 - INFORMATION STORAGE
Information Patent Grant
Auto-referenced memory cell read techniques
- Patent number 12,009,028
- Issue date Jun 11, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Grant
Electron beam probing techniques and related structures
- Patent number 11,996,336
- Issue date May 28, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for reading cross point-type memory array including two-term...
- Patent number 11,996,146
- Issue date May 28, 2024
- Jun-sung Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Three-dimensional convolution operation device and method based on...
- Patent number 11,989,644
- Issue date May 21, 2024
- Huazhong University of Science & Technology
- Hao Tong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resistive random access memory device with three-dimensional cross-...
- Patent number 11,972,796
- Issue date Apr 30, 2024
- Kioxia Corporation
- Kikuko Sugimae
- G11 - INFORMATION STORAGE
Information Patent Grant
Shared decoder architecture for three-dimensional memory arrays
- Patent number 11,967,372
- Issue date Apr 23, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G11 - INFORMATION STORAGE
Information Patent Grant
Architecture for multideck memory arrays
- Patent number 11,963,370
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Riccardo Muzzetto
- G11 - INFORMATION STORAGE
Information Patent Grant
Socket design for a memory device
- Patent number 11,961,556
- Issue date Apr 16, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Grant
Resistive memory device and operating method of the resistive memor...
- Patent number 11,948,633
- Issue date Apr 2, 2024
- SK hynix Inc.
- Jae Hyun Han
- G11 - INFORMATION STORAGE
Information Patent Grant
Signal timing alignment based on a common data strobe in memory dev...
- Patent number 11,935,578
- Issue date Mar 19, 2024
- III Holdings 2, LLC
- Michael C. Stephens
- G11 - INFORMATION STORAGE
Information Patent Grant
3D semiconductor device and structure with metal layers and memory...
- Patent number 11,935,949
- Issue date Mar 19, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor storage device and controller
- Patent number 11,923,012
- Issue date Mar 5, 2024
- Kioxia Corporation
- Hiroshi Maejima
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Stack of horizontally extending and vertically overlapping features...
- Patent number 11,923,289
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Sanh D. Tang
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device with three-dimensional memory cells
- Patent number 11,917,826
- Issue date Feb 27, 2024
- Kioxia Corporation
- Fumihiro Kono
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
AUTO-REFERENCED MEMORY CELL READ TECHNIQUES
- Publication number 20240386956
- Publication date Nov 21, 2024
- Micron Technology, Inc.
- Graziano Mirichigni
- G11 - INFORMATION STORAGE
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A POWER...
- Publication number 20240379837
- Publication date Nov 14, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE
- Publication number 20240379157
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Koushik Banerjee
- G11 - INFORMATION STORAGE
Information Patent Application
ELECTRON BEAM PROBING TECHNIQUES AND RELATED STRUCTURES
- Publication number 20240355685
- Publication date Oct 24, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Application
SOCKET DESIGN FOR A MEMORY DEVICE
- Publication number 20240347107
- Publication date Oct 17, 2024
- Micron Technology, Inc.
- Amitava Majumdar
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20240321349
- Publication date Sep 26, 2024
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G11 - INFORMATION STORAGE
Information Patent Application
SIGNAL TIMING ALIGNMENT BASED ON A COMMON DATA STROBE IN MEMORY DEV...
- Publication number 20240265961
- Publication date Aug 8, 2024
- III Holdings 2, LLC
- Michael C. Stephens
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS
- Publication number 20240268127
- Publication date Aug 8, 2024
- Micron Technology, Inc.
- Agostino Pirovano
- G11 - INFORMATION STORAGE
Information Patent Application
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...
- Publication number 20240250163
- Publication date Jul 25, 2024
- Monolithic 3D Inc.
- Zvi Or-Bach
- G11 - INFORMATION STORAGE
Information Patent Application
ARCHITECTURE FOR MULTIDECK MEMORY ARRAYS
- Publication number 20240237360
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Riccardo Muzzetto
- G11 - INFORMATION STORAGE
Information Patent Application
IMPROVED VERTICAL 3D MEMORY DEVICE AND ACCESSING METHOD
- Publication number 20240237358
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
LOW RESISTANCE CROSSPOINT ARCHITECTURE
- Publication number 20240224825
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Rajasekhar Venigalla
- G11 - INFORMATION STORAGE
Information Patent Application
CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS
- Publication number 20240221829
- Publication date Jul 4, 2024
- Micron Technology, Inc.
- Innocenzo Tortorelli
- G11 - INFORMATION STORAGE
Information Patent Application
Stack of Horizontally Extending and Vertically Overlapping Features...
- Publication number 20240186234
- Publication date Jun 6, 2024
- Micron Technology, Inc.
- Sanh D. Tang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR STORAGE DEVICE AND CONTROLLER
- Publication number 20240177774
- Publication date May 30, 2024
- KIOXIA Corporation
- Hiroshi MAEJIMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE WITH THREE-DIMENSIONAL MEMORY CELLS
- Publication number 20240172442
- Publication date May 23, 2024
- KIOXIA Corporation
- Fumihiro KONO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE-STATE PROGRAMMING OF MEMORY CELLS
- Publication number 20240120006
- Publication date Apr 11, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
EXTENDED MEMORY COMMUNICATION
- Publication number 20240105260
- Publication date Mar 28, 2024
- Lodestar Licensing Group LLC
- Vijay S. Ramesh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME
- Publication number 20240065000
- Publication date Feb 22, 2024
- Samsung Electronics Co., Ltd.
- Yumin Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20230422640
- Publication date Dec 28, 2023
- KIOXIA Corporation
- Kenichi MUROOKA
- G11 - INFORMATION STORAGE
Information Patent Application
RESISTIVE MEMORY DEVICE
- Publication number 20230397443
- Publication date Dec 7, 2023
- Samsung Electronics Co., Ltd.
- Min Jun LEE
- G11 - INFORMATION STORAGE
Information Patent Application
FORWARD-LOOKING DETERMINATION OF READ VOLTAGE USING MEMORY CELL PAT...
- Publication number 20230395147
- Publication date Dec 7, 2023
- Micron Technology, Inc.
- Umberto di Vincenzo
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL SUBTHRESHOLD READ OF MEMORY CELL PAIR IN A MEMORY DEVICE
- Publication number 20230377646
- Publication date Nov 23, 2023
- Micron Technology, Inc.
- Umberto di Vincenzo
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY HAVING AIR GAPS
- Publication number 20230337441
- Publication date Oct 19, 2023
- Micron Technology, Inc.
- Paolo Fantini
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE TRANSISTOR ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230307042
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G11 - INFORMATION STORAGE
Information Patent Application
SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS
- Publication number 20230307041
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Christophe Vincent Antoine Laurent
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20230301118
- Publication date Sep 21, 2023
- Kioxia Corporation
- Katsuyoshi KOMATSU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
THREE DIMENSIONAL STACKED SEMICONDUCTOR MEMORY
- Publication number 20230284464
- Publication date Sep 7, 2023
- KIOXIA Corporation
- Hidehiro SHIGA
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE RESISTANCE NON-VOLATILE MEMORY
- Publication number 20230284460
- Publication date Sep 7, 2023
- KIOXIA Corporation
- Tomoki CHIBA
- G11 - INFORMATION STORAGE
Information Patent Application
NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...
- Publication number 20230268447
- Publication date Aug 24, 2023
- MOSAID TECHNOLOGIES INCORPORATED
- Hyoung Seub Rhie
- G11 - INFORMATION STORAGE

Three dimensional array

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Crossbar array with reduced disturbance

Semiconductor memory device with a three-dimensional stacked memory...

Split pillar architectures for memory devices

Memory device with a split pillar architecture

Memory device

Technologies for controlling current through memory cells

Memory array having air gaps

Three dimensional stacked semiconductor memory

Multiple transistor architecture for three-dimensional memory arrays

NAND flash memory with vertical cell stack structure and method for...

Memory device architecture

Self-selecting memory array with horizontal access lines

3D semiconductor device and structure with metal layers and memory...

Memory device and operating method thereof

Memory device including a plurality of stacked memory cells

Configurable resistivity for lines in a memory device

Auto-referenced memory cell read techniques

Electron beam probing techniques and related structures

Method for reading cross point-type memory array including two-term...

Three-dimensional convolution operation device and method based on...

Resistive random access memory device with three-dimensional cross-...

Shared decoder architecture for three-dimensional memory arrays

Architecture for multideck memory arrays

Socket design for a memory device

Resistive memory device and operating method of the resistive memor...

Signal timing alignment based on a common data strobe in memory dev...

3D semiconductor device and structure with metal layers and memory...

Semiconductor storage device and controller

Stack of horizontally extending and vertically overlapping features...

Semiconductor memory device with three-dimensional memory cells

Patents Applicationslast 30 patents

AUTO-REFERENCED MEMORY CELL READ TECHNIQUES

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND A POWER...

CONFIGURABLE RESISTIVITY FOR LINES IN A MEMORY DEVICE

ELECTRON BEAM PROBING TECHNIQUES AND RELATED STRUCTURES

SOCKET DESIGN FOR A MEMORY DEVICE

SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS

SIGNAL TIMING ALIGNMENT BASED ON A COMMON DATA STROBE IN MEMORY DEV...

CROSS POINT ARRAY ARCHITECTURE FOR MULTIPLE DECKS

3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH METAL LAYERS AND MEMORY...

ARCHITECTURE FOR MULTIDECK MEMORY ARRAYS

IMPROVED VERTICAL 3D MEMORY DEVICE AND ACCESSING METHOD

LOW RESISTANCE CROSSPOINT ARCHITECTURE

CROSS-POINT PILLAR ARCHITECTURE FOR MEMORY ARRAYS

Stack of Horizontally Extending and Vertically Overlapping Features...

SEMICONDUCTOR STORAGE DEVICE AND CONTROLLER

SEMICONDUCTOR MEMORY DEVICE WITH THREE-DIMENSIONAL MEMORY CELLS

THREE-STATE PROGRAMMING OF MEMORY CELLS

EXTENDED MEMORY COMMUNICATION

NONVOLATILE MEMORY DEVICE AND OPERATING METHOD OF THE SAME

SEMICONDUCTOR MEMORY DEVICE

RESISTIVE MEMORY DEVICE

FORWARD-LOOKING DETERMINATION OF READ VOLTAGE USING MEMORY CELL PAT...

DIFFERENTIAL SUBTHRESHOLD READ OF MEMORY CELL PAIR IN A MEMORY DEVICE

MEMORY ARRAY HAVING AIR GAPS

MULTIPLE TRANSISTOR ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS

SHARED DECODER ARCHITECTURE FOR THREE-DIMENSIONAL MEMORY ARRAYS

SEMICONDUCTOR MEMORY DEVICE

THREE DIMENSIONAL STACKED SEMICONDUCTOR MEMORY

VARIABLE RESISTANCE NON-VOLATILE MEMORY

NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR...