Threshold devices

Industry

CPC
G06F2207/4818

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Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F2207/4818Threshold devices

Industries

Patents Grantslast 30 patents

Information Patent Grant
Clustering and outlier detection in anomaly and causation detection...
- Patent number 11,621,969
- Issue date Apr 4, 2023
- Elasticsearch B.V.
- Stephen Dodson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor and a digital signal processor including adder and m...
- Patent number 6,516,331
- Issue date Feb 4, 2003
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder circuit employing logic gates having discrete weighted inputs...
- Patent number 6,502,120
- Issue date Dec 31, 2002
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder having reduced number of internal layers and method of operat...
- Patent number 6,438,572
- Issue date Aug 20, 2002
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Noise tolerant conductance-based logic gate and methods of operatio...
- Patent number 6,430,585
- Issue date Aug 6, 2002
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder
- Patent number 6,374,281
- Issue date Apr 16, 2002
- Kabushiki Kaisha Toshiba
- Shinji Kitabayashi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Threshold element and method of designing the same
- Patent number 6,338,157
- Issue date Jan 8, 2002
- Monolith Co., Ltd.
- Victor I. Varshavsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adder and multiplier circuits employing logic gates having discrete...
- Patent number 6,205,458
- Issue date Mar 20, 2001
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit arrangement for realizing logic elements that can be repres...
- Patent number 5,991,789
- Issue date Nov 23, 1999
- Siemens Aktiengesellschaft
- Stefan Prange
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed arithmetic and logic generator with reduced complexity u...
- Patent number 5,265,044
- Issue date Nov 23, 1993
- Tejinder Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network implementation of a binary adder
- Patent number 5,016,211
- Issue date May 14, 1991
- Samsung Electronics Co., Ltd.
- Ho-sun Jeong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-function logic gate with one gate delay
- Patent number 4,133,040
- Issue date Jan 2, 1979
- RCA Corporation
- Daniel Hampel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed multiplier logic circuit
- Patent number 3,950,636
- Issue date Apr 13, 1976
- Signetics Corporation
- Tich T. Dao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3885169
- Patent number 3,885,169
- Issue date May 20, 1975
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3866030
- Patent number 3,866,030
- Issue date Feb 11, 1975
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3789206
- Patent number 3,789,206
- Issue date Jan 29, 1974
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3769499
- Patent number 3,769,499
- Issue date Oct 30, 1973
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3757098
- Patent number 3,757,098
- Issue date Sep 4, 1973
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3725687
- Patent number 3,725,687
- Issue date Apr 3, 1973
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3720821
- Patent number 3,720,821
- Issue date Mar 13, 1973
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3700874
- Patent number 3,700,874
- Issue date Oct 24, 1972
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3609329
- Patent number 3,609,329
- Issue date Sep 28, 1971
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3603776
- Patent number 3,603,776
- Issue date Sep 7, 1971
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3524977
- Patent number 3,524,977
- Issue date Aug 18, 1970
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3280316
- Patent number 3,280,316
- Issue date Oct 18, 1966
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3275812
- Patent number 3,275,812
- Issue date Sep 27, 1966
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3253133
- Patent number 3,253,133
- Issue date May 24, 1966
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3248529
- Patent number 3,248,529
- Issue date Apr 26, 1966
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3215857
- Patent number 3,215,857
- Issue date Nov 2, 1965
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
3207913
- Patent number 3,207,913
- Issue date Sep 21, 1965
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Clustering and Outlier Detection in Anomaly and Causation Detection...
- Publication number 20180316707
- Publication date Nov 1, 2018
- Elasticsearch B.V.
- Stephen Dodson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Four-rail NCL incrementor/decrementor
- Publication number 20030097392
- Publication date May 22, 2003
- Steven R. Masteller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
A Microprocessor and a digital signal processor including adder and...
- Publication number 20030028575
- Publication date Feb 6, 2003
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adder and multiplier circuits employing logic gates having discrete...
- Publication number 20030009504
- Publication date Jan 9, 2003
- RN2R, L.L.C.
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adder and multiplier circuits employing logic gates having discrete...
- Publication number 20010001862
- Publication date May 24, 2001
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adder and multiplier circuits employing logic gates having discrete...
- Publication number 20010001860
- Publication date May 24, 2001
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Adder and multiplier circuits employing logic gates having discrete...
- Publication number 20010001861
- Publication date May 24, 2001
- Valeriu Beiu
- G06 - COMPUTING CALCULATING COUNTING

Threshold devices

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Clustering and outlier detection in anomaly and causation detection...

Microprocessor and a digital signal processor including adder and m...

Adder circuit employing logic gates having discrete weighted inputs...

Adder having reduced number of internal layers and method of operat...

Noise tolerant conductance-based logic gate and methods of operatio...

Adder

Threshold element and method of designing the same

Adder and multiplier circuits employing logic gates having discrete...

Circuit arrangement for realizing logic elements that can be repres...

High speed arithmetic and logic generator with reduced complexity u...

Neural network implementation of a binary adder

Multi-function logic gate with one gate delay

High speed multiplier logic circuit

3885169

3866030

3789206

3769499

3757098

3725687

3720821

3700874

3609329

3603776

3524977

3280316

3275812

3253133

3248529

3215857

3207913

Patents Applicationslast 30 patents

Clustering and Outlier Detection in Anomaly and Causation Detection...

Four-rail NCL incrementor/decrementor

A Microprocessor and a digital signal processor including adder and...

Adder and multiplier circuits employing logic gates having discrete...

Adder and multiplier circuits employing logic gates having discrete...

Adder and multiplier circuits employing logic gates having discrete...

Adder and multiplier circuits employing logic gates having discrete...