Threshold logic

Industry

CPC
H03K19/0813

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Parent Industries

HELECTRICITY H03Electronic circuits H03KPULSE TECHNIQUE H03K19/00Logic circuits

Current Industry

H03K19/0813Threshold logic

Industries

Patents Grantslast 30 patents

Information Patent Grant
Physically unclonable function device
- Patent number 12,143,108
- Issue date Nov 12, 2024
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mixed signal device with different pluralities of digital cells
- Patent number 12,021,526
- Issue date Jun 25, 2024
- Zeta Gig Inc.
- Sandeep Kumar Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatuses, systems, and methods for memory initiated calibration
- Patent number 11,979,147
- Issue date May 7, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Asynchronous circuit with multi-input threshold gate logic and 1-in...
- Patent number 11,817,859
- Issue date Nov 14, 2023
- Kepler Computing Inc.
- Sasikanth Manipatruni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Modular redundant threshold circuit and method
- Patent number 11,791,831
- Issue date Oct 17, 2023
- Apogee Semiconductor, Inc.
- David A. Grant
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Input supply circuit and method for operating an input supply circuit
- Patent number 11,791,817
- Issue date Oct 17, 2023
- NXP USA, INC.
- Alma Anderson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pull-up and pull-down networks controlled asynchronously by thresho...
- Patent number 11,716,085
- Issue date Aug 1, 2023
- Kepler Computing, Inc.
- Sasikanth Manipatruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Asynchronous circuit with majority gate or minority gate logic and...
- Patent number 11,716,086
- Issue date Aug 1, 2023
- Kepler Computing Inc.
- Sasikanth Manipatruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pull-up and pull-down networks controlled asynchronously by majorit...
- Patent number 11,716,084
- Issue date Aug 1, 2023
- Kepler Computing Inc.
- Sasikanth Manipatruni
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Parallel pull-up and pull-down networks controlled asynchronously b...
- Patent number 11,652,487
- Issue date May 16, 2023
- Kepler Computing Inc.
- Sasikanth Manipatruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 11,636,831
- Issue date Apr 25, 2023
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control circuit and corresponding method
- Patent number 11,626,880
- Issue date Apr 11, 2023
- STMicroelectronics S.r.l.
- Liliana Arcidiacono
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Controller area network transceiver
- Patent number 11,588,663
- Issue date Feb 21, 2023
- NXP B.V.
- Matthias Berthold Muth
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Impedance calibration circuit and memory device including the same
- Patent number 11,502,687
- Issue date Nov 15, 2022
- Samsung Electronics Co., Ltd.
- Tongsung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock step control circuit and method thereof
- Patent number 11,381,245
- Issue date Jul 5, 2022
- Shanghai Biren Technology Co., Ltd
- Zheng Tian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit having state machine-driven flops in wrapper cha...
- Patent number 11,342,914
- Issue date May 24, 2022
- Juniper Networks, Inc.
- Gustav Laub
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory interface circuit including output impedance monitor and met...
- Patent number 11,190,188
- Issue date Nov 30, 2021
- Electronics and Telecommunications Research Institute
- Min-Hyung Cho
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Impedance calibration circuit and memory device including the same
- Patent number 11,115,021
- Issue date Sep 7, 2021
- Samsung Electronics Co., Ltd.
- Tongsung Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 11,081,091
- Issue date Aug 3, 2021
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous circuit stacking for simplified power management
- Patent number 10,804,903
- Issue date Oct 13, 2020
- Jia Di
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data retention circuit
- Patent number 10,763,860
- Issue date Sep 1, 2020
- Nuvoton Technology Corporation
- Chi-Ray Huang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 10,490,170
- Issue date Nov 26, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static state control of a digital logic circuit within an integrate...
- Patent number 10,320,387
- Issue date Jun 11, 2019
- NXP USA, INC.
- Ivan Carlos Ribeiro Do Nascimento
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Level shifter
- Patent number 10,312,913
- Issue date Jun 4, 2019
- Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho
- Junichi Matsubara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptive multibit bus for energy optimization
- Patent number 10,290,289
- Issue date May 14, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voting circuits and methods for trusted fault tolerance of a system...
- Patent number 10,075,170
- Issue date Sep 11, 2018
- The Charles Stark Draper Laboratory, Inc.
- Richard L. Vigeant
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of obfuscating digital logic circuits using threshold voltage
- Patent number 9,876,503
- Issue date Jan 23, 2018
- Arixona Board of Regents on Behalf of Arizona State University
- Sarma Vrudhula
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pure memristive logic gate
- Patent number 9,685,954
- Issue date Jun 20, 2017
- Technion Research and Development Foundation Ltd.
- Shahar Kvatinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Non-volatile boolean logic operation circuit and operation method t...
- Patent number 9,473,137
- Issue date Oct 18, 2016
- Huazhong University of Science & Technology
- Xiangshui Miao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Threshold logic gates with resistive networks
- Patent number 9,356,598
- Issue date May 31, 2016
- Arizona Board of Regents on behalf of Arizona State University
- Sarma Vrudhula
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM HAVING SINGLE-EVENT LATCH-UP DETECTION AND MITIGATION
- Publication number 20240364342
- Publication date Oct 31, 2024
- NXP USA, Inc.
- Mohamed Suleman Moosa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
APPARATUSES, SYSTEMS, AND METHODS FOR MEMORY INITIATED CALIBRATION
- Publication number 20240063794
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Sujeet Ayyapureddi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
REFERENCE VOLTAGE CIRUIT WITH TEMPERATURE COMPENSATION
- Publication number 20230336174
- Publication date Oct 19, 2023
- INFSITRONIX TECHNOLOGY CORPORATION
- YUAN-KAI CHENG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mixed Signal Device with Different Pluralities of Digital Cells
- Publication number 20230261659
- Publication date Aug 17, 2023
- Sandeep Kumar Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PHYSICALLY UNCLONABLE FUNCTION DEVICE
- Publication number 20230015627
- Publication date Jan 19, 2023
- STMicroelectronics (Rousset) SAS
- Francesco La Rosa
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CONTROL CIRCUIT AND CORRESPONDING METHOD
- Publication number 20220149844
- Publication date May 12, 2022
- STMicroelectronics S.r.l
- Liliana Arcidiacono
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20220044656
- Publication date Feb 10, 2022
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT HAVING STATE MACHINE-DRIVEN FLOPS IN WRAPPER CHA...
- Publication number 20210399729
- Publication date Dec 23, 2021
- Juniper Networks, Inc.
- Gustav Laub
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IMPEDANCE CALIBRATION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20210359684
- Publication date Nov 18, 2021
- Samsung Electronics Co., Ltd.
- Tongsung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
IMPEDANCE CALIBRATION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
- Publication number 20210242870
- Publication date Aug 5, 2021
- Samsung Electronics Co., Ltd.
- Tongsung KIM
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHOD
- Publication number 20210218401
- Publication date Jul 15, 2021
- ARM Limited
- David MADSEN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY INTERFACE CIRCUIT INCLUDING OUTPUT IMPEDANCE MONITOR AND MET...
- Publication number 20210184677
- Publication date Jun 17, 2021
- ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
- Min-Hyung CHO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DATA RETENTION CIRCUIT
- Publication number 20200212912
- Publication date Jul 2, 2020
- NUVOTON TECHNOLOGY CORPORATION
- Chi-Ray HUANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20200160819
- Publication date May 21, 2020
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20190266981
- Publication date Aug 29, 2019
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION
- Publication number 20180286360
- Publication date Oct 4, 2018
- Intel Corporation
- Sanjeev S. Jahagirdar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LEVEL SHIFTER
- Publication number 20180109260
- Publication date Apr 19, 2018
- KABUSHIKI KAISHA TOKAI-RIKA-DENKI-SEISAKUSHO
- Junichi MATSUBARA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOTING CIRCUITS AND METHODS FOR TRUSTED FAULT TOLERANCE OF A SYSTEM...
- Publication number 20180076815
- Publication date Mar 15, 2018
- The Charles Stark Draper Laboratory, Inc.
- Richard L. Vigeant
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD OF OBFUSCATING DIGITAL LOGIC CIRCUITS USING THRESHOLD VOLTAGE
- Publication number 20170187382
- Publication date Jun 29, 2017
- Arizona Board of Regents on behalf of Arizona State University
- Sarma Vrudhula
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PURE MEMRISTIVE LOGIC GATE
- Publication number 20150256178
- Publication date Sep 10, 2015
- Technion Research & Development Foundation Ltd.
- Shahar Kvatinsky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOGIC CIRCUITS USING NEURISTORS
- Publication number 20140035614
- Publication date Feb 6, 2014
- Matthew D. Pickett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAJORITY DECISION CIRCUIT
- Publication number 20130249593
- Publication date Sep 26, 2013
- SK HYNIX INC.
- Hae-Rang CHOI
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MAJORITY DECISION CIRCUIT
- Publication number 20130113518
- Publication date May 9, 2013
- Hae-Rang Choi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SAMPLING PHASE SELECTION METHOD FOR A STREAM OF DATA BITS
- Publication number 20130094558
- Publication date Apr 18, 2013
- Raydium Semiconductor Corporation
- REN-FENG HUANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN
- Publication number 20120293198
- Publication date Nov 22, 2012
- The Board of Trustees of the University of Arkansas
- Jia Di
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN
- Publication number 20120133390
- Publication date May 31, 2012
- Jia Di
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN
- Publication number 20110032000
- Publication date Feb 10, 2011
- Jia Di
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
THRESHOLD LOGIC ELEMENT HAVING LOW LEAKAGE POWER AND HIGH PERFORMANCE
- Publication number 20100321061
- Publication date Dec 23, 2010
- Arizona Board of Regents for and on behalf of Ariz ona State University
- Samuel Leshner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RECONFIGURABLE LOGIC CELL MADE UP OF DOUBLE-GATE MOSFET TRANSISTORS
- Publication number 20100194430
- Publication date Aug 5, 2010
- Ecole Centrale de Lyon
- Ian D. O'Connor
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOCALLY ASYNCHRONOUS, BLOCK-LEVEL SYNCHRONOUS, CONFIGURABLE LOGIC B...
- Publication number 20070194810
- Publication date Aug 23, 2007
- Intel Corporation
- Eric C. Hannah
- H03 - BASIC ELECTRONIC CIRCUITRY

Threshold logic

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Physically unclonable function device

Mixed signal device with different pluralities of digital cells

Apparatuses, systems, and methods for memory initiated calibration

Asynchronous circuit with multi-input threshold gate logic and 1-in...

Modular redundant threshold circuit and method

Input supply circuit and method for operating an input supply circuit

Pull-up and pull-down networks controlled asynchronously by thresho...

Asynchronous circuit with majority gate or minority gate logic and...

Pull-up and pull-down networks controlled asynchronously by majorit...

Parallel pull-up and pull-down networks controlled asynchronously b...

Adaptive multibit bus for energy optimization

Control circuit and corresponding method

Controller area network transceiver

Impedance calibration circuit and memory device including the same

Clock step control circuit and method thereof

Integrated circuit having state machine-driven flops in wrapper cha...

Memory interface circuit including output impedance monitor and met...

Impedance calibration circuit and memory device including the same

Adaptive multibit bus for energy optimization

Asynchronous circuit stacking for simplified power management

Data retention circuit

Adaptive multibit bus for energy optimization

Static state control of a digital logic circuit within an integrate...

Level shifter

Adaptive multibit bus for energy optimization

Voting circuits and methods for trusted fault tolerance of a system...

Method of obfuscating digital logic circuits using threshold voltage

Pure memristive logic gate

Non-volatile boolean logic operation circuit and operation method t...

Threshold logic gates with resistive networks

Patents Applicationslast 30 patents

SYSTEM HAVING SINGLE-EVENT LATCH-UP DETECTION AND MITIGATION

APPARATUSES, SYSTEMS, AND METHODS FOR MEMORY INITIATED CALIBRATION

REFERENCE VOLTAGE CIRUIT WITH TEMPERATURE COMPENSATION

Mixed Signal Device with Different Pluralities of Digital Cells

PHYSICALLY UNCLONABLE FUNCTION DEVICE

CONTROL CIRCUIT AND CORRESPONDING METHOD

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

INTEGRATED CIRCUIT HAVING STATE MACHINE-DRIVEN FLOPS IN WRAPPER CHA...

IMPEDANCE CALIBRATION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

IMPEDANCE CALIBRATION CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME

APPARATUS AND METHOD

MEMORY INTERFACE CIRCUIT INCLUDING OUTPUT IMPEDANCE MONITOR AND MET...

DATA RETENTION CIRCUIT

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

ADAPTIVE MULTIBIT BUS FOR ENERGY OPTIMIZATION

LEVEL SHIFTER

VOTING CIRCUITS AND METHODS FOR TRUSTED FAULT TOLERANCE OF A SYSTEM...

METHOD OF OBFUSCATING DIGITAL LOGIC CIRCUITS USING THRESHOLD VOLTAGE

PURE MEMRISTIVE LOGIC GATE

LOGIC CIRCUITS USING NEURISTORS

MAJORITY DECISION CIRCUIT

MAJORITY DECISION CIRCUIT

SAMPLING PHASE SELECTION METHOD FOR A STREAM OF DATA BITS

ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN

ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN

ULTRA-LOW POWER MULTI-THRESHOLD ASYNCHRONOUS CIRCUIT DESIGN

THRESHOLD LOGIC ELEMENT HAVING LOW LEAKAGE POWER AND HIGH PERFORMANCE

RECONFIGURABLE LOGIC CELL MADE UP OF DOUBLE-GATE MOSFET TRANSISTORS

LOCALLY ASYNCHRONOUS, BLOCK-LEVEL SYNCHRONOUS, CONFIGURABLE LOGIC B...