Timing of memory operations based on dummy memory elements or replica circuits

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G11C7/227

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GPHYSICS G11Information storage G11CSTATIC STORES G11C7/00Arrangements for writing information into, or reading information out from, a digital store

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G11C7/227Timing of memory operations based on dummy memory elements or replica circuits

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Patents Grantslast 30 patents

Information Patent Grant
SRAM with tracking circuitry for reducing active power
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- Issue date Jan 28, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
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- G11 - INFORMATION STORAGE
Information Patent Grant
Turbo mode SRAM for high performance
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- Michael Clinton
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Information Patent Grant
Memory array reset read operation
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- Issue date Oct 15, 2024
- Jeremy Binfet
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Information Patent Grant
Systems and methods for controlling common mode level for sense amp...
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- Micron Technology, Inc.
- Ki-Jun Nam
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Information Patent Grant
Memory device with adjustable delay propagation of a control signal...
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- Issue date Jul 30, 2024
- Micron Technology, Inc.
- Andrea D'alessandro
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Information Patent Grant
Offset cancellation
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- Issue date Jul 2, 2024
- Martin Brox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixing normal and reverse order programming in NAND memory devices
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- Issue date Apr 23, 2024
- SanDisk Technologies, LLC
- Qing Li
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM with tracking circuitry for reducing active power
- Patent number 11,727,972
- Issue date Aug 15, 2023
- Taiwan Semiconductor Manufacturing Company, Ltd
- Tsung-Hsien Huang
- G11 - INFORMATION STORAGE
Information Patent Grant
Control method and controller of program suspending and resuming fo...
- Patent number 11,676,663
- Issue date Jun 13, 2023
- Yangtze Memory Technologies Co., Ltd.
- Zhi Chao Du
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory macro and method of operating the same
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- Issue date May 16, 2023
- TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- Chien-Kuo Su
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Information Patent Grant
Memory circuit including tracking circuit
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- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
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Information Patent Grant
Memory array reset read operation
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- Issue date Aug 23, 2022
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- Jeremy Binfet
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Information Patent Grant
Turbo mode SRAM for high performance
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- Issue date Jul 19, 2022
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- Michael Clinton
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Information Patent Grant
Delay locked loop circuit and semiconductor memory device having th...
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Information Patent Grant
Memory components and controllers that calibrate multiphase synchro...
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Offset cancellation
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Information Patent Grant
Control method and controller of program suspending and resuming fo...
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- Zhi Chao Du
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Information Patent Grant
Semiconductor apparatus and method for controlling semiconductor ap...
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- Kioxia Corporation
- Nobuhiro Tsuji
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Information Patent Grant
Dummy bitline circuitry
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- Issue date Jan 25, 2022
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- Abhishek B. Akkur
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Information Patent Grant
TSV check circuit with replica path
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- Issue date Nov 2, 2021
- Micron Technology, Inc.
- Harutaka Makabe
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory, information processing system, and method of controlling me...
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- Issue date Aug 3, 2021
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- Haruhiko Terada
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Information Patent Grant
Semiconductor device providing an output in response to a read comm...
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- Takayuki Miyamoto
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Information Patent Grant
Memory macro and method of operating the same
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- Issue date Jun 8, 2021
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Information Patent Grant
Memory circuit including tracking circuit
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- Issue date May 25, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Kuoyuan (Peter) Hsu
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Memory interface circuit, memory storage device and signal generati...
- Patent number 10,978,120
- Issue date Apr 13, 2021
- Phison Electronics Corp.
- Ming-Chien Huang
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Information Patent Grant
Control method and controller of program suspending and resuming fo...
- Patent number 10,978,158
- Issue date Apr 13, 2021
- Yangtze Memory Technologies Co., Ltd.
- Zhi Chao Du
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Information Patent Grant
Apparatuses and methods for measuring an electrical characteristic...
- Patent number 10,956,642
- Issue date Mar 23, 2021
- Micron Technology, Inc.
- Toru Tanzawa
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Memory device, driving method thereof, semiconductor device, electr...
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- Issue date Mar 9, 2021
- Semiconductor Energy Laboratory Co., Ltd.
- Takahiko Ishizu
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Information Patent Grant
Content addressable memory
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- Issue date Mar 2, 2021
- RENESAS ELELCTRONICS CORPORATION
- Makoto Yabuuchi
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Information Patent Grant
Multiple data rate memory
- Patent number 10,878,864
- Issue date Dec 29, 2020
- SURECORE LIMITED
- Stefan Cosemans
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Patents Applicationslast 30 patents

Information Patent Application
OFFSET CANCELLATION
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Information Patent Application
ADJUSTABLE DELAY PROPAGATION OF A CONTROL SIGNAL TO DIFFERENT PAGE...
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- Andrea D'alessandro
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METHODS OF OPERATING A NEAR MEMORY PROCESSING-DUAL IN-LINE MEMORY M...
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MEMORY SYSTEM PERFORMING PERFORMANCE ADJUSTING OPERATION
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MICROELECTRONIC DEVICES, AND RELATED MEMORY DEVICES, METHODS, AND E...
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- Micron Technology, Inc.
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MEMORY ARRAY RESET READ OPERATION
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- Publication date Dec 1, 2022
- Micron Technology, Inc.
- Jeremy Binfet
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Turbo Mode SRAM for High Performance
- Publication number 20220328082
- Publication date Oct 13, 2022
- Taiwan Semiconductor Manufacturing Company Limited
- Michael Clinton
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OFFSET CANCELLATION
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- Publication date Jun 2, 2022
- Micron Technology, Inc.
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CONTROL METHOD AND CONTROLLER OF PROGRAM SUSPENDING AND RESUMING FO...
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- Publication date May 5, 2022
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CONTROL METHOD AND CONTROLLER OF PROGRAM SUSPENDING AND RESUMING FO...
- Publication number 20210366552
- Publication date Nov 25, 2021
- YANGTZE MEMORY TECHNOLOGIES CO., LTD.
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MEMORY MACRO AND METHOD OF OPERATING THE SAME
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- Taiwan Semiconductor Manufacturing Company, Ltd.
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MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT
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TSV CHECK CIRCUIT WITH REPLICA PATH
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SEMICONDUCTOR APPARATUS AND METHOD FOR CONTROLLING SEMICONDUCTOR AP...
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MEMORY INTERFACE CIRCUIT, MEMORY STORAGE DEVICE AND SIGNAL GENERATI...
- Publication number 20210027820
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MEMORY ARRAY RESET READ OPERATION
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SEMICONDUCTOR STORAGE DEVICE
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MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...
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SEMICONDUCTOR DEVICE
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MEMORY MACRO AND METHOD OF OPERATING THE SAME
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MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT
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INTEGRATED CIRCUIT
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SEMICONDUCTOR DEVICE HAVING MODE REGISTER
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CIRCUITRY FOR TRACKING BIAS VOLTAGE BEHAVIOR
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MEMORY MACRO AND METHOD OF OPERATING THE SAME
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MEMORY DEVICES AND MEMORY SYSTEMS INCLUDING THE SAME
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- Samsung Electronics Co., Ltd.
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- G11 - INFORMATION STORAGE

Timing of memory operations based on dummy memory elements or replica circuits

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

SRAM with tracking circuitry for reducing active power

Turbo mode SRAM for high performance

Memory array reset read operation

Systems and methods for controlling common mode level for sense amp...

Memory device with adjustable delay propagation of a control signal...

Offset cancellation

Mixing normal and reverse order programming in NAND memory devices

SRAM with tracking circuitry for reducing active power

Control method and controller of program suspending and resuming fo...

Memory macro and method of operating the same

Memory circuit including tracking circuit

Memory array reset read operation

Turbo mode SRAM for high performance

Delay locked loop circuit and semiconductor memory device having th...

Memory components and controllers that calibrate multiphase synchro...

Offset cancellation

Control method and controller of program suspending and resuming fo...

Semiconductor apparatus and method for controlling semiconductor ap...

Dummy bitline circuitry

TSV check circuit with replica path

Memory, information processing system, and method of controlling me...

Semiconductor device providing an output in response to a read comm...

Memory macro and method of operating the same

Memory circuit including tracking circuit

Memory interface circuit, memory storage device and signal generati...

Control method and controller of program suspending and resuming fo...

Apparatuses and methods for measuring an electrical characteristic...

Memory device, driving method thereof, semiconductor device, electr...

Content addressable memory

Multiple data rate memory

Patents Applicationslast 30 patents

OFFSET CANCELLATION

ADJUSTABLE DELAY PROPAGATION OF A CONTROL SIGNAL TO DIFFERENT PAGE...

METHODS OF OPERATING A NEAR MEMORY PROCESSING-DUAL IN-LINE MEMORY M...

MEMORY SYSTEM PERFORMING PERFORMANCE ADJUSTING OPERATION

MICROELECTRONIC DEVICES, AND RELATED MEMORY DEVICES, METHODS, AND E...

MEMORY ARRAY RESET READ OPERATION

Turbo Mode SRAM for High Performance

OFFSET CANCELLATION

CONTROL METHOD AND CONTROLLER OF PROGRAM SUSPENDING AND RESUMING FO...

CONTROL METHOD AND CONTROLLER OF PROGRAM SUSPENDING AND RESUMING FO...

MEMORY MACRO AND METHOD OF OPERATING THE SAME

MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT

TSV CHECK CIRCUIT WITH REPLICA PATH

SEMICONDUCTOR APPARATUS AND METHOD FOR CONTROLLING SEMICONDUCTOR AP...

MEMORY INTERFACE CIRCUIT, MEMORY STORAGE DEVICE AND SIGNAL GENERATI...

MEMORY ARRAY RESET READ OPERATION

SEMICONDUCTOR STORAGE DEVICE

MEMORY COMPONENTS AND CONTROLLERS THAT CALIBRATE MULTIPHASE SYNCHRO...

SEMICONDUCTOR DEVICE

MEMORY MACRO AND METHOD OF OPERATING THE SAME

MEMORY CIRCUIT INCLUDING TRACKING CIRCUIT

OFFSET CANCELLATION

INTEGRATED CIRCUIT

SEMICONDUCTOR DEVICE HAVING MODE REGISTER

MEMORY DEVICE, DRIVING METHOD THEREOF, SEMICONDUCTOR DEVICE, ELECTR...

CIRCUITRY FOR TRACKING BIAS VOLTAGE BEHAVIOR

SEMICONDUCTOR DEVICE

APPARATUSES AND METHODS FOR MEASURING AN ELECTRICAL CHARACTERISTIC...

MEMORY MACRO AND METHOD OF OPERATING THE SAME

MEMORY DEVICES AND MEMORY SYSTEMS INCLUDING THE SAME