using a clocked protocol

Industry

CPC
G06F13/4273

This industry / category may be too specific. Please go to a parent level for more data

Parent Industries

GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

Current Industry

G06F13/4273using a clocked protocol

Industries

Patents Grantslast 30 patents

Information Patent Grant
Storage controller, storage device including the same, and operatio...
- Patent number 11,940,862
- Issue date Mar 26, 2024
- Samsung Electronics Co., Ltd.
- Hyun Ju Yi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 11,940,857
- Issue date Mar 26, 2024
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for providing peripheral sub-system stability
- Patent number 11,809,258
- Issue date Nov 7, 2023
- Apple Inc.
- Saurabh Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect
- Patent number 11,741,030
- Issue date Aug 29, 2023
- Intel Corporation
- Robert J. Safranek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for performing data transmission control of inter field prog...
- Patent number 11,714,777
- Issue date Aug 1, 2023
- Realtek Semiconductor Corp.
- Chi-Shao Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 11,531,386
- Issue date Dec 20, 2022
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect
- Patent number 11,269,793
- Issue date Mar 8, 2022
- Intel Corporation
- Robert J. Safranek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
MIPI D-PHY circuit
- Patent number 11,249,933
- Issue date Feb 15, 2022
- Shanghai IC R&D Center Co., Ltd.
- Ting Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package link
- Patent number 11,003,610
- Issue date May 11, 2021
- Intel Corporation
- Zuoguo Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication interface control system
- Patent number 10,977,196
- Issue date Apr 13, 2021
- SMART IOPS, INC.
- Kirankumar Muralidharan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Signal transmitting/receiving method and apparatus
- Patent number 10,952,169
- Issue date Mar 16, 2021
- Samsung Electronics Co., Ltd.
- Dae-Young Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect physical layer
- Patent number 10,909,055
- Issue date Feb 2, 2021
- Intel Corporation
- Venkatraman Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage controller, storage device including the same, and operatio...
- Patent number 10,895,905
- Issue date Jan 19, 2021
- Samsung Electronics Co., Ltd.
- Hyun Ju Yi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable rate display interfaces
- Patent number 10,698,522
- Issue date Jun 30, 2020
- QUALCOMM Incorporated
- Fariborz Pourbigharaz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-element memory device with power control for individual elements
- Patent number 10,698,464
- Issue date Jun 30, 2020
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package link
- Patent number 10,552,357
- Issue date Feb 4, 2020
- Intel Corporation
- Zuoguo J. Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric power states on a communication link
- Patent number 10,482,048
- Issue date Nov 19, 2019
- QUALCOMM Incorporated
- William Bakshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Grouping central processing unit memories based on dynamic clock an...
- Patent number 10,466,766
- Issue date Nov 5, 2019
- QUALCOMM Incorporated
- Rajesh Arimilli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit for operating on a bus, and method for operating...
- Patent number 10,394,748
- Issue date Aug 27, 2019
- CPT GROUP GMBH
- Bernhard Bieg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect physical layer
- Patent number 10,380,046
- Issue date Aug 13, 2019
- Intel Corporation
- Venkatraman Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric power states on a communication link
- Patent number 10,365,706
- Issue date Jul 30, 2019
- QUALCOMM Incorporated
- William Bakshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asymmetric chip-to-chip interconnect
- Patent number 10,353,668
- Issue date Jul 16, 2019
- Micron Technology, Inc.
- Timothy M. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device, memory system, and method using bus-in...
- Patent number 10,318,469
- Issue date Jun 11, 2019
- Samsung Electronics Co., Ltd.
- Min-Soo Jang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Replacement physical layer (PHY) for low-speed peripheral component...
- Patent number 10,310,585
- Issue date Jun 4, 2019
- QUALCOMM Incorporated
- Shaul Yohai Yifrach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect
- Patent number 10,248,591
- Issue date Apr 2, 2019
- Intel Corporation
- Robert J. Safranek
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for dynamically switching high-speed clock of a h...
- Patent number 10,241,559
- Issue date Mar 26, 2019
- Wipro Limited
- Vijay Kumar Kodavalla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance interconnect physical layer
- Patent number 10,216,661
- Issue date Feb 26, 2019
- Intel Corporation
- Venkatraman Iyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multislot link layer flit wherein flit includes three or more slots...
- Patent number 10,204,064
- Issue date Feb 12, 2019
- Intel Corporation
- Jeff Willey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low-latency low-uncertainty timer synchronization mechanism across...
- Patent number 10,159,053
- Issue date Dec 18, 2018
- QUALCOMM Incorporated
- Joaquin Romera
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multichip package link
- Patent number 10,073,808
- Issue date Sep 11, 2018
- Intel Corporation
- Zuoguo J. Wu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Multi-Element Memory Device with Power for Individual Elements
- Publication number 20240288922
- Publication date Aug 29, 2024
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE CONTROLLER, STORAGE DEVICE INCLUDING THE SAME, AND OPERATIO...
- Publication number 20240201774
- Publication date Jun 20, 2024
- Samsung Electronics Co., Ltd.
- HYUN JU YI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASSYMMETRICAL DATA RATES FOR HIGH SPEED INTERCONNECTS
- Publication number 20240095206
- Publication date Mar 21, 2024
- Intel Corporation
- Sampath Dakshinamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYNCHRONOUS ELECTRONIC CIRCUIT DEVICES
- Publication number 20230325329
- Publication date Oct 12, 2023
- Melexis Technologies SA
- Nicolas TRIBIE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20230297151
- Publication date Sep 21, 2023
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARAMETER EXCHANGE FOR A DIE-TO-DIE INTERCONNECT
- Publication number 20220334995
- Publication date Oct 20, 2022
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RETIMERS TO EXTEND A DIE-TO-DIE INTERCONNECT
- Publication number 20220334932
- Publication date Oct 20, 2022
- Debendra Das Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR PERFORMING DATA TRANSMISSION CONTROL OF INTER FIELD PROG...
- Publication number 20220309020
- Publication date Sep 29, 2022
- Realtek Semiconductor Corp.
- Chi-Shao Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIDEBAND INTERFACE FOR DIE-TO-DIE INTERCONNECTS
- Publication number 20220222198
- Publication date Jul 14, 2022
- Narasimha Lanka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORAGE CONTROLLER, STORAGE DEVICE INCLUDING THE SAME, AND OPERATIO...
- Publication number 20210141440
- Publication date May 13, 2021
- Samsung Electronics Co., Ltd.
- HYUN JU YI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20210072810
- Publication date Mar 11, 2021
- Rambus Inc.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATION INTERFACE CONTROL SYSTEM
- Publication number 20210056049
- Publication date Feb 25, 2021
- Smart IOPS, Inc.
- Kirankumar Muralidharan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIPI D-PHY CIRCUIT
- Publication number 20200349102
- Publication date Nov 5, 2020
- Shanghai IC R&D Center Co., Ltd.
- Ting LI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICHIP PACKAGE LINK
- Publication number 20200320031
- Publication date Oct 8, 2020
- Intel Corporation
- Zuoguo Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY BUFFERS AND MODULES SUPPORTING DYNAMIC POINT-TO-POINT CONNEC...
- Publication number 20200225878
- Publication date Jul 16, 2020
- RAMBUS INC.
- Ian Shaeffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR PROVIDING PERIPHERAL SUB-SYSTEM STABILITY
- Publication number 20200218326
- Publication date Jul 9, 2020
- Apple Inc.
- Saurabh Garg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE INTERCONNECT
- Publication number 20190391939
- Publication date Dec 26, 2019
- Intel Corporation
- Robert J. Safranek
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRIC POWER STATES ON A COMMUNICATION LINK
- Publication number 20190236043
- Publication date Aug 1, 2019
- QUALCOMM Incorporated
- William Bakshi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GROUPING CENTRAL PROCESSING UNIT MEMORIES BASED ON DYNAMIC CLOCK AN...
- Publication number 20190138079
- Publication date May 9, 2019
- QUALCOMM Incorporated
- Rajesh ARIMILLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20180329467
- Publication date Nov 15, 2018
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT FOR OPERATING ON A BUS, AND METHOD FOR OPERATING...
- Publication number 20180150430
- Publication date May 31, 2018
- CONTINENTAL AUTOMOTIVE GMBH
- Bernhard Bieg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYMMETRIC CHIP-TO-CHIP INTERCONNECT
- Publication number 20170177301
- Publication date Jun 22, 2017
- Micron Technology, Inc.
- Timothy M. Hollis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Element Memory Device with Power Control for Individual Elements
- Publication number 20160231795
- Publication date Aug 11, 2016
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital Microphone Interface
- Publication number 20160012007
- Publication date Jan 14, 2016
- KNOWLES ELECTRONICS, LLC
- Robert A. Popper
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO...
- Publication number 20140304448
- Publication date Oct 9, 2014
- Intel Corporation
- Jasmin Ajanovic
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Application
MULTI-ELEMENT MEMORY DEVICE WITH POWER CONTROL FOR INDIVIDUAL ELEMENTS
- Publication number 20140201553
- Publication date Jul 17, 2014
- RAMBUS INC.
- Deborah Lindsey Dressler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERCONNECTION OF MULTIPLE CHIPS IN A PACKAGE UTILIZING ON-PACKAGE...
- Publication number 20140201405
- Publication date Jul 17, 2014
- Thomas P. Thomas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE CLOCK MISMATCH COMPENSATION SYMBOL INSERTION IN SIGNAL TRA...
- Publication number 20140126612
- Publication date May 8, 2014
- ATI Technologies ULC
- Michael Tresidder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO...
- Publication number 20140115219
- Publication date Apr 24, 2014
- Jasmin Ajanovic
- A47 - FURNITURE DOMESTIC ARTICLES OR APPLIANCES COFFEE MILLS SPICE MILLS SUCT...
Information Patent Application
Virtual GPIO
- Publication number 20140108679
- Publication date Apr 17, 2014
- QUALCOMM Incorporated
- Lalan Mishra
- G06 - COMPUTING CALCULATING COUNTING

using a clocked protocol

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Storage controller, storage device including the same, and operatio...

Multi-element memory device with power control for individual elements

Methods and apparatus for providing peripheral sub-system stability

High performance interconnect

Method for performing data transmission control of inter field prog...

Multi-element memory device with power control for individual elements

High performance interconnect

MIPI D-PHY circuit

Multichip package link

Communication interface control system

Signal transmitting/receiving method and apparatus

High performance interconnect physical layer

Storage controller, storage device including the same, and operatio...

Variable rate display interfaces

Multi-element memory device with power control for individual elements

Multichip package link

Asymmetric power states on a communication link

Grouping central processing unit memories based on dynamic clock an...

Integrated circuit for operating on a bus, and method for operating...

High performance interconnect physical layer

Asymmetric power states on a communication link

Asymmetric chip-to-chip interconnect

Semiconductor memory device, memory system, and method using bus-in...

Replacement physical layer (PHY) for low-speed peripheral component...

High performance interconnect

System and method for dynamically switching high-speed clock of a h...

High performance interconnect physical layer

Multislot link layer flit wherein flit includes three or more slots...

Low-latency low-uncertainty timer synchronization mechanism across...

Multichip package link

Patents Applicationslast 30 patents

Multi-Element Memory Device with Power for Individual Elements

STORAGE CONTROLLER, STORAGE DEVICE INCLUDING THE SAME, AND OPERATIO...

ASSYMMETRICAL DATA RATES FOR HIGH SPEED INTERCONNECTS

SYNCHRONOUS ELECTRONIC CIRCUIT DEVICES

Multi-Element Memory Device with Power Control for Individual Elements

PARAMETER EXCHANGE FOR A DIE-TO-DIE INTERCONNECT

RETIMERS TO EXTEND A DIE-TO-DIE INTERCONNECT

METHOD FOR PERFORMING DATA TRANSMISSION CONTROL OF INTER FIELD PROG...

SIDEBAND INTERFACE FOR DIE-TO-DIE INTERCONNECTS

STORAGE CONTROLLER, STORAGE DEVICE INCLUDING THE SAME, AND OPERATIO...

Multi-Element Memory Device with Power Control for Individual Elements

COMMUNICATION INTERFACE CONTROL SYSTEM

MIPI D-PHY CIRCUIT

MULTICHIP PACKAGE LINK

MEMORY BUFFERS AND MODULES SUPPORTING DYNAMIC POINT-TO-POINT CONNEC...

METHODS AND APPARATUS FOR PROVIDING PERIPHERAL SUB-SYSTEM STABILITY

HIGH PERFORMANCE INTERCONNECT

ASYMMETRIC POWER STATES ON A COMMUNICATION LINK

GROUPING CENTRAL PROCESSING UNIT MEMORIES BASED ON DYNAMIC CLOCK AN...

Multi-Element Memory Device with Power Control for Individual Elements

INTEGRATED CIRCUIT FOR OPERATING ON A BUS, AND METHOD FOR OPERATING...

ASYMMETRIC CHIP-TO-CHIP INTERCONNECT

Multi-Element Memory Device with Power Control for Individual Elements

Digital Microphone Interface

GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO...

MULTI-ELEMENT MEMORY DEVICE WITH POWER CONTROL FOR INDIVIDUAL ELEMENTS

INTERCONNECTION OF MULTIPLE CHIPS IN A PACKAGE UTILIZING ON-PACKAGE...

ADAPTIVE CLOCK MISMATCH COMPENSATION SYMBOL INSERTION IN SIGNAL TRA...

GENERAL INPUT/OUTPUT ARCHITECTURE, PROTOCOL AND RELATED METHODS TO...

Virtual GPIO