using carry save adders

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CPC
G06F7/5312

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GPHYSICS G06Computing G06FELECTRICAL DIGITAL DATA PROCESSING G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled

Current Industry

G06F7/5312using carry save adders

Industries

Patents Grantslast 30 patents

Information Patent Grant
Controlling carry-save adders in multiplication
- Patent number 11,789,701
- Issue date Oct 17, 2023
- ARM Limited
- Tai Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing field programmable gate array p...
- Patent number 11,216,249
- Issue date Jan 4, 2022
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable-logic-directed multiplier mapping
- Patent number 11,163,530
- Issue date Nov 2, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method of fast floating-point adder tree for neural n...
- Patent number 11,106,431
- Issue date Aug 31, 2021
- DINOPLUSAI HOLDINGS LIMITED
- Yutian Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing synthesis for field programmabl...
- Patent number 11,080,019
- Issue date Aug 3, 2021
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier circuit
- Patent number 11,068,238
- Issue date Jul 20, 2021
- ARM Limited
- Michael Alexander Kennedy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast vector multiplication and accumulation circuit
- Patent number 10,908,879
- Issue date Feb 2, 2021
- NEUCHIPS CORPORATION
- Youn-Long Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiply-and-accumulate unit in carry-save adder format and applica...
- Patent number 9,928,035
- Issue date Mar 27, 2018
- International Business Machines Corporation
- Marcel Kossel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined adder and pre-adder for high-radix multiplier circuit
- Patent number 9,684,488
- Issue date Jun 20, 2017
- Altera Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arithmetic circuit and arithmetic method
- Patent number 9,632,751
- Issue date Apr 25, 2017
- Kabushiki Kaisha Toshiba
- Koichiro Ban
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fused multiply add pipeline
- Patent number 9,430,190
- Issue date Aug 30, 2016
- International Business Machines Corporation
- Son Dao Trong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Independently timed multiplier
- Patent number 9,047,140
- Issue date Jun 2, 2015
- Texas Instruments Incorporated
- Christian Wiencke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit including at least one configurable logic cell c...
- Patent number 7,856,467
- Issue date Dec 21, 2010
- STMicroelectronics Pvt. Ltd.
- Parvesh Swami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power array multiplier
- Patent number 7,546,331
- Issue date Jun 9, 2009
- QUALCOMM Incorporated
- Farhad Fuad Islam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital multiplier with reduced spurious switching by means of Latc...
- Patent number 7,206,801
- Issue date Apr 17, 2007
- Chang, Joseph Sylvester
- Joseph Sylvester Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split multiplier array and method of operation
- Patent number 7,024,444
- Issue date Apr 4, 2006
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split multiplier array and method of operation
- Patent number 6,598,064
- Issue date Jul 22, 2003
- National Semiconductor Corporation
- Daniel W. Green
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Functional module model, pipelined circuit synthesis and pipelined...
- Patent number 6,292,926
- Issue date Sep 18, 2001
- Matsushita Electric Industrial Co., Ltd.
- Masahiro Fukui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast determination of carry inputs from lower order product for rad...
- Patent number 6,131,107
- Issue date Oct 10, 2000
- Digital Equipment Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient use of inverting cells in multiplier converter
- Patent number 6,122,655
- Issue date Sep 19, 2000
- Lucent Technologies Inc.
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic synthesis method, semiconductor integrated circuit and arithm...
- Patent number 5,978,573
- Issue date Nov 2, 1999
- Matsushita Electric Industrial Co. Ltd.
- Kazutake Ohara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast converter for left-to-right carry-free multiplier
- Patent number 5,928,317
- Issue date Jul 27, 1999
- Lucent Technologies Inc.
- Jalil Fadavi-Ardekani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic synthesis method, semiconductor integrated circuit and arithm...
- Patent number 5,926,396
- Issue date Jul 20, 1999
- Matsushita Electric Industrial Co., Ltd.
- Kazutake Ohara
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure and method of array multiplication
- Patent number 5,914,892
- Issue date Jun 22, 1999
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shyh-Jye Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast determination of carry inputs from lower order product for rad...
- Patent number 5,889,692
- Issue date Mar 30, 1999
- Digital Equipment Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Horizontally pipelined multiplier circuit
- Patent number 5,761,106
- Issue date Jun 2, 1998
- Motorola, Inc.
- Paul R. Crocker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recurrent adrithmetical computation using carry-save arithmetic
- Patent number 5,751,619
- Issue date May 12, 1998
- International Business Machines Corporation
- Ramesh Chandra Agarwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast determination of carry inputs from lower order product for rad...
- Patent number 5,729,485
- Issue date Mar 17, 1998
- Digital Equipment Corporation
- Gilbert M. Wolrich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Structure and method of using an arithmetic and logic unit for carr...
- Patent number 5,623,434
- Issue date Apr 22, 1997
- Chromatic Research, Inc.
- Stephen C. Purcell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier circuit with rounding-off function
- Patent number 5,619,440
- Issue date Apr 8, 1997
- Mitsubishi Denki Kabushiki Kaisha
- Michio Komoda
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND ELECTRONIC DEVICE FOR HIGH PERFORMANCE MODULO MULTIPLIC...
- Publication number 20240361984
- Publication date Oct 31, 2024
- Samsung Electronics Co., Ltd.
- Sandesh Kanchodu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIGITAL IN-MEMORY COMPUTING MACRO BASED ON APPROXIMATE ARITHMETIC H...
- Publication number 20230266943
- Publication date Aug 24, 2023
- THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
- Mingoo Seok
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplier and Adder in Systolic Array
- Publication number 20230015148
- Publication date Jan 19, 2023
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED WALLACE TREES IN FMA CIRCUITS
- Publication number 20220365751
- Publication date Nov 17, 2022
- Intel Corporation
- Aditya Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLIER CIRCUIT
- Publication number 20200371749
- Publication date Nov 26, 2020
- ARM Limited
- Michael Alexander KENNEDY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Method of Fast Floating-Point Adder Tree for Neural N...
- Publication number 20200272417
- Publication date Aug 27, 2020
- DINOPLUSAI HOLDINGS LIMITED
- Yutian Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST VECTOR MULTIPLICATION AND ACCUMULATION CIRCUIT
- Publication number 20190272150
- Publication date Sep 5, 2019
- National Tsing Hua University
- Youn-Long LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable-Logic-Directed Multiplier Mapping
- Publication number 20190042197
- Publication date Feb 7, 2019
- Intel Corporation
- Martin Langhammer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY-AND-ACCUMULATE UNIT IN CARRY-SAVE ADDER FORMAT AND APPLICA...
- Publication number 20160342393
- Publication date Nov 24, 2016
- International Business Machines Corporation
- Marcel Kossel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR DYNAMICALLY REDUCING POWER CONSUMPTION OF FLO...
- Publication number 20140351308
- Publication date Nov 27, 2014
- NVIDIA Corporation
- David C. Tannenbaum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FUSED MULTIPLY ADD PIPELINE
- Publication number 20140244704
- Publication date Aug 28, 2014
- International Business Machines Corporation
- SON DAO TRONG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARITHMETIC CIRCUIT AND ARITHMETIC METHOD
- Publication number 20140181170
- Publication date Jun 26, 2014
- Kabushiki Kaisha Toshiba
- Koichiro BAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-TIMED MULTIPLIER
- Publication number 20130031154
- Publication date Jan 31, 2013
- Texas Instruments Deutschland GmbH
- Christian Wiencke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable arithmetic unit
- Publication number 20090077145
- Publication date Mar 19, 2009
- CSWITCH Corporation
- Ivo J. Dobbelaere
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Full-Adder Modules and Multiplier Devices Using the Same
- Publication number 20080256165
- Publication date Oct 16, 2008
- NXP B.V.
- Rohini Krishnan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLY AND MULTIPLY AND ACCUMULATE UNIT
- Publication number 20080243976
- Publication date Oct 2, 2008
- Texas Instruments Deutschland GmbH
- Christian Wiencke
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Power array multiplier
- Publication number 20060212505
- Publication date Sep 21, 2006
- Farhad Fuad Islam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit including at least one configurable logic cell c...
- Publication number 20060195503
- Publication date Aug 31, 2006
- STMICROELECRONICS PVT. LTD.
- Parvesh Swami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus for multiplication of data in two's complement and unsign...
- Publication number 20040010536
- Publication date Jan 15, 2004
- International Business Machines Corporation
- Jaime H. Moreno
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital Multiplier with reduced spurious switching by means of Latc...
- Publication number 20030220957
- Publication date Nov 27, 2003
- Joseph Sylvester Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated multiplier circuit with interchanged interconnections
- Publication number 20030182344
- Publication date Sep 25, 2003
- Tsutomu Shimotoyodome
- G06 - COMPUTING CALCULATING COUNTING

using carry save adders

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Controlling carry-save adders in multiplication

Method and apparatus for performing field programmable gate array p...

Programmable-logic-directed multiplier mapping

Apparatus and method of fast floating-point adder tree for neural n...

Method and apparatus for performing synthesis for field programmabl...

Multiplier circuit

Fast vector multiplication and accumulation circuit

Multiply-and-accumulate unit in carry-save adder format and applica...

Combined adder and pre-adder for high-radix multiplier circuit

Arithmetic circuit and arithmetic method

Fused multiply add pipeline

Independently timed multiplier

Integrated circuit including at least one configurable logic cell c...

Low power array multiplier

Digital multiplier with reduced spurious switching by means of Latc...

Split multiplier array and method of operation

Split multiplier array and method of operation

Functional module model, pipelined circuit synthesis and pipelined...

Fast determination of carry inputs from lower order product for rad...

Efficient use of inverting cells in multiplier converter

Logic synthesis method, semiconductor integrated circuit and arithm...

Fast converter for left-to-right carry-free multiplier

Logic synthesis method, semiconductor integrated circuit and arithm...

Structure and method of array multiplication

Fast determination of carry inputs from lower order product for rad...

Horizontally pipelined multiplier circuit

Recurrent adrithmetical computation using carry-save arithmetic

Fast determination of carry inputs from lower order product for rad...

Structure and method of using an arithmetic and logic unit for carr...

Multiplier circuit with rounding-off function

Patents Applicationslast 30 patents

METHODS AND ELECTRONIC DEVICE FOR HIGH PERFORMANCE MODULO MULTIPLIC...

DIGITAL IN-MEMORY COMPUTING MACRO BASED ON APPROXIMATE ARITHMETIC H...

Multiplier and Adder in Systolic Array

COMPRESSED WALLACE TREES IN FMA CIRCUITS

MULTIPLIER CIRCUIT

Apparatus and Method of Fast Floating-Point Adder Tree for Neural N...

FAST VECTOR MULTIPLICATION AND ACCUMULATION CIRCUIT

Programmable-Logic-Directed Multiplier Mapping

MULTIPLY-AND-ACCUMULATE UNIT IN CARRY-SAVE ADDER FORMAT AND APPLICA...

SYSTEM AND METHOD FOR DYNAMICALLY REDUCING POWER CONSUMPTION OF FLO...

FUSED MULTIPLY ADD PIPELINE

ARITHMETIC CIRCUIT AND ARITHMETIC METHOD

SELF-TIMED MULTIPLIER

Reconfigurable arithmetic unit

Full-Adder Modules and Multiplier Devices Using the Same

MULTIPLY AND MULTIPLY AND ACCUMULATE UNIT

Low Power array multiplier

Integrated circuit including at least one configurable logic cell c...

Apparatus for multiplication of data in two's complement and unsign...

Digital Multiplier with reduced spurious switching by means of Latc...

Integrated multiplier circuit with interchanged interconnections