using ferroelectric elements

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GPHYSICS G11Information storage G11CSTATIC STORES G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements Storage elements therefor

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G11C11/22using ferroelectric elements

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Memory array channel regions
- Patent number 12,272,750
- Issue date Apr 8, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Kuo-Chang Chiang
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-die mapping matrix multiplication
- Patent number 12,265,494
- Issue date Apr 1, 2025
- Kepler Computing Inc.
- Amrita Mathuriya
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Driving method of semiconductor device
- Patent number 12,266,392
- Issue date Apr 1, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Shunpei Yamazaki
- G11 - INFORMATION STORAGE
Information Patent Grant
Negative capacitance for ferroelectric capacitive memory cell
- Patent number 12,266,393
- Issue date Apr 1, 2025
- International Business Machines Corporation
- Takashi Ando
- G11 - INFORMATION STORAGE
Information Patent Grant
Robust functionality for memory management associated with high-tem...
- Patent number 12,266,394
- Issue date Apr 1, 2025
- Micron Technology, Inc.
- Angelo Visconti
- G11 - INFORMATION STORAGE
Information Patent Grant
MFMFET, MFMFET array, and the operating method thereof
- Patent number 12,260,891
- Issue date Mar 25, 2025
- NATIONAL YANG MING CHIAO TUNG UNIVERSITY
- Tuo-Hung Hou
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated transistors having gate material passing through a pilla...
- Patent number 12,261,223
- Issue date Mar 25, 2025
- Micron Technology, Inc.
- Antonino Rigano
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory devices and methods of manufacturing thereof
- Patent number 12,262,540
- Issue date Mar 25, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Meng-Han Lin
- G11 - INFORMATION STORAGE
Information Patent Grant
Analog non-volatile memory device using poly ferrorelectric film wi...
- Patent number 12,256,552
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Chih-Sheng Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory cell with access device and memory capacitor structures
- Patent number 12,254,914
- Issue date Mar 18, 2025
- FERROELECTRIC MEMORY GMBH
- Johannes Ocker
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for forming semiconductor memory structure
- Patent number 12,256,551
- Issue date Mar 18, 2025
- Taiwan Semiconductor Manufacturing Company Ltd.
- Nuo Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit structure and method for forming and operating t...
- Patent number 12,254,915
- Issue date Mar 18, 2025
- Macronix International Co., Ltd.
- Dai-Ying Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated assemblies and methods of forming integrated assemblies
- Patent number 12,250,825
- Issue date Mar 11, 2025
- Micron Technology, Inc.
- Durai Vishak Nirmal Ramaswamy
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory device and its operating method
- Patent number 12,250,823
- Issue date Mar 11, 2025
- Industry-University Cooperation Foundation Hanyang University Erica Campus
- Younghyun Kim
- G11 - INFORMATION STORAGE
Information Patent Grant
Single plate configuration and memory array operation
- Patent number 12,249,362
- Issue date Mar 11, 2025
- Micron Technology, Inc.
- Ferdinando Bedeschi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable in-memory physically unclonable function
- Patent number 12,249,371
- Issue date Mar 11, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Yun-Feng Kao
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory device and operating method thereof
- Patent number 12,243,574
- Issue date Mar 4, 2025
- Seoul National University R&DB Foundation
- Woo Young Choi
- G11 - INFORMATION STORAGE
Information Patent Grant
Quasi-volatile memory with reference bit line structure
- Patent number 12,245,429
- Issue date Mar 4, 2025
- SUNRISE MEMORY CORPORATION
- Christopher J. Petti
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory
- Patent number 12,243,588
- Issue date Mar 4, 2025
- SK hynix Inc.
- Jeong Hwan Song
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor devices including ferroelectric memory and methods of...
- Patent number 12,243,573
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chenchen Wang
- G11 - INFORMATION STORAGE
Information Patent Grant
Grid structure to reduce domain size in ferroelectric memory device
- Patent number 12,245,435
- Issue date Mar 4, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd
- Han-Jong Chia
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell biasing techniques during a read operation
- Patent number 12,237,002
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Andrea Locatelli
- G11 - INFORMATION STORAGE
Information Patent Grant
Storing bits with cells in a memory device
- Patent number 12,237,020
- Issue date Feb 25, 2025
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual-precision analog memory cell and array
- Patent number 12,230,309
- Issue date Feb 18, 2025
- Hefei Reliance Memory Limited
- Zhichao Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array contact structures
- Patent number 12,225,731
- Issue date Feb 11, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chih-Yu Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
High-density low voltage ferroelectric differential memory bit-cell...
- Patent number 12,223,992
- Issue date Feb 11, 2025
- Kepler Computing Inc.
- Sasikanth Manipatruni
- G11 - INFORMATION STORAGE
Information Patent Grant
Content addressable memory based on selfrectifying ferroelectric tu...
- Patent number 12,223,993
- Issue date Feb 11, 2025
- Industry-Academic Cooperation Foundation, Yonsei University
- Seong Ook Jung
- G11 - INFORMATION STORAGE
Information Patent Grant
Domain switching devices and methods of manufacturing the same
- Patent number 12,224,346
- Issue date Feb 11, 2025
- Samsung Electronics Co., Ltd.
- Jinseong Heo
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory arrays, ferroelectric transistors, and methods of reading an...
- Patent number 12,223,994
- Issue date Feb 11, 2025
- Micron Technology, Inc.
- Durai Vishak Nirmal Ramaswamy
- G11 - INFORMATION STORAGE
Information Patent Grant
Ferroelectric-based synaptic device and method of operating the syn...
- Patent number 12,224,003
- Issue date Feb 11, 2025
- Seoul National University R&DB Foundation
- Jong-Ho Lee
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CAPACITIVE SYNAPTIC COMPONENT AND METHOD FOR CONTROLLING SAME
- Publication number 20250118363
- Publication date Apr 10, 2025
- SEMRON GMBH
- Kai-Uwe DEMASIUS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE WITH WRITE PULSE TRIMMING
- Publication number 20250118367
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hiroki Noguchi
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY SOURCE/DRAIN ELECTRODE STRUCTURES
- Publication number 20250120091
- Publication date Apr 10, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Kuo-Chang Chiang
- G11 - INFORMATION STORAGE
Information Patent Application
TARGETED COMMAND/ADDRESS PARITY LOW LIFT
- Publication number 20250117291
- Publication date Apr 10, 2025
- Lodestar Licensing Group LLC
- Aaron P. Boehm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient Memory Operation Using a Destructive Read Memory Array
- Publication number 20250110655
- Publication date Apr 3, 2025
- ADVANCED MICRO DEVICES, INC.
- Jagadish B. Kotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE-DIMENSIONAL MEMORY STRING ARRAY OF THIN-FILM FERROELECTRIC TR...
- Publication number 20250113493
- Publication date Apr 3, 2025
- Sunrise Memory Corporation
- Christopher J. Petti
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICES INCLUDING DECOUPLING CAPACITORS
- Publication number 20250105138
- Publication date Mar 27, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Yu-Xuan Huang
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE
- Publication number 20250095692
- Publication date Mar 20, 2025
- KIOXIA Corporation
- Takafumi MASUDA
- G11 - INFORMATION STORAGE
Information Patent Application
FERROELECTRIC MEMORY AND DATA READING METHOD AND DATA WRITING METHO...
- Publication number 20250095727
- Publication date Mar 20, 2025
- CXMT CORPORATION
- Xiang LIU
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE AND OPERATION METHOD THEREOF
- Publication number 20250078894
- Publication date Mar 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Kuo-Yu HSIANG
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING AND OPERATING T...
- Publication number 20250078893
- Publication date Mar 6, 2025
- Macronix International Co., Ltd.
- Dai-Ying LEE
- G11 - INFORMATION STORAGE
Information Patent Application
FERROELECTRIC MEMORY, CONTROL APPARATUS THEREOF, METHOD FOR INCREAS...
- Publication number 20250069634
- Publication date Feb 27, 2025
- Huawei Technologies Co., Ltd
- Wanliang TAN
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND MECHANISM FOR PROCESSING NEURAL NETWORK TASKS USING A...
- Publication number 20250068897
- Publication date Feb 27, 2025
- Google LLC
- Uday Kumar Dasari
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREE-DIMENSIONAL MEMORY DEVICES WITH CONDUCTIVE SPACERS
- Publication number 20250063736
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Sai-Hooi Yeong
- G11 - INFORMATION STORAGE
Information Patent Application
FEEDBACK FOR MULTI-LEVEL SIGNALING IN A MEMORY DEVICE
- Publication number 20250060900
- Publication date Feb 20, 2025
- Lodestar Licensing Group LLC
- M. Ataul Karim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ASSOCIATED MEMORY...
- Publication number 20250063793
- Publication date Feb 20, 2025
- Taiwan Semiconductor Manufacturing company Ltd.
- NUO XU
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Devices and Methods of Forming Memory Devices
- Publication number 20250063722
- Publication date Feb 20, 2025
- Micron Technology, Inc.
- Giorgio Servalli
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES INCLUDING FERROELECTRIC CELL CAPACITORS AND OPERATIN...
- Publication number 20250054532
- Publication date Feb 13, 2025
- Samsung Electronics Co., Ltd.
- Hwayeong Lee
- G11 - INFORMATION STORAGE
Information Patent Application
IMPRINT RECOVERY FOR MEMORY CELLS
- Publication number 20250054560
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Jonathan D. Harms
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE INCLUDING MEMORY CELLS AND METHOD FOR MANUFACT...
- Publication number 20250054522
- Publication date Feb 13, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Hung-Li CHIANG
- G11 - INFORMATION STORAGE
Information Patent Application
PMOS THRESHOLD COMPENSATION SENSE AMPLIFIER FOR FeRAM DEVICES
- Publication number 20250054531
- Publication date Feb 13, 2025
- Micron Technology, Inc.
- Tong Liu
- G11 - INFORMATION STORAGE
Information Patent Application
SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE
- Publication number 20250054523
- Publication date Feb 13, 2025
- Semiconductor Energy Laboratory Co., Ltd.
- Takeshi AOKI
- G11 - INFORMATION STORAGE
Information Patent Application
Memory Arrays Comprising Vertically-Alternating Tiers of Insulative...
- Publication number 20250046358
- Publication date Feb 6, 2025
- Micron Technology, Inc.
- Durai Vishak Nirmal Ramaswamy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK END LINE OF MEMORY DEVICE
- Publication number 20250048644
- Publication date Feb 6, 2025
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Shih-Yu LIAO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING
- Publication number 20250046347
- Publication date Feb 6, 2025
- Lodestar Licensing Group LLC
- Peter Mayer
- G11 - INFORMATION STORAGE
Information Patent Application
FeRAM MFM STRUCTURE WITH SELECTIVE ELECTRODE ETCH
- Publication number 20250048647
- Publication date Feb 6, 2025
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chih-Hsiang Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PLANAR FERROELECTRIC MEMORY DEVICE
- Publication number 20250040146
- Publication date Jan 30, 2025
- Kepler Computing Inc.
- Sasikanth Manipatruni
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BIT LINE READING CIRCUIT, MEMORY, AND ELECTRONIC DEVICE
- Publication number 20250037749
- Publication date Jan 30, 2025
- Huawei Technologies Co., Ltd
- Shihui YIN
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM ON CHIP (SOC) WITH PROCESSOR AND INTEGRATED FERROELECTRIC ME...
- Publication number 20250029646
- Publication date Jan 23, 2025
- SEAGATE TECHNOLOGY LLC
- Jon D. TRANTHAM
- G11 - INFORMATION STORAGE
Information Patent Application
NONVOLATILE MEMORY DEVICE, STORAGE DEVICE HAVING THE SAME, AND OPER...
- Publication number 20250029647
- Publication date Jan 23, 2025
- Samsung Electronics Co., Ltd.
- Siyeon Cho
- G11 - INFORMATION STORAGE

using ferroelectric elements

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Memory array channel regions

Multi-die mapping matrix multiplication

Driving method of semiconductor device

Negative capacitance for ferroelectric capacitive memory cell

Robust functionality for memory management associated with high-tem...

MFMFET, MFMFET array, and the operating method thereof

Integrated transistors having gate material passing through a pilla...

Semiconductor memory devices and methods of manufacturing thereof

Analog non-volatile memory device using poly ferrorelectric film wi...

Memory cell with access device and memory capacitor structures

Method for forming semiconductor memory structure

Integrated circuit structure and method for forming and operating t...

Integrated assemblies and methods of forming integrated assemblies

Non-volatile memory device and its operating method

Single plate configuration and memory array operation

Reconfigurable in-memory physically unclonable function

Content addressable memory device and operating method thereof

Quasi-volatile memory with reference bit line structure

Semiconductor memory

Semiconductor devices including ferroelectric memory and methods of...

Grid structure to reduce domain size in ferroelectric memory device

Memory cell biasing techniques during a read operation

Storing bits with cells in a memory device

Dual-precision analog memory cell and array

Memory array contact structures

High-density low voltage ferroelectric differential memory bit-cell...

Content addressable memory based on selfrectifying ferroelectric tu...

Domain switching devices and methods of manufacturing the same

Memory arrays, ferroelectric transistors, and methods of reading an...

Ferroelectric-based synaptic device and method of operating the syn...

Patents Applicationslast 30 patents

CAPACITIVE SYNAPTIC COMPONENT AND METHOD FOR CONTROLLING SAME

MEMORY DEVICE WITH WRITE PULSE TRIMMING

MEMORY ARRAY SOURCE/DRAIN ELECTRODE STRUCTURES

TARGETED COMMAND/ADDRESS PARITY LOW LIFT

Efficient Memory Operation Using a Destructive Read Memory Array

THREE-DIMENSIONAL MEMORY STRING ARRAY OF THIN-FILM FERROELECTRIC TR...

SEMICONDUCTOR DEVICES INCLUDING DECOUPLING CAPACITORS

SEMICONDUCTOR MEMORY DEVICE

FERROELECTRIC MEMORY AND DATA READING METHOD AND DATA WRITING METHO...

MEMORY DEVICE AND OPERATION METHOD THEREOF

INTEGRATED CIRCUIT STRUCTURE AND METHOD FOR FORMING AND OPERATING T...

FERROELECTRIC MEMORY, CONTROL APPARATUS THEREOF, METHOD FOR INCREAS...

APPARATUS AND MECHANISM FOR PROCESSING NEURAL NETWORK TASKS USING A...

THREE-DIMENSIONAL MEMORY DEVICES WITH CONDUCTIVE SPACERS

FEEDBACK FOR MULTI-LEVEL SIGNALING IN A MEMORY DEVICE

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND ASSOCIATED MEMORY...

Memory Devices and Methods of Forming Memory Devices

MEMORY DEVICES INCLUDING FERROELECTRIC CELL CAPACITORS AND OPERATIN...

IMPRINT RECOVERY FOR MEMORY CELLS

SEMICONDUCTOR DEVICE INCLUDING MEMORY CELLS AND METHOD FOR MANUFACT...

PMOS THRESHOLD COMPENSATION SENSE AMPLIFIER FOR FeRAM DEVICES

SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE

Memory Arrays Comprising Vertically-Alternating Tiers of Insulative...

BACK END LINE OF MEMORY DEVICE

DRIVE STRENGTH CALIBRATION FOR MULTI-LEVEL SIGNALING

FeRAM MFM STRUCTURE WITH SELECTIVE ELECTRODE ETCH

PLANAR FERROELECTRIC MEMORY DEVICE

BIT LINE READING CIRCUIT, MEMORY, AND ELECTRONIC DEVICE

SYSTEM ON CHIP (SOC) WITH PROCESSOR AND INTEGRATED FERROELECTRIC ME...

NONVOLATILE MEMORY DEVICE, STORAGE DEVICE HAVING THE SAME, AND OPER...